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authorDavid S. Miller <davem@davemloft.net>2006-06-20 01:20:00 -0700
committerDavid S. Miller <davem@davemloft.net>2006-06-20 01:20:00 -0700
commitfd0504c3217d6d1bc8f33f53fb536299cae8feda (patch)
tree4379f5376358d1f54fc183f458614f289ed6d326 /include
parent3185d4d2873a46ca1620d784013f285522091aa0 (diff)
[SPARC64]: Send all device interrupts via one PIL.
This is the first in a series of cleanups that will hopefully allow a seamless attempt at using the generic IRQ handling infrastructure in the Linux kernel. Define PIL_DEVICE_IRQ and vector all device interrupts through there. Get rid of the ugly pil0_dummy_{bucket,desc}, instead vector the timer interrupt directly to a specific handler since the timer interrupt is the only event that will be signaled on PIL 14. The irq_worklist is now in the per-cpu trap_block[]. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc64/cpudata.h19
-rw-r--r--include/asm-sparc64/pil.h7
2 files changed, 14 insertions, 12 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 9d6a6dbaf12..f2cc9411b4c 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -74,8 +74,10 @@ struct trap_per_cpu {
unsigned long tsb_huge;
unsigned long tsb_huge_temp;
-/* Dcache line 8: Unused, needed to keep trap_block a power-of-2 in size. */
- unsigned long __pad2[4];
+/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */
+ unsigned int irq_worklist;
+ unsigned int __pad1;
+ unsigned long __pad2[3];
} __attribute__((aligned(64)));
extern struct trap_per_cpu trap_block[NR_CPUS];
extern void init_cur_cpu_trap(struct thread_info *);
@@ -119,6 +121,7 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
#define TRAP_PER_CPU_CPU_LIST_PA 0xc8
#define TRAP_PER_CPU_TSB_HUGE 0xd0
#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8
+#define TRAP_PER_CPU_IRQ_WORKLIST 0xe0
#define TRAP_BLOCK_SZ_SHIFT 8
@@ -171,11 +174,8 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
/* Clobbers TMP, loads local processor's IRQ work area into DEST. */
#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \
- __GET_CPUID(TMP) \
- sethi %hi(__irq_work), DEST; \
- sllx TMP, 6, TMP; \
- or DEST, %lo(__irq_work), DEST; \
- add DEST, TMP, DEST;
+ TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
+ add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST;
/* Clobbers TMP, loads DEST with current thread info pointer. */
#define TRAP_LOAD_THREAD_REG(DEST, TMP) \
@@ -211,9 +211,10 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
+/* Clobbers TMP, loads local processor's IRQ work area into DEST. */
#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \
- sethi %hi(__irq_work), DEST; \
- or DEST, %lo(__irq_work), DEST;
+ TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
+ add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST;
#define TRAP_LOAD_THREAD_REG(DEST, TMP) \
TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
diff --git a/include/asm-sparc64/pil.h b/include/asm-sparc64/pil.h
index 79f827eb3f5..72927749aeb 100644
--- a/include/asm-sparc64/pil.h
+++ b/include/asm-sparc64/pil.h
@@ -5,9 +5,9 @@
/* To avoid some locking problems, we hard allocate certain PILs
* for SMP cross call messages that must do a etrap/rtrap.
*
- * A cli() does not block the cross call delivery, so when SMP
- * locking is an issue we reschedule the event into a PIL interrupt
- * which is blocked by cli().
+ * A local_irq_disable() does not block the cross call delivery, so
+ * when SMP locking is an issue we reschedule the event into a PIL
+ * interrupt which is blocked by local_irq_disable().
*
* In fact any XCALL which has to etrap/rtrap has a problem because
* it is difficult to prevent rtrap from running BH's, and that would
@@ -17,6 +17,7 @@
#define PIL_SMP_RECEIVE_SIGNAL 2
#define PIL_SMP_CAPTURE 3
#define PIL_SMP_CTX_NEW_VERSION 4
+#define PIL_DEVICE_IRQ 5
#ifndef __ASSEMBLY__
#define PIL_RESERVED(PIL) ((PIL) == PIL_SMP_CALL_FUNC || \