diff options
| author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2008-04-17 01:14:33 +0200 |
|---|---|---|
| committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-04-17 01:14:33 +0200 |
| commit | b4dcaea36b0376456c97698deba0089d2d67cbe7 (patch) | |
| tree | 9dd0a07edf2f15b2a8caeade081915e9f770f256 /include | |
| parent | fabd3a223a96de1a91b2148655f2ed09ca9d1c20 (diff) | |
Pb1200/DBAu1200: fix bad IDE resource size
The header files for the Pb1200/DBAu1200 boards have wrong definition for the
IDE interface's decoded range length -- it should be 512 bytes according to
what the IDE driver does. In addition, the IDE platform device claims 1 byte
too many for its memory resource -- fix the platform code and the IDE driver
in accordance.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-mips/mach-db1x00/db1200.h | 4 | ||||
| -rw-r--r-- | include/asm-mips/mach-pb1x00/pb1200.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h index a6bdac61ab4..d2e28e64932 100644 --- a/include/asm-mips/mach-db1x00/db1200.h +++ b/include/asm-mips/mach-db1x00/db1200.h @@ -173,8 +173,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define AU1XXX_SMC91111_IRQ DB1200_ETH_INT #define AU1XXX_ATA_PHYS_ADDR (0x18800000) -#define AU1XXX_ATA_PHYS_LEN (0x100) -#define AU1XXX_ATA_REG_OFFSET (5) +#define AU1XXX_ATA_REG_OFFSET (5) +#define AU1XXX_ATA_PHYS_LEN (16 << AU1XXX_ATA_REG_OFFSET) #define AU1XXX_ATA_INT DB1200_IDE_INT #define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1; #define AU1XXX_ATA_RQSIZE 128 diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h index 72213e3d02c..edaa489b58f 100644 --- a/include/asm-mips/mach-pb1x00/pb1200.h +++ b/include/asm-mips/mach-pb1x00/pb1200.h @@ -186,8 +186,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define AU1XXX_SMC91111_IRQ PB1200_ETH_INT #define AU1XXX_ATA_PHYS_ADDR (0x0C800000) -#define AU1XXX_ATA_PHYS_LEN (0x100) -#define AU1XXX_ATA_REG_OFFSET (5) +#define AU1XXX_ATA_REG_OFFSET (5) +#define AU1XXX_ATA_PHYS_LEN (16 << AU1XXX_ATA_REG_OFFSET) #define AU1XXX_ATA_INT PB1200_IDE_INT #define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1; #define AU1XXX_ATA_RQSIZE 128 |