diff options
| author | Pete Popov <ppopov@embeddedalley.com> | 2005-09-17 00:38:10 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:32:24 +0100 |
| commit | d6460827af0763dc2f4a5cf0455cbf1e3a9ccb77 (patch) | |
| tree | eeac9842013ab85276fff3ee64928c9c4cd1fd2c /include | |
| parent | efe29c0f34dc3ee3511e46458f335edb7ee50327 (diff) | |
Updated pcmcia driver with pb1200 and db1200 support.
Updated db1200_defconfig so pcmcia is enabled by default.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-mips/mach-db1x00/db1200.h | 10 | ||||
| -rw-r--r-- | include/asm-mips/mach-pb1x00/pb1200.h | 8 |
2 files changed, 18 insertions, 0 deletions
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h index 6d1ddf43d29..5d894376fc1 100644 --- a/include/asm-mips/mach-db1x00/db1200.h +++ b/include/asm-mips/mach-db1x00/db1200.h @@ -206,6 +206,16 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define DB1200_INT_END (DB1200_INT_BEGIN + 15) /* For drivers/pcmcia/au1000_db1x00.c */ + +/* PCMCIA Db1x00 specific defines */ + +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) + +/* VPP/VCC */ +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + #define BOARD_PC0_INT DB1200_PC0_INT #define BOARD_PC1_INT DB1200_PC1_INT #define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h index 0f6646335e9..9a3088b19bf 100644 --- a/include/asm-mips/mach-pb1x00/pb1200.h +++ b/include/asm-mips/mach-pb1x00/pb1200.h @@ -173,6 +173,14 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_INT_SD1INSERT 0x4000 #define BCSR_INT_SD1EJECT 0x8000 +/* PCMCIA Db1x00 specific defines */ +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) + +/* VPP/VCC */ +#define SET_VCC_VPP(VCC, VPP, SLOT)\ + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + #define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300) #define AU1XXX_SMC91111_IRQ PB1200_ETH_INT |