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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-07-11 09:49:41 +0200
committerBrian Norris <computersforpeace@gmail.com>2014-07-21 19:26:11 -0700
commitbb5fd0b6daaf0da0b1e78c699b8582984373d3f4 (patch)
tree6d273fd7f5d0b6bc99eff768e6c1d771b599e4bb /include
parentd0d5864676dbccfb1337864a0ae6ce97e6342678 (diff)
mtd: nand: define struct nand_timings
Define a struct containing the standard NAND timings as described in NAND datasheets. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/nand.h49
1 files changed, 49 insertions, 0 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 1cff329ae13..cdda207c16e 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -948,4 +948,53 @@ static inline int jedec_feature(struct nand_chip *chip)
return chip->jedec_version ? le16_to_cpu(chip->jedec_params.features)
: 0;
}
+
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These informations can be found in every NAND datasheets and the timings
+ * meaning are described in the ONFI specifications:
+ * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
+ * Parameters)
+ *
+ * All these timings are expressed in picoseconds.
+ */
+
+struct nand_sdr_timings {
+ u32 tALH_min;
+ u32 tADL_min;
+ u32 tALS_min;
+ u32 tAR_min;
+ u32 tCEA_max;
+ u32 tCEH_min;
+ u32 tCH_min;
+ u32 tCHZ_max;
+ u32 tCLH_min;
+ u32 tCLR_min;
+ u32 tCLS_min;
+ u32 tCOH_min;
+ u32 tCS_min;
+ u32 tDH_min;
+ u32 tDS_min;
+ u32 tFEAT_max;
+ u32 tIR_min;
+ u32 tITC_max;
+ u32 tRC_min;
+ u32 tREA_max;
+ u32 tREH_min;
+ u32 tRHOH_min;
+ u32 tRHW_min;
+ u32 tRHZ_max;
+ u32 tRLOH_min;
+ u32 tRP_min;
+ u32 tRR_min;
+ u64 tRST_max;
+ u32 tWB_max;
+ u32 tWC_min;
+ u32 tWH_min;
+ u32 tWHR_min;
+ u32 tWP_min;
+ u32 tWW_min;
+};
#endif /* __LINUX_MTD_NAND_H */