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authorPawel Moll <pawel.moll@arm.com>2012-06-12 16:14:03 +0100
committerPawel Moll <pawel.moll@arm.com>2012-07-12 16:16:56 +0100
commitd927daf5c81c9b6bf2d6a83dc4c8c60268930ee5 (patch)
treee0a45cf8833d54d2b811b1b5a9635b3b8c844084 /kernel/signal.c
parentef5911966d2312478a74e93d993cd623a869ab10 (diff)
ARM: vexpress: Check master site in daughterboard's sysctl operations
With recent enough motherboard firmware, core tile can be fitted in either of the two daughterboard sites. The non-DT tile code for V2P-CA9 did not check that when configuring DVI output nor setting CLCD pixel clock. Fixed now, providing "get master site" API in motherboard's code. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'kernel/signal.c')
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