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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-10 15:51:15 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-10 15:51:15 -0700 |
| commit | c44e3ed539e4fc17d6bcb5eaecb894a94de4cc5f (patch) | |
| tree | dbc31370fbc5196e090708341f3ca4c4dca7f41e /kernel/softirq.c | |
| parent | 7dc3ca39cb1e22eedbf1207ff9ac7bf682fc0f6d (diff) | |
| parent | 5095f59bda6793a7b8f0856096d6893fe98e0e51 (diff) | |
Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: cpu_debug: Remove model information to reduce encoding-decoding
x86: fixup numa_node information for AMD CPU northbridge functions
x86: k8 convert node_to_k8_nb_misc() from a macro to an inline function
x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions
x86/docs: add description for cache_disable sysfs interface
x86: cacheinfo: disable L3 ECC scrubbing when L3 cache index is disabled
x86: cacheinfo: replace sysfs interface for cache_disable feature
x86: cacheinfo: use cached K8 NB_MISC devices instead of scanning for it
x86: cacheinfo: correct return value when cache_disable feature is not active
x86: cacheinfo: use L3 cache index disable feature only for CPUs that support it
Diffstat (limited to 'kernel/softirq.c')
0 files changed, 0 insertions, 0 deletions