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authorWei Ni <wni@nvidia.com>2008-09-26 13:55:56 +0800
committerJaroslav Kysela <perex@perex.cz>2008-10-10 13:41:36 +0200
commitdc9c8e218da823008ce1572998902a4bdf46af37 (patch)
treec32b051223d8210e0acfc6673b10d23701c073fd /lib/locking-selftest-spin-softirq.h
parent9a10eb21e1e1c389a8cea3016157a7f471512645 (diff)
ALSA: Fix for reading RIRB buffer on NVIDIA aza controller with AMD Phenom cpu
When read RIRB buffer immediately after RIRB interrupt received, sometimes the data will be "0x0". If we wait for some time, the data in buffer will be correct. This issue only occurred with AMD Phenom cpu. So we set this "needs_damn_long_delay" flag. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'lib/locking-selftest-spin-softirq.h')
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