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authorThomas Gleixner <tglx@linutronix.de>2014-06-19 21:52:24 +0000
committerMike Turquette <mturquette@linaro.org>2014-07-13 07:12:11 -0700
commit449437778bd09b73a5e51554f7219706da08917f (patch)
treec76469a1b98dfad4458b8a7a13b102298a5980cc /mm/sparse.c
parent15ebb05248d025534773c9ef64915bd888f04e4b (diff)
clk: spear3xx: Set proper clock parent of uart1/2
The uarts only work when the parent is ras_ahb_clk. The stale 3.5 based ST tree does this in the board file. Add it to the clk init function. Not pretty, but the mess there is amazing anyway. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'mm/sparse.c')
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