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authorJonas Aaberg <jonas.aberg@stericsson.com>2010-06-20 21:25:54 +0000
committerDan Williams <dan.j.williams@intel.com>2010-06-22 18:01:55 -0700
commit2123a61e174074b849fce2277412836b1b897942 (patch)
tree4f96e988dba2dcb3689cbb5c31a32ef2100e33b8 /net/dcb
parent0c32269d813c148194524fc8272f7ec1f7c90e6a (diff)
DMAENGINE: ste_dma40: interrupts only on dst
We don't want interrupts when the source is done, only when the destination is done and everything is complete at the recieveing end of a transfer. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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