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authorPaul Bolle <pebolle@tiscali.nl>2011-03-11 11:24:52 +0100
committerTakashi Iwai <tiwai@suse.de>2011-03-11 15:22:00 +0100
commit5cd2ad81f912c8535491f541108b655f4552dff9 (patch)
tree3dc74dc647e858967a33c777af91ee65e1dc6ac8 /net/sctp/protocol.c
parent88a8516a2128a6d078a106ead48092240e8a138f (diff)
ALSA: intel8x0m: wait a bit before warm reset check
At every resume a laptop I use prints this message (at KERN_ERR level): ALSA sound/pci/intel8x0m.c:904: AC'97 warm reset still in progress? [0x2] The thing to note here is that 0x2 corresponds to ICH_AC97COLD. Ie, what seems to be happening is that the register involved indicated a warm reset for some time (as the ICH_AC97WARM bit was set) but by the time the warning is printed, and that same register is checked again, that bit is already cleared and only the ICH_AC97COLD bit is still set. It turns out a warm reset needs some time to settle, but it is currently checked right away. The test therefore fails the first time it is done and schedule_timeout_uninterruptible() will be called. Once we return from that jiffies is already (far) past end_time on this laptop, so we exit the loop, print a warning, and exit the function while the warm reset actually succeeded. A way to fix this is to call usleep_range() after writing to the register involved. A handful of tests suggest 500 usecs is a safe value. (This might punish the "finish cold reset" case, but on this laptop such a cold reset apparently never happens, so I can't say for sure.) While we're at it drop the extra single tick from end_time, as it looks rather silly. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'net/sctp/protocol.c')
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