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authorDavid S. Miller <davem@davemloft.net>2013-09-24 10:33:16 -0400
committerDavid S. Miller <davem@davemloft.net>2013-09-24 10:33:16 -0400
commit61f860c356c3d15b6cf48ef35beea664921dec1e (patch)
treeede7e28a463ae9bae6b7ca3e406fc4d63a5ec8d4 /net/wireless/reg.c
parent44da5c2f523876a02336c18dbcce93449fdbf0ca (diff)
parent39ffbd917c6230ca503edcd90de6b373f34b6b1a (diff)
Merge branch 'cpsw'
Mugunthan V N says: ==================== This patch series adds the support for configuring GMII_SEL register of control module to select the phy mode type and also to configure the clock source for RMII phy mode whether to use internal clock or the external clock from the phy itself. Till now CPSW works as this configuration is done in U-Boot and carried over to the kernel. But during suspend/resume Control module tends to lose its configured value for GMII_SEL register in AM33xx PG1.0, so if CPSW is used in RMII or RGMII mode, on resume cpsw is not working as GMII_SEL register lost its configuration values. The initial version of the patch is done by Daniel Mack but as per Tony's comment he wants it as a seperate driver as it is done in USB control module. I have created a seperate driver for the same. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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