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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2007-05-05 22:03:49 +0200
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-05-05 22:03:49 +0200
commit7accbffdb8163a59c7bdd3e4eb9a391198979522 (patch)
treef5752ca425f25a2be87bb84fec13488879a74cc6 /net
parente51e2528d589c13f0e51dfa671c310021d003e21 (diff)
cmd64x: add/fix enablebits (take 2)
The IDE core looks at the wrong bit when checking if the secondary channel is enabled on PCI0646 -- CNTRL register bit 7 is read-ahead disable, bit 3 is the correct one. Starting with PCI0646U chip, the primary channel can also be enabled/disabled -- so, add 'enablebits' initializers to each 'ide_pci_device_t' structure, handling the original PCI0646 via adding the init_setup() method and clearing the 'reg' field there if necessary... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions