diff options
author | Peter Ujfalusi <peter.ujfalusi@nokia.com> | 2008-12-01 10:03:47 +0200 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2008-12-01 19:58:54 +0000 |
commit | 4290239cd05b6323da87b5e7e7db4c673bff5359 (patch) | |
tree | 8167f32b545b6d07ada30fe52032b056005321e2 /sound/soc/codecs/twl4030.c | |
parent | d889a72c5c71161d6f934f9d7fca0e5b7e52bc08 (diff) |
ASoC: TWL4030: Add volume controls for outputs
All outputs have dedicated gain controls except the
HandsFree output.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/twl4030.c')
-rw-r--r-- | sound/soc/codecs/twl4030.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index 1dae73af527..ffd5120697a 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c @@ -367,6 +367,12 @@ static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0); static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); /* + * Gain controls tied to outputs + * -6 dB to 6 dB in 6 dB steps (mute instead of -12) + */ +static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1); + +/* * Capture gain after the ADCs * from 0 dB to 31 dB in 1 dB steps */ @@ -395,6 +401,21 @@ static const struct snd_kcontrol_new twl4030_snd_controls[] = { TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 3, 0x12, 1, analog_tlv), + /* Separate output gain controls */ + SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume", + TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL, + 4, 3, 0, output_tvl), + + SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume", + TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl), + + SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume", + TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL, + 4, 3, 0, output_tvl), + + SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume", + TWL4030_REG_EAR_CTL, 4, 3, 0, output_tvl), + /* Common capture gain controls */ SOC_DOUBLE_R_TLV("Capture Volume", TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, |