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author | Dave Airlie <airlied@redhat.com> | 2010-03-31 14:55:14 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2010-03-31 14:55:14 +1000 |
commit | 3595be778d8cb887f0e0575ef0a0c1a094d120bb (patch) | |
tree | 15671ed8bd3597d2efe13aa57b755c66014acb57 /sound/soc/codecs/wm8974.h | |
parent | c414a117c6094c3f86b533f97beaf45ef9075f03 (diff) | |
parent | 220bf991b0366cc50a94feede3d7341fa5710ee4 (diff) |
Merge branch 'v2.6.34-rc2' into drm-linus
Diffstat (limited to 'sound/soc/codecs/wm8974.h')
-rw-r--r-- | sound/soc/codecs/wm8974.h | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/sound/soc/codecs/wm8974.h b/sound/soc/codecs/wm8974.h index 98de9562d4d..896a7f0f3fc 100644 --- a/sound/soc/codecs/wm8974.h +++ b/sound/soc/codecs/wm8974.h @@ -57,17 +57,7 @@ /* Clock divider Id's */ #define WM8974_OPCLKDIV 0 #define WM8974_MCLKDIV 1 -#define WM8974_ADCCLK 2 -#define WM8974_DACCLK 3 -#define WM8974_BCLKDIV 4 - -/* DAC clock dividers */ -#define WM8974_DACCLK_F2 (1 << 3) -#define WM8974_DACCLK_F4 (0 << 3) - -/* ADC clock dividers */ -#define WM8974_ADCCLK_F2 (1 << 3) -#define WM8974_ADCCLK_F4 (0 << 3) +#define WM8974_BCLKDIV 2 /* PLL Out dividers */ #define WM8974_OPCLKDIV_1 (0 << 4) |