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authorjassi brar <jassisinghbrar@gmail.com>2009-09-01 11:35:08 +0900
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-09-01 11:37:41 +0100
commit5c0d38c9478e79ab7deb1b470dd181d2308a608e (patch)
treec0342e0d3614bab54473e59f144d849925a950fb /sound/soc/codecs/wm_hubs.c
parentdce944dbb2d0046628bcdba882e8edc2c1d93200 (diff)
ASoC: Debugged improper setting of PLL fields in WM8580 driver
Bug was caught while trying to use WM8580 as I2S master on SMDK. Symptoms were lesser LRCLK read by CRO(41.02 instead of 44.1 KHz) Solved by referring to WM8580A manual and setting mask value correctly and making the code to not touch 'reserved' bits of PLL4 register. Signed-off-by: Jassi <jassi.brar@samsung.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/wm_hubs.c')
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