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authorPaul Burton <paul.burton@imgtec.com>2014-01-15 10:31:53 +0000
committerRalf Baechle <ralf@linux-mips.org>2014-03-26 23:00:12 +0100
commit0ee958e102b62b418c2fb46c3439d4262067a5fc (patch)
treee69192dc3112657cdde015ea8a43594a41a24d89 /virt/kvm/eventfd.c
parentb86c2247a20f5d8b6f2b3bd0dfd2c9c8c6908b5e (diff)
MIPS: Coherent Processing System SMP implementation
This patch introduces a new SMP implementation for systems implementing the MIPS Coherent Processing System architecture. The kernel will make use of the Coherence Manager, Cluster Power Controller & Global Interrupt Controller in order to detect, bring up & make use of other cores in the system. SMTC is not supported, so only a single TC per VPE in the system is used. That is, this option enables an SMVP style setup but across multiple cores. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6362/ Patchwork: https://patchwork.linux-mips.org/patch/6611/ Patchwork: https://patchwork.linux-mips.org/patch/6651/ Patchwork: https://patchwork.linux-mips.org/patch/6652/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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