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author | Simon Guinot <sguinot@lacie.com> | 2011-07-06 12:41:31 -0400 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-07 16:02:26 +0000 |
commit | 659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5 (patch) | |
tree | a875904f1c457f321563060491956266a57c6514 /virt | |
parent | d30e1521b2afb5e6f21ca8bc1a4b6ec2afc93597 (diff) |
genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd)
This fixes a regression introduced by e59347a "arm: orion:
Use generic irq chip".
Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.
Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().
For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.
Tested on Network Space v2.
Reported-by: Joey Oravec <joravec@drewtech.com>
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'virt')
0 files changed, 0 insertions, 0 deletions