diff options
| -rw-r--r-- | arch/blackfin/kernel/setup.c | 4 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf561/smp.c | 3 |
2 files changed, 2 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 6b09f5cf631..11eff2c3e98 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -105,6 +105,8 @@ void __cpuinit bfin_setup_caches(unsigned int cpu) bfin_dcache_init(dcplb_tbl[cpu]); #endif + bfin_setup_cpudata(cpu); + /* * In cache coherence emulation mode, we need to have the * D-cache enabled before running any atomic operation which @@ -1036,8 +1038,6 @@ void __init setup_arch(char **cmdline_p) static int __init topology_init(void) { unsigned int cpu; - /* Record CPU-private information for the boot processor. */ - bfin_setup_cpudata(0); for_each_possible_cpu(cpu) { register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu); diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index 7b07740cf68..390accf17eb 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c @@ -62,9 +62,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu) bfin_write_SICB_IWR1(IWR_DISABLE_ALL); SSYNC(); - /* Store CPU-private information to the cpu_data array. */ - bfin_setup_cpudata(cpu); - /* We are done with local CPU inits, unblock the boot CPU. */ set_cpu_online(cpu, true); spin_lock(&boot_lock); |