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-rw-r--r--Documentation/devicetree/bindings/clock/imx5-clock.txt2
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c3
2 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.txt b/Documentation/devicetree/bindings/clock/imx5-clock.txt
index 838ab8801e9..84cae1f187c 100644
--- a/Documentation/devicetree/bindings/clock/imx5-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx5-clock.txt
@@ -183,6 +183,8 @@ clocks and IDs.
cko2_sel 168
cko2_podf 169
cko2 170
+ srtc_gate 171
+ pata_gate 172
Examples (for mx53):
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a163e0e365d..efbccc0dcad 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -110,6 +110,7 @@ enum imx5_clks {
owire_gate, gpu3d_s, gpu2d_s, gpu3d_gate, gpu2d_gate, garb_gate,
cko1_sel, cko1_podf, cko1,
cko2_sel, cko2_podf, cko2,
+ srtc_gate, pata_gate,
clk_max
};
@@ -266,6 +267,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
clk[epit2_ipg_gate] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6);
clk[epit2_hf_gate] = imx_clk_gate2("epit2_hf_gate", "per_root", MXC_CCM_CCGR2, 8);
clk[owire_gate] = imx_clk_gate2("owire_gate", "per_root", MXC_CCM_CCGR2, 22);
+ clk[srtc_gate] = imx_clk_gate2("srtc_gate", "per_root", MXC_CCM_CCGR4, 28);
+ clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", MXC_CCM_CCGR4, 0);
for (i = 0; i < ARRAY_SIZE(clk); i++)
if (IS_ERR(clk[i]))