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-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi37
1 files changed, 17 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 1e7a2b060bd..5c5a69954d8 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -24,40 +24,37 @@
};
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
cpu@0 {
compatible = "arm,cortex-a15";
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <1 13 0xf08>;
- clock-frequency = <1000000>;
- };
+ reg = <0>;
};
cpu@1 {
compatible = "arm,cortex-a15";
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <1 14 0xf08>;
- clock-frequency = <1000000>;
- };
+ reg = <1>;
};
cpu@2 {
compatible = "arm,cortex-a15";
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <1 14 0xf08>;
- clock-frequency = <1000000>;
- };
+ reg = <2>;
};
cpu@3 {
compatible = "arm,cortex-a15";
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <1 14 0xf08>;
- clock-frequency = <1000000>;
- };
+ reg = <3>;
};
};
+ timer {
+ compatible = "arm,cortex-a15-timer",
+ "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ clock-frequency = <50000000>;
+ };
+
serial@B0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;