diff options
| -rw-r--r-- | drivers/spi/spi-cadence.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 7b811e38c7a..33f0bec1a7e 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -47,6 +47,7 @@ #define CDNS_SPI_CR_CPHA_MASK 0x00000004 /* Clock Phase Control */ #define CDNS_SPI_CR_CPOL_MASK 0x00000002 /* Clock Polarity Control */ #define CDNS_SPI_CR_SSCTRL_MASK 0x00003C00 /* Slave Select Mask */ +#define CDNS_SPI_CR_PERI_SEL_MASK 0x00000200 /* Peripheral Select Decode */ #define CDNS_SPI_CR_BAUD_DIV_MASK 0x00000038 /* Baud Rate Divisor Mask */ #define CDNS_SPI_CR_MSTREN_MASK 0x00000001 /* Master Enable Mask */ #define CDNS_SPI_CR_MANSTRTEN_MASK 0x00008000 /* Manual TX Enable Mask */ @@ -148,6 +149,11 @@ static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32 val) */ static void cdns_spi_init_hw(struct cdns_spi *xspi) { + u32 ctrl_reg = CDNS_SPI_CR_DEFAULT_MASK; + + if (xspi->is_decoded_cs) + ctrl_reg |= CDNS_SPI_CR_PERI_SEL_MASK; + cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, CDNS_SPI_ER_DISABLE_MASK); cdns_spi_write(xspi, CDNS_SPI_IDR_OFFSET, @@ -160,8 +166,7 @@ static void cdns_spi_init_hw(struct cdns_spi *xspi) cdns_spi_write(xspi, CDNS_SPI_ISR_OFFSET, CDNS_SPI_IXR_ALL_MASK); - cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, - CDNS_SPI_CR_DEFAULT_MASK); + cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, ctrl_reg); cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, CDNS_SPI_ER_ENABLE_MASK); } |