diff options
Diffstat (limited to 'Documentation/devicetree/bindings')
12 files changed, 15 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/arm/ste-u300.txt b/Documentation/devicetree/bindings/arm/ste-u300.txt index 69b5ab0b5f4..d11d80006a1 100644 --- a/Documentation/devicetree/bindings/arm/ste-u300.txt +++ b/Documentation/devicetree/bindings/arm/ste-u300.txt @@ -22,7 +22,7 @@ This contains the board-specific information. - compatible: must be "stericsson,s365". - vana15-supply: the regulator supplying the 1.5V to drive the board. -- syscon: a pointer to the syscon node so we can acccess the +- syscon: a pointer to the syscon node so we can access the syscon registers to set the board as self-powered. Example: diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt b/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt index 9cf3f25544c..5580e9c4bd8 100644 --- a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt +++ b/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt @@ -32,8 +32,8 @@ numbers - see motherboard's TRM for more details. The node describing a config device must refer to the sysreg node via "arm,vexpress,config-bridge" phandle (can be also defined in the node's parent) and relies on the board topology properties - see main vexpress -node documentation for more details. It must must also define the -following property: +node documentation for more details. It must also define the following +property: - arm,vexpress-sysreg,func : must contain two cells: - first cell defines function number (eg. 1 for clock generator, 2 for voltage regulators etc.) diff --git a/Documentation/devicetree/bindings/c6x/dscr.txt b/Documentation/devicetree/bindings/c6x/dscr.txt index d847758f2b2..b0e97144cfb 100644 --- a/Documentation/devicetree/bindings/c6x/dscr.txt +++ b/Documentation/devicetree/bindings/c6x/dscr.txt @@ -5,7 +5,7 @@ TI C6X SoCs contain a region of miscellaneous registers which provide various function for SoC control or status. Details vary considerably among from SoC to SoC with no two being alike. -In general, the Device State Configuraion Registers (DSCR) will provide one or +In general, the Device State Configuration Registers (DSCR) will provide one or more configuration registers often protected by a lock register where one or more key values must be written to a lock register in order to unlock the configuration register for writes. These configuration register may be used to diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt index a1201802f90..75e2e1999f8 100644 --- a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt +++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt @@ -2,7 +2,7 @@ The Samsung Audio Subsystem clock controller generates and supplies clocks to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock -binding described here is applicable to all SoC's in Exynos family. +binding described here is applicable to all SoCs in Exynos family. Required Properties: diff --git a/Documentation/devicetree/bindings/clock/st,nomadik.txt b/Documentation/devicetree/bindings/clock/st,nomadik.txt index 7fc09773de4..40e0cf1f7b9 100644 --- a/Documentation/devicetree/bindings/clock/st,nomadik.txt +++ b/Documentation/devicetree/bindings/clock/st,nomadik.txt @@ -17,7 +17,7 @@ Optional properties for the SRC node: - disable-mxtal: if present this will disable the MXTALO, i.e. the driver output for the main (~19.2 MHz) chrystal, if the board has its own circuitry for providing this - osciallator + oscillator PLL nodes: these nodes represent the two PLLs on the system, diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt index c280a0e6f42..e1f343c7a34 100644 --- a/Documentation/devicetree/bindings/dma/atmel-dma.txt +++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt @@ -18,14 +18,14 @@ dma0: dma@ffffec00 { DMA clients connected to the Atmel DMA controller must use the format described in the dma.txt file, using a three-cell specifier for each channel: -a phandle plus two interger cells. +a phandle plus two integer cells. The three cells in order are: 1. A phandle pointing to the DMA controller. 2. The memory interface (16 most significant bits), the peripheral interface (16 less significant bits). 3. Parameters for the at91 DMA configuration register which are device -dependant: +dependent: - bit 7-0: peripheral identifier for the hardware handshaking interface. The identifier can be different for tx and rx. - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP. diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt index 2717ecb47db..7bd8847d639 100644 --- a/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt +++ b/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt @@ -34,7 +34,7 @@ Clients have to specify the DMA requests with phandles in a list. Required properties: - dmas: List of one or more DMA request specifiers. One DMA request specifier consists of a phandle to the DMA controller followed by the integer - specifiying the request line. + specifying the request line. - dma-names: List of string identifiers for the DMA requests. For the correct names, have a look at the specific client driver. diff --git a/Documentation/devicetree/bindings/dma/ste-dma40.txt b/Documentation/devicetree/bindings/dma/ste-dma40.txt index bea5b73a739..a8c21c256ba 100644 --- a/Documentation/devicetree/bindings/dma/ste-dma40.txt +++ b/Documentation/devicetree/bindings/dma/ste-dma40.txt @@ -37,14 +37,14 @@ Each dmas request consists of 4 cells: 1. A phandle pointing to the DMA controller 2. Device Type 3. The DMA request line number (only when 'use fixed channel' is set) - 4. A 32bit mask specifying; mode, direction and endianess [NB: This list will grow] + 4. A 32bit mask specifying; mode, direction and endianness [NB: This list will grow] 0x00000001: Mode: Logical channel when unset Physical channel when set 0x00000002: Direction: Memory to Device when unset Device to Memory when set - 0x00000004: Endianess: + 0x00000004: Endianness: Little endian when unset Big endian when set 0x00000008: Use fixed channel: diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt index e0e59c58a1f..5f229c5f6da 100644 --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt +++ b/Documentation/devicetree/bindings/mfd/cros-ec.txt @@ -4,7 +4,7 @@ Google's ChromeOS EC is a Cortex-M device which talks to the AP and implements various function such as keyboard and battery charging. The EC can be connect through various means (I2C, SPI, LPC) and the -compatible string used depends on the inteface. Each connection method has +compatible string used depends on the interface. Each connection method has its own driver which connects to the top level interface-agnostic EC driver. Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to the top-level driver. diff --git a/Documentation/devicetree/bindings/net/can/atmel-can.txt b/Documentation/devicetree/bindings/net/can/atmel-can.txt index 72cf0c5daff..14e52a0d86e 100644 --- a/Documentation/devicetree/bindings/net/can/atmel-can.txt +++ b/Documentation/devicetree/bindings/net/can/atmel-can.txt @@ -8,7 +8,7 @@ Required properties: Example: can0: can@f000c000 { - compatbile = "atmel,at91sam9x5-can"; + compatible = "atmel,at91sam9x5-can"; reg = <0xf000c000 0x300>; interrupts = <40 4 5> }; diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt index 648d60eb9fd..7ccae490ff6 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt @@ -37,7 +37,7 @@ Bank: 3 (A, B and C) 0xffffffff 0x7fff3ccf /* pioB */ 0xffffffff 0x007fffff /* pioC */ -For each peripheral/bank we will descibe in a u32 if a pin can can be +For each peripheral/bank we will descibe in a u32 if a pin can be configured in it by putting 1 to the pin bit (1 << pin) Let's take the pioA on peripheral B diff --git a/Documentation/devicetree/bindings/serial/rs485.txt b/Documentation/devicetree/bindings/serial/rs485.txt index 1e753c69fc8..32b1fa1f2a5 100644 --- a/Documentation/devicetree/bindings/serial/rs485.txt +++ b/Documentation/devicetree/bindings/serial/rs485.txt @@ -7,7 +7,7 @@ UART node. Required properties: - rs485-rts-delay: prop-encoded-array <a b> where: - * a is the delay beteween rts signal and beginning of data sent in milliseconds. + * a is the delay between rts signal and beginning of data sent in milliseconds. it corresponds to the delay before sending data. * b is the delay between end of data sent and rts signal in milliseconds it corresponds to the delay after sending data and actual release of the line. |