diff options
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/powerpc/booting-without-of.txt | 177 |
1 files changed, 168 insertions, 9 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index da98154328a..b5e46efeba8 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -1543,7 +1543,7 @@ platforms are moved over to use the flattened-device-tree model. i) Root QE device Required properties: - - device_type : should be "qe"; + - compatible : should be "fsl,qe"; - model : precise model of the QE, Can be "QE", "CPM", or "CPM2" - reg : offset and length of the device registers. - bus-frequency : the clock frequency for QUICC Engine. @@ -1557,8 +1557,7 @@ platforms are moved over to use the flattened-device-tree model. #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; - device_type = "qe"; - model = "QE"; + compatible = "fsl,qe"; ranges = <0 e0100000 00100000>; reg = <e0100000 480>; brg-frequency = <0>; @@ -1569,8 +1568,8 @@ platforms are moved over to use the flattened-device-tree model. ii) SPI (Serial Peripheral Interface) Required properties: - - device_type : should be "spi". - - compatible : should be "fsl_spi". + - cell-index : SPI controller index. + - compatible : should be "fsl,spi". - mode : the SPI operation mode, it can be "cpu" or "cpu-qe". - reg : Offset and length of the register set for the device - interrupts : <a b> where a is the interrupt number and b is a @@ -1583,8 +1582,8 @@ platforms are moved over to use the flattened-device-tree model. Example: spi@4c0 { - device_type = "spi"; - compatible = "fsl_spi"; + cell-index = <0>; + compatible = "fsl,spi"; reg = <4c0 40>; interrupts = <82 0>; interrupt-parent = <700>; @@ -1781,7 +1780,7 @@ platforms are moved over to use the flattened-device-tree model. vii) Multi-User RAM (MURAM) Required properties: - - device_type : should be "muram". + - compatible : should be "fsl,qe-muram", "fsl,cpm-muram". - mode : the could be "host" or "slave". - ranges : Should be defined as specified in 1) to describe the translation of MURAM addresses. @@ -1791,10 +1790,12 @@ platforms are moved over to use the flattened-device-tree model. Example: muram@10000 { - device_type = "muram"; + compatible = "fsl,qe-muram", "fsl,cpm-muram"; ranges = <0 00010000 0000c000>; data-only@0{ + compatible = "fsl,qe-muram-data", + "fsl,cpm-muram-data"; reg = <0 c000>; }; }; @@ -2615,6 +2616,164 @@ platforms are moved over to use the flattened-device-tree model. - clock-frequency : The frequency of the input clock, which typically comes from an on-board dedicated oscillator. + * Freescale 83xx DMA Controller + + Freescale PowerPC 83xx have on chip general purpose DMA controllers. + + Required properties: + + - compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma", where CHIP is the processor + (mpc8349, mpc8360, etc.) and the second is + "fsl,elo-dma" + - reg : <registers mapping for DMA general status reg> + - ranges : Should be defined as specified in 1) to describe the + DMA controller channels. + - cell-index : controller index. 0 for controller @ 0x8100 + - interrupts : <interrupt mapping for DMA IRQ> + - interrupt-parent : optional, if needed for interrupt mapping + + + - DMA channel nodes: + - compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma-channel", where CHIP is the processor + (mpc8349, mpc8350, etc.) and the second is + "fsl,elo-dma-channel" + - reg : <registers mapping for channel> + - cell-index : dma channel index starts at 0. + + Optional properties: + - interrupts : <interrupt mapping for DMA channel IRQ> + (on 83xx this is expected to be identical to + the interrupts property of the parent node) + - interrupt-parent : optional, if needed for interrupt mapping + + Example: + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; + reg = <82a8 4>; + ranges = <0 8100 1a4>; + interrupt-parent = <&ipic>; + interrupts = <47 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <0>; + reg = <0 80>; + }; + dma-channel@80 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <1>; + reg = <80 80>; + }; + dma-channel@100 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <2>; + reg = <100 80>; + }; + dma-channel@180 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <3>; + reg = <180 80>; + }; + }; + + * Freescale 85xx/86xx DMA Controller + + Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. + + Required properties: + + - compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma", where CHIP is the processor + (mpc8540, mpc8540, etc.) and the second is + "fsl,eloplus-dma" + - reg : <registers mapping for DMA general status reg> + - cell-index : controller index. 0 for controller @ 0x21000, + 1 for controller @ 0xc000 + - ranges : Should be defined as specified in 1) to describe the + DMA controller channels. + + - DMA channel nodes: + - compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma-channel", where CHIP is the processor + (mpc8540, mpc8560, etc.) and the second is + "fsl,eloplus-dma-channel" + - cell-index : dma channel index starts at 0. + - reg : <registers mapping for channel> + - interrupts : <interrupt mapping for DMA channel IRQ> + - interrupt-parent : optional, if needed for interrupt mapping + + Example: + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; + reg = <21300 4>; + ranges = <0 21100 200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <0 80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <14 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <80 80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <15 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <100 80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <180 80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <17 2>; + }; + }; + + * Freescale 8xxx/3.0 Gb/s SATA nodes + + SATA nodes are defined to describe on-chip Serial ATA controllers. + Each SATA port should have its own node. + + Required properties: + - compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-sata", where CHIP is the processor + (mpc8315, mpc8379, etc.) and the second is + "fsl,pq-sata" + - interrupts : <interrupt mapping for SATA IRQ> + - cell-index : controller index. + 1 for controller @ 0x18000 + 2 for controller @ 0x19000 + 3 for controller @ 0x1a000 + 4 for controller @ 0x1b000 + + Optional properties: + - interrupt-parent : optional, if needed for interrupt mapping + - reg : <registers mapping> + + Example: + + sata@18000 { + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; + reg = <0x18000 0x1000>; + cell-index = <1>; + interrupts = <2c 8>; + interrupt-parent = < &ipic >; + }; More devices will be defined as this spec matures. |