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-rw-r--r--arch/arm/Kconfig70
1 files changed, 60 insertions, 10 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e39caa8b0c9..a7ed21f0136 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -43,10 +43,6 @@ config SYS_SUPPORTS_APM_EMULATION
config GENERIC_GPIO
bool
-config GENERIC_TIME
- bool
- default y
-
config ARCH_USES_GETTIMEOFFSET
bool
default n
@@ -562,6 +558,18 @@ config ARCH_NUC93X
Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
low-power and high performance MPEG-4/JPEG multimedia controller chip.
+config ARCH_TEGRA
+ bool "NVIDIA Tegra"
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_GPIO
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select ARCH_HAS_BARRIERS if CACHE_L2X0
+ help
+ This enables support for NVIDIA Tegra based systems (Tegra APX,
+ Tegra 6xx and Tegra 2 series).
+
config ARCH_PNX4008
bool "Philips Nexperia PNX4008 Mobile"
select CPU_ARM926T
@@ -636,6 +644,7 @@ config ARCH_S3C2410
select ARCH_HAS_CPUFREQ
select HAVE_CLK
select ARCH_USES_GETTIMEOFFSET
+ select HAVE_S3C2410_I2C
help
Samsung S3C2410X CPU based systems, such as the Simtec Electronics
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
@@ -665,6 +674,8 @@ config ARCH_S3C64XX
select S3C_DEV_NAND
select USB_ARCH_HAS_OHCI
select SAMSUNG_GPIOLIB_4BIT
+ select HAVE_S3C2410_I2C
+ select HAVE_S3C2410_WATCHDOG
help
Samsung S3C64XX series based systems
@@ -673,7 +684,10 @@ config ARCH_S5P6440
select CPU_V6
select GENERIC_GPIO
select HAVE_CLK
+ select HAVE_S3C2410_WATCHDOG
select ARCH_USES_GETTIMEOFFSET
+ select HAVE_S3C2410_I2C
+ select HAVE_S3C_RTC
help
Samsung S5P6440 CPU based systems
@@ -683,6 +697,7 @@ config ARCH_S5P6442
select GENERIC_GPIO
select HAVE_CLK
select ARCH_USES_GETTIMEOFFSET
+ select HAVE_S3C2410_WATCHDOG
help
Samsung S5P6442 CPU based systems
@@ -693,6 +708,9 @@ config ARCH_S5PC100
select CPU_V7
select ARM_L1_CACHE_SHIFT_6
select ARCH_USES_GETTIMEOFFSET
+ select HAVE_S3C2410_I2C
+ select HAVE_S3C_RTC
+ select HAVE_S3C2410_WATCHDOG
help
Samsung S5PC100 series based systems
@@ -703,9 +721,21 @@ config ARCH_S5PV210
select HAVE_CLK
select ARM_L1_CACHE_SHIFT_6
select ARCH_USES_GETTIMEOFFSET
+ select HAVE_S3C2410_I2C
+ select HAVE_S3C_RTC
+ select HAVE_S3C2410_WATCHDOG
help
Samsung S5PV210/S5PC110 series based systems
+config ARCH_S5PV310
+ bool "Samsung S5PV310/S5PC210"
+ select CPU_V7
+ select GENERIC_GPIO
+ select HAVE_CLK
+ select GENERIC_CLOCKEVENTS
+ help
+ Samsung S5PV310 series based systems
+
config ARCH_SHARK
bool "Shark"
select CPU_SA110
@@ -907,10 +937,14 @@ source "arch/arm/mach-s5pc100/Kconfig"
source "arch/arm/mach-s5pv210/Kconfig"
+source "arch/arm/mach-s5pv310/Kconfig"
+
source "arch/arm/mach-shmobile/Kconfig"
source "arch/arm/plat-stmp3xxx/Kconfig"
+source "arch/arm/mach-tegra/Kconfig"
+
source "arch/arm/mach-u300/Kconfig"
source "arch/arm/mach-ux500/Kconfig"
@@ -1030,6 +1064,18 @@ config PL310_ERRATA_588369
is not correctly implemented in PL310 as clean lines are not
invalidated as a result of these operations. Note that this errata
uses Texas Instrument's secure monitor api.
+
+config ARM_ERRATA_720789
+ bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
+ depends on CPU_V7 && SMP
+ help
+ This option enables the workaround for the 720789 Cortex-A9 (prior to
+ r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
+ broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
+ As a consequence of this erratum, some TLB entries which should be
+ invalidated are not, resulting in an incoherency in the system page
+ tables. The workaround changes the TLB flushing routines to invalidate
+ entries regardless of the ASID.
endmenu
source "arch/arm/common/Kconfig"
@@ -1098,10 +1144,11 @@ config SMP
bool "Symmetric Multi-Processing (EXPERIMENTAL)"
depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
- ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
+ ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
depends on GENERIC_CLOCKEVENTS
select USE_GENERIC_SMP_HELPERS
- select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
+ select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
+ ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
help
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
@@ -1171,9 +1218,10 @@ config LOCAL_TIMERS
bool "Use local timer interrupts"
depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
- ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
+ ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
default y
- select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_OMAP4 || ARCH_U8500)
+ select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
+ ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
help
Enable support for local timers on SMP platforms, rather then the
legacy IPI broadcast method. Local timers allows the system
@@ -1184,7 +1232,8 @@ source kernel/Kconfig.preempt
config HZ
int
- default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
+ default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
+ ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
@@ -1573,7 +1622,8 @@ config ZRELADDR
default 0x40008000 if ARCH_STMP378X ||\
ARCH_STMP37XX ||\
ARCH_SH7372 ||\
- ARCH_SH7377
+ ARCH_SH7377 ||\
+ ARCH_S5PV310
default 0x50008000 if ARCH_S3C64XX ||\
ARCH_SH7367
default 0x60008000 if ARCH_VEXPRESS