diff options
Diffstat (limited to 'arch/arm/boot/dts/tegra20-trimslice.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-trimslice.dts | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 0e65c00ec73..17015991045 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -1,6 +1,6 @@ /dts-v1/; -/include/ "tegra20.dtsi" +#include "tegra20.dtsi" / { model = "Compulab TrimSlice board"; @@ -18,7 +18,8 @@ pll-supply = <&hdmi_pll_reg>; nvidia,ddc-i2c-bus = <&hdmi_ddc>; - nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) + GPIO_ACTIVE_HIGH>; }; }; @@ -311,7 +312,7 @@ usb@c5000000 { status = "okay"; - nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */ + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; }; usb-phy@c5000000 { @@ -321,12 +322,14 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */ + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) + GPIO_ACTIVE_LOW>; }; usb-phy@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */ + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) + GPIO_ACTIVE_LOW>; }; usb@c5008000 { @@ -344,8 +347,8 @@ sdhci@c8000600 { status = "okay"; - cd-gpios = <&gpio 121 1>; /* gpio PP1 */ - wp-gpios = <&gpio 122 0>; /* gpio PP2 */ + cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; bus-width = <4>; }; @@ -367,7 +370,7 @@ power { label = "Power"; - gpios = <&gpio 190 1>; /* gpio PX6, active low */ + gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; linux,code = <116>; /* KEY_POWER */ gpio-key,wakeup; }; @@ -375,7 +378,7 @@ poweroff { compatible = "gpio-poweroff"; - gpios = <&gpio 191 1>; /* gpio PX7, active low */ + gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; }; regulators { @@ -416,7 +419,9 @@ nvidia,i2s-controller = <&tegra_i2s1>; nvidia,audio-codec = <&codec>; - clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clocks = <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA20_CLK_CDEV1>; clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; |