diff options
Diffstat (limited to 'arch/arm/boot')
87 files changed, 5838 insertions, 1272 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 11fef62e237..6cecf1437ea 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -119,10 +119,14 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-tx28.dtb dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ + omap3430-sdp.dtb \ omap3-beagle.dtb \ + omap3-devkit8000.dtb \ omap3-beagle-xm.dtb \ omap3-evm.dtb \ omap3-tobi.dtb \ + omap3-igep0020.dtb \ + omap3-igep0030.dtb \ omap4-panda.dtb \ omap4-panda-a4.dtb \ omap4-panda-es.dtb \ diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 11b240c5d32..5302f79c05b 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -43,7 +43,7 @@ status = "okay"; }; - i2c1: i2c@44e0b000 { + i2c0: i2c@44e0b000 { status = "okay"; clock-frequency = <400000>; @@ -59,27 +59,27 @@ led@2 { label = "beaglebone:green:heartbeat"; - gpios = <&gpio2 21 0>; + gpios = <&gpio1 21 0>; linux,default-trigger = "heartbeat"; default-state = "off"; }; led@3 { label = "beaglebone:green:mmc0"; - gpios = <&gpio2 22 0>; + gpios = <&gpio1 22 0>; linux,default-trigger = "mmc0"; default-state = "off"; }; led@4 { label = "beaglebone:green:usr2"; - gpios = <&gpio2 23 0>; + gpios = <&gpio1 23 0>; default-state = "off"; }; led@5 { label = "beaglebone:green:usr3"; - gpios = <&gpio2 24 0>; + gpios = <&gpio1 24 0>; default-state = "off"; }; }; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index d6496440fce..0423298a26f 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -51,7 +51,7 @@ status = "okay"; }; - i2c1: i2c@44e0b000 { + i2c0: i2c@44e0b000 { status = "okay"; clock-frequency = <400000>; @@ -60,7 +60,7 @@ }; }; - i2c2: i2c@4802a000 { + i2c1: i2c@4802a000 { status = "okay"; clock-frequency = <100000>; @@ -123,12 +123,12 @@ debounce-delay-ms = <5>; col-scan-delay-us = <2>; - row-gpios = <&gpio2 25 0 /* Bank1, pin25 */ - &gpio2 26 0 /* Bank1, pin26 */ - &gpio2 27 0>; /* Bank1, pin27 */ + row-gpios = <&gpio1 25 0 /* Bank1, pin25 */ + &gpio1 26 0 /* Bank1, pin26 */ + &gpio1 27 0>; /* Bank1, pin27 */ - col-gpios = <&gpio2 21 0 /* Bank1, pin21 */ - &gpio2 22 0>; /* Bank1, pin22 */ + col-gpios = <&gpio1 21 0 /* Bank1, pin21 */ + &gpio1 22 0>; /* Bank1, pin22 */ linux,keymap = <0x0000008b /* MENU */ 0x0100009e /* BACK */ @@ -147,14 +147,14 @@ switch@9 { label = "volume-up"; linux,code = <115>; - gpios = <&gpio1 2 1>; + gpios = <&gpio0 2 1>; gpio-key,wakeup; }; switch@10 { label = "volume-down"; linux,code = <114>; - gpios = <&gpio1 3 1>; + gpios = <&gpio0 3 1>; gpio-key,wakeup; }; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index f5a6162a4ff..f67c360844f 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -58,7 +58,7 @@ status = "okay"; }; - i2c1: i2c@44e0b000 { + i2c0: i2c@44e0b000 { status = "okay"; clock-frequency = <400000>; @@ -115,26 +115,26 @@ led@1 { label = "evmsk:green:usr0"; - gpios = <&gpio2 4 0>; + gpios = <&gpio1 4 0>; default-state = "off"; }; led@2 { label = "evmsk:green:usr1"; - gpios = <&gpio2 5 0>; + gpios = <&gpio1 5 0>; default-state = "off"; }; led@3 { label = "evmsk:green:mmc0"; - gpios = <&gpio2 6 0>; + gpios = <&gpio1 6 0>; linux,default-trigger = "mmc0"; default-state = "off"; }; led@4 { label = "evmsk:green:heartbeat"; - gpios = <&gpio2 7 0>; + gpios = <&gpio1 7 0>; linux,default-trigger = "heartbeat"; default-state = "off"; }; @@ -148,26 +148,26 @@ switch@1 { label = "button0"; linux,code = <0x100>; - gpios = <&gpio3 3 0>; + gpios = <&gpio2 3 0>; }; switch@2 { label = "button1"; linux,code = <0x101>; - gpios = <&gpio3 2 0>; + gpios = <&gpio2 2 0>; }; switch@3 { label = "button2"; linux,code = <0x102>; - gpios = <&gpio1 30 0>; + gpios = <&gpio0 30 0>; gpio-key,wakeup; }; switch@4 { label = "button3"; linux,code = <0x103>; - gpios = <&gpio3 5 0>; + gpios = <&gpio2 5 0>; }; }; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 0957645b73a..df6283076e7 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -21,6 +21,8 @@ serial3 = &uart4; serial4 = &uart5; serial5 = &uart6; + d_can0 = &dcan0; + d_can1 = &dcan1; }; cpus { @@ -87,7 +89,7 @@ reg = <0x48200000 0x1000>; }; - gpio1: gpio@44e07000 { + gpio0: gpio@44e07000 { compatible = "ti,omap4-gpio"; ti,hwmods = "gpio1"; gpio-controller; @@ -98,7 +100,7 @@ interrupts = <96>; }; - gpio2: gpio@4804c000 { + gpio1: gpio@4804c000 { compatible = "ti,omap4-gpio"; ti,hwmods = "gpio2"; gpio-controller; @@ -109,7 +111,7 @@ interrupts = <98>; }; - gpio3: gpio@481ac000 { + gpio2: gpio@481ac000 { compatible = "ti,omap4-gpio"; ti,hwmods = "gpio3"; gpio-controller; @@ -120,7 +122,7 @@ interrupts = <32>; }; - gpio4: gpio@481ae000 { + gpio3: gpio@481ae000 { compatible = "ti,omap4-gpio"; ti,hwmods = "gpio4"; gpio-controller; @@ -185,7 +187,7 @@ status = "disabled"; }; - i2c1: i2c@44e0b000 { + i2c0: i2c@44e0b000 { compatible = "ti,omap4-i2c"; #address-cells = <1>; #size-cells = <0>; @@ -195,7 +197,7 @@ status = "disabled"; }; - i2c2: i2c@4802a000 { + i2c1: i2c@4802a000 { compatible = "ti,omap4-i2c"; #address-cells = <1>; #size-cells = <0>; @@ -205,7 +207,7 @@ status = "disabled"; }; - i2c3: i2c@4819c000 { + i2c2: i2c@4819c000 { compatible = "ti,omap4-i2c"; #address-cells = <1>; #size-cells = <0>; @@ -225,7 +227,8 @@ dcan0: d_can@481cc000 { compatible = "bosch,d_can"; ti,hwmods = "d_can0"; - reg = <0x481cc000 0x2000>; + reg = <0x481cc000 0x2000 + 0x44e10644 0x4>; interrupts = <52>; status = "disabled"; }; @@ -233,13 +236,14 @@ dcan1: d_can@481d0000 { compatible = "bosch,d_can"; ti,hwmods = "d_can1"; - reg = <0x481d0000 0x2000>; + reg = <0x481d0000 0x2000 + 0x44e10644 0x4>; interrupts = <55>; status = "disabled"; }; timer1: timer@44e31000 { - compatible = "ti,omap2-timer"; + compatible = "ti,am335x-timer-1ms"; reg = <0x44e31000 0x400>; interrupts = <67>; ti,hwmods = "timer1"; @@ -247,21 +251,21 @@ }; timer2: timer@48040000 { - compatible = "ti,omap2-timer"; + compatible = "ti,am335x-timer"; reg = <0x48040000 0x400>; interrupts = <68>; ti,hwmods = "timer2"; }; timer3: timer@48042000 { - compatible = "ti,omap2-timer"; + compatible = "ti,am335x-timer"; reg = <0x48042000 0x400>; interrupts = <69>; ti,hwmods = "timer3"; }; timer4: timer@48044000 { - compatible = "ti,omap2-timer"; + compatible = "ti,am335x-timer"; reg = <0x48044000 0x400>; interrupts = <92>; ti,hwmods = "timer4"; @@ -269,7 +273,7 @@ }; timer5: timer@48046000 { - compatible = "ti,omap2-timer"; + compatible = "ti,am335x-timer"; reg = <0x48046000 0x400>; interrupts = <93>; ti,hwmods = "timer5"; @@ -277,7 +281,7 @@ }; timer6: timer@48048000 { - compatible = "ti,omap2-timer"; + compatible = "ti,am335x-timer"; reg = <0x48048000 0x400>; interrupts = <94>; ti,hwmods = "timer6"; @@ -285,7 +289,7 @@ }; timer7: timer@4804a000 { - compatible = "ti,omap2-timer"; + compatible = "ti,am335x-timer"; reg = <0x4804a000 0x400>; interrupts = <95>; ti,hwmods = "timer7"; @@ -305,7 +309,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x48030000 0x400>; - interrupt = <65>; + interrupts = <65>; ti,spi-num-cs = <2>; ti,hwmods = "spi0"; status = "disabled"; @@ -316,7 +320,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x481a0000 0x400>; - interrupt = <125>; + interrupts = <125>; ti,spi-num-cs = <2>; ti,hwmods = "spi1"; status = "disabled"; diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts index 474f760ecad..e9b5bdae490 100644 --- a/arch/arm/boot/dts/am3517-evm.dts +++ b/arch/arm/boot/dts/am3517-evm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap3.dtsi" +/include/ "omap34xx.dtsi" / { model = "TI AM3517 EVM (AM3517/05)"; diff --git a/arch/arm/boot/dts/am3517_mt_ventoux.dts b/arch/arm/boot/dts/am3517_mt_ventoux.dts index 5eb26d7d9b4..556868388a2 100644 --- a/arch/arm/boot/dts/am3517_mt_ventoux.dts +++ b/arch/arm/boot/dts/am3517_mt_ventoux.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap3.dtsi" +/include/ "omap34xx.dtsi" / { model = "TeeJet Mt.Ventoux"; diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index e34b280ce6e..2353b1f1370 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -30,68 +30,87 @@ }; soc { - serial@d0012000 { - clock-frequency = <200000000>; - status = "okay"; - }; - sata@d00a0000 { - nr-ports = <2>; - status = "okay"; - }; + internal-regs { + serial@12000 { + clock-frequency = <200000000>; + status = "okay"; + }; + sata@a0000 { + nr-ports = <2>; + status = "okay"; + }; - mdio { - phy0: ethernet-phy@0 { - reg = <0>; + mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; }; - phy1: ethernet-phy@1 { - reg = <1>; + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + ethernet@74000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; }; - }; - ethernet@d0070000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - ethernet@d0074000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; + mvsdio@d4000 { + pinctrl-0 = <&sdio_pins1>; + pinctrl-names = "default"; + /* + * This device is disabled by default, because + * using the SD card connector requires + * changing the default CON40 connector + * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a + * different connector + * "DB-88F6710_MPP_RGMII_SD_Jumper". + */ + status = "disabled"; + /* No CD or WP GPIOs */ + }; - mvsdio@d00d4000 { - pinctrl-0 = <&sdio_pins1>; - pinctrl-names = "default"; - /* - * This device is disabled by default, because - * using the SD card connector requires - * changing the default CON40 connector - * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a - * different connector - * "DB-88F6710_MPP_RGMII_SD_Jumper". - */ - status = "disabled"; - /* No CD or WP GPIOs */ - }; + usb@50000 { + status = "okay"; + }; - usb@d0050000 { - status = "okay"; - }; + usb@51000 { + status = "okay"; + }; - usb@d0051000 { - status = "okay"; - }; + spi0: spi@10600 { + status = "okay"; - spi0: spi@d0010600 { - status = "okay"; + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mx25l25635e"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + }; + }; - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mx25l25635e"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <50000000>; + pcie-controller { + status = "okay"; + /* + * The two PCIe units are accessible through + * both standard PCIe slots and mini-PCIe + * slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; }; }; }; diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts index 3234875824d..14e36e19d51 100644 --- a/arch/arm/boot/dts/armada-370-mirabox.dts +++ b/arch/arm/boot/dts/armada-370-mirabox.dts @@ -25,50 +25,116 @@ }; soc { - serial@d0012000 { - clock-frequency = <200000000>; - status = "okay"; - }; - timer@d0020300 { - clock-frequency = <600000000>; - status = "okay"; - }; - mdio { - phy0: ethernet-phy@0 { - reg = <0>; + internal-regs { + serial@12000 { + clock-frequency = <200000000>; + status = "okay"; }; + timer@20300 { + clock-frequency = <600000000>; + status = "okay"; + }; + + pinctrl { + pwr_led_pin: pwr-led-pin { + marvell,pins = "mpp63"; + marvell,function = "gpo"; + }; - phy1: ethernet-phy@1 { - reg = <1>; + stat_led_pins: stat-led-pins { + marvell,pins = "mpp64", "mpp65"; + marvell,function = "gpio"; + }; }; - }; - ethernet@d0070000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - ethernet@d0074000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; - mvsdio@d00d4000 { - pinctrl-0 = <&sdio_pins3>; - pinctrl-names = "default"; - status = "okay"; - /* - * No CD or WP GPIOs: SDIO interface used for - * Wifi/Bluetooth chip - */ - }; + gpio_leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_led_pin &stat_led_pins>; - usb@d0050000 { - status = "okay"; - }; + green_pwr_led { + label = "mirabox:green:pwr"; + gpios = <&gpio1 31 1>; + linux,default-trigger = "heartbeat"; + }; + + blue_stat_led { + label = "mirabox:blue:stat"; + gpios = <&gpio2 0 1>; + linux,default-trigger = "cpu0"; + }; + + green_stat_led { + label = "mirabox:green:stat"; + gpios = <&gpio2 1 1>; + default-state = "off"; + }; + }; + + mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + ethernet@74000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + + mvsdio@d4000 { + pinctrl-0 = <&sdio_pins3>; + pinctrl-names = "default"; + status = "okay"; + /* + * No CD or WP GPIOs: SDIO interface used for + * Wifi/Bluetooth chip + */ + }; + + usb@50000 { + status = "okay"; + }; - usb@d0051000 { - status = "okay"; + usb@51000 { + status = "okay"; + }; + + i2c@11000 { + status = "okay"; + clock-frequency = <100000>; + pca9505: pca9505@25 { + compatible = "nxp,pca9505"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x25>; + }; + }; + + pcie-controller { + status = "okay"; + + /* Internal mini-PCIe connector */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + + /* Connected on the PCB to a USB 3.0 XHCI controller */ + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index 070bba4f258..130f8390a7e 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -28,49 +28,62 @@ }; soc { - serial@d0012000 { - clock-frequency = <200000000>; - status = "okay"; - }; - sata@d00a0000 { - nr-ports = <2>; - status = "okay"; - }; + internal-regs { + serial@12000 { + clock-frequency = <200000000>; + status = "okay"; + }; + sata@a0000 { + nr-ports = <2>; + status = "okay"; + }; - mdio { - phy0: ethernet-phy@0 { - reg = <0>; + mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; }; - phy1: ethernet-phy@1 { - reg = <1>; + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "sgmii"; + }; + ethernet@74000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; }; - }; - ethernet@d0070000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "sgmii"; - }; - ethernet@d0074000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; + mvsdio@d4000 { + pinctrl-0 = <&sdio_pins1>; + pinctrl-names = "default"; + status = "okay"; + /* No CD or WP GPIOs */ + }; - mvsdio@d00d4000 { - pinctrl-0 = <&sdio_pins1>; - pinctrl-names = "default"; - status = "okay"; - /* No CD or WP GPIOs */ - }; + usb@50000 { + status = "okay"; + }; - usb@d0050000 { - status = "okay"; - }; + usb@51000 { + status = "okay"; + }; - usb@d0051000 { - status = "okay"; + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + button@1 { + label = "Software Button"; + linux,code = <116>; + gpios = <&gpio0 6 1>; + }; + }; }; }; -}; + }; diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 5b708208b60..272bbc65fab 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -16,7 +16,7 @@ * 370 and Armada XP SoC. */ -/include/ "skeleton.dtsi" +/include/ "skeleton64.dtsi" / { model = "Marvell Armada 370 and XP SoC"; @@ -28,159 +28,203 @@ }; }; - mpic: interrupt-controller@d0020000 { - compatible = "marvell,mpic"; - #interrupt-cells = <1>; - #size-cells = <1>; - interrupt-controller; - }; - - coherency-fabric@d0020200 { - compatible = "marvell,coherency-fabric"; - reg = <0xd0020200 0xb0>, - <0xd0021810 0x1c>; - }; - soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; interrupt-parent = <&mpic>; - ranges; + ranges = <0 0 0xd0000000 0x100000>; - serial@d0012000 { + internal-regs { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mpic: interrupt-controller@20000 { + compatible = "marvell,mpic"; + #interrupt-cells = <1>; + #size-cells = <1>; + interrupt-controller; + }; + + coherency-fabric@20200 { + compatible = "marvell,coherency-fabric"; + reg = <0x20200 0xb0>, <0x21810 0x1c>; + }; + + serial@12000 { compatible = "snps,dw-apb-uart"; - reg = <0xd0012000 0x100>; + reg = <0x12000 0x100>; reg-shift = <2>; interrupts = <41>; reg-io-width = <1>; status = "disabled"; - }; - serial@d0012100 { + }; + serial@12100 { compatible = "snps,dw-apb-uart"; - reg = <0xd0012100 0x100>; + reg = <0x12100 0x100>; reg-shift = <2>; interrupts = <42>; reg-io-width = <1>; status = "disabled"; - }; - - timer@d0020300 { - compatible = "marvell,armada-370-xp-timer"; - reg = <0xd0020300 0x30>, - <0xd0021040 0x30>; - interrupts = <37>, <38>, <39>, <40>, <5>, <6>; - clocks = <&coreclk 2>; - }; - - addr-decoding@d0020000 { - compatible = "marvell,armada-addr-decoding-controller"; - reg = <0xd0020000 0x258>; - }; - - sata@d00a0000 { - compatible = "marvell,orion-sata"; - reg = <0xd00a0000 0x2400>; - interrupts = <55>; - clocks = <&gateclk 15>, <&gateclk 30>; - clock-names = "0", "1"; - status = "disabled"; - }; + }; + + timer@20300 { + compatible = "marvell,armada-370-xp-timer"; + reg = <0x20300 0x30>, <0x21040 0x30>; + interrupts = <37>, <38>, <39>, <40>, <5>, <6>; + clocks = <&coreclk 2>; + }; + + sata@a0000 { + compatible = "marvell,orion-sata"; + reg = <0xa0000 0x2400>; + interrupts = <55>; + clocks = <&gateclk 15>, <&gateclk 30>; + clock-names = "0", "1"; + status = "disabled"; + }; - mdio { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,orion-mdio"; - reg = <0xd0072004 0x4>; - }; + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,orion-mdio"; + reg = <0x72004 0x4>; + }; - ethernet@d0070000 { + ethernet@70000 { compatible = "marvell,armada-370-neta"; - reg = <0xd0070000 0x2500>; + reg = <0x70000 0x2500>; interrupts = <8>; clocks = <&gateclk 4>; status = "disabled"; - }; + }; - ethernet@d0074000 { + ethernet@74000 { compatible = "marvell,armada-370-neta"; - reg = <0xd0074000 0x2500>; + reg = <0x74000 0x2500>; interrupts = <10>; clocks = <&gateclk 3>; status = "disabled"; - }; - - i2c0: i2c@d0011000 { - compatible = "marvell,mv64xxx-i2c"; - reg = <0xd0011000 0x20>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <31>; - timeout-ms = <1000>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - i2c1: i2c@d0011100 { - compatible = "marvell,mv64xxx-i2c"; - reg = <0xd0011100 0x20>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <32>; - timeout-ms = <1000>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - rtc@10300 { - compatible = "marvell,orion-rtc"; - reg = <0xd0010300 0x20>; - interrupts = <50>; - }; - - mvsdio@d00d4000 { - compatible = "marvell,orion-sdio"; - reg = <0xd00d4000 0x200>; - interrupts = <54>; - clocks = <&gateclk 17>; - status = "disabled"; - }; - - usb@d0050000 { - compatible = "marvell,orion-ehci"; - reg = <0xd0050000 0x500>; - interrupts = <45>; - status = "disabled"; - }; - - usb@d0051000 { - compatible = "marvell,orion-ehci"; - reg = <0xd0051000 0x500>; - interrupts = <46>; - status = "disabled"; - }; + }; + + i2c0: i2c@11000 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x11000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <31>; + timeout-ms = <1000>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + i2c1: i2c@11100 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x11100 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <32>; + timeout-ms = <1000>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + rtc@10300 { + compatible = "marvell,orion-rtc"; + reg = <0x10300 0x20>; + interrupts = <50>; + }; + + mvsdio@d4000 { + compatible = "marvell,orion-sdio"; + reg = <0xd4000 0x200>; + interrupts = <54>; + clocks = <&gateclk 17>; + status = "disabled"; + }; - spi0: spi@d0010600 { - compatible = "marvell,orion-spi"; - reg = <0xd0010600 0x28>; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - interrupts = <30>; - clocks = <&coreclk 0>; - status = "disabled"; - }; + usb@50000 { + compatible = "marvell,orion-ehci"; + reg = <0x50000 0x500>; + interrupts = <45>; + status = "disabled"; + }; - spi1: spi@d0010680 { - compatible = "marvell,orion-spi"; - reg = <0xd0010680 0x28>; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - interrupts = <92>; - clocks = <&coreclk 0>; - status = "disabled"; + usb@51000 { + compatible = "marvell,orion-ehci"; + reg = <0x51000 0x500>; + interrupts = <46>; + status = "disabled"; + }; + + spi0: spi@10600 { + compatible = "marvell,orion-spi"; + reg = <0x10600 0x28>; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + interrupts = <30>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + spi1: spi@10680 { + compatible = "marvell,orion-spi"; + reg = <0x10680 0x28>; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + interrupts = <92>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-bootcs@10400 { + compatible = "marvell,mvebu-devbus"; + reg = <0x10400 0x8>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs0@10408 { + compatible = "marvell,mvebu-devbus"; + reg = <0x10408 0x8>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs1@10410 { + compatible = "marvell,mvebu-devbus"; + reg = <0x10410 0x8>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs2@10418 { + compatible = "marvell,mvebu-devbus"; + reg = <0x10418 0x8>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs3@10420 { + compatible = "marvell,mvebu-devbus"; + reg = <0x10420 0x8>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; }; }; -}; - + }; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index a195debb67d..b2c1b5af974 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -16,16 +16,11 @@ */ /include/ "armada-370-xp.dtsi" +/include/ "skeleton.dtsi" / { model = "Marvell Armada 370 family SoC"; compatible = "marvell,armada370", "marvell,armada-370-xp"; - L2: l2-cache { - compatible = "marvell,aurora-outer-cache"; - reg = <0xd0008000 0x1000>; - cache-id-part = <0x100>; - wt-override; - }; aliases { gpio0 = &gpio0; @@ -33,131 +28,198 @@ gpio2 = &gpio2; }; - mpic: interrupt-controller@d0020000 { - reg = <0xd0020a00 0x1d0>, - <0xd0021870 0x58>; - }; - soc { - system-controller@d0018200 { + ranges = <0 0xd0000000 0x100000>; + internal-regs { + system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; - reg = <0xd0018200 0x100>; - }; - - pinctrl { - compatible = "marvell,mv88f6710-pinctrl"; - reg = <0xd0018000 0x38>; - - sdio_pins1: sdio-pins1 { - marvell,pins = "mpp9", "mpp11", "mpp12", - "mpp13", "mpp14", "mpp15"; - marvell,function = "sd0"; + reg = <0x18200 0x100>; }; - sdio_pins2: sdio-pins2 { - marvell,pins = "mpp47", "mpp48", "mpp49", - "mpp50", "mpp51", "mpp52"; - marvell,function = "sd0"; + L2: l2-cache { + compatible = "marvell,aurora-outer-cache"; + reg = <0xd0008000 0x1000>; + cache-id-part = <0x100>; + wt-override; }; - sdio_pins3: sdio-pins3 { - marvell,pins = "mpp48", "mpp49", "mpp50", - "mpp51", "mpp52", "mpp53"; - marvell,function = "sd0"; + mpic: interrupt-controller@20000 { + reg = <0x20a00 0x1d0>, <0x21870 0x58>; }; - }; - - gpio0: gpio@d0018100 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018100 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; - }; - gpio1: gpio@d0018140 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018140 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; - }; + pinctrl { + compatible = "marvell,mv88f6710-pinctrl"; + reg = <0x18000 0x38>; + + sdio_pins1: sdio-pins1 { + marvell,pins = "mpp9", "mpp11", "mpp12", + "mpp13", "mpp14", "mpp15"; + marvell,function = "sd0"; + }; + + sdio_pins2: sdio-pins2 { + marvell,pins = "mpp47", "mpp48", "mpp49", + "mpp50", "mpp51", "mpp52"; + marvell,function = "sd0"; + }; + + sdio_pins3: sdio-pins3 { + marvell,pins = "mpp48", "mpp49", "mpp50", + "mpp51", "mpp52", "mpp53"; + marvell,function = "sd0"; + }; + }; - gpio2: gpio@d0018180 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018180 0x40>; - ngpios = <2>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <91>; - }; + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; + reg = <0x18100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; + }; - coreclk: mvebu-sar@d0018230 { - compatible = "marvell,armada-370-core-clock"; - reg = <0xd0018230 0x08>; - #clock-cells = <1>; - }; + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; + reg = <0x18140 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <87>, <88>, <89>, <90>; + }; - gateclk: clock-gating-control@d0018220 { - compatible = "marvell,armada-370-gating-clock"; - reg = <0xd0018220 0x4>; - clocks = <&coreclk 0>; - #clock-cells = <1>; - }; + gpio2: gpio@18180 { + compatible = "marvell,orion-gpio"; + reg = <0x18180 0x40>; + ngpios = <2>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <91>; + }; - xor@d0060800 { - compatible = "marvell,orion-xor"; - reg = <0xd0060800 0x100 - 0xd0060A00 0x100>; - status = "okay"; + coreclk: mvebu-sar@18230 { + compatible = "marvell,armada-370-core-clock"; + reg = <0x18230 0x08>; + #clock-cells = <1>; + }; - xor00 { - interrupts = <51>; - dmacap,memcpy; - dmacap,xor; + gateclk: clock-gating-control@18220 { + compatible = "marvell,armada-370-gating-clock"; + reg = <0x18220 0x4>; + clocks = <&coreclk 0>; + #clock-cells = <1>; }; - xor01 { - interrupts = <52>; - dmacap,memcpy; - dmacap,xor; - dmacap,memset; + + xor@60800 { + compatible = "marvell,orion-xor"; + reg = <0x60800 0x100 + 0x60A00 0x100>; + status = "okay"; + + xor00 { + interrupts = <51>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <52>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; }; - }; - xor@d0060900 { - compatible = "marvell,orion-xor"; - reg = <0xd0060900 0x100 - 0xd0060b00 0x100>; - status = "okay"; + xor@60900 { + compatible = "marvell,orion-xor"; + reg = <0x60900 0x100 + 0x60b00 0x100>; + status = "okay"; + + xor10 { + interrupts = <94>; + dmacap,memcpy; + dmacap,xor; + }; + xor11 { + interrupts = <95>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; - xor10 { - interrupts = <94>; - dmacap,memcpy; - dmacap,xor; + usb@50000 { + clocks = <&coreclk 0>; }; - xor11 { - interrupts = <95>; - dmacap,memcpy; - dmacap,xor; - dmacap,memset; + + usb@51000 { + clocks = <&coreclk 0>; }; - }; - usb@d0050000 { - clocks = <&coreclk 0>; - }; + thermal@18300 { + compatible = "marvell,armada370-thermal"; + reg = <0x18300 0x4 + 0x18304 0x4>; + status = "okay"; + }; - usb@d0051000 { - clocks = <&coreclk 0>; + pcie-controller { + compatible = "marvell,armada-370-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + + reg = <0x40000 0x2000>, <0x80000 0x2000>; + + reg-names = "pcie0.0", "pcie1.0"; + + ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */ + 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ + 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ + + pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 58>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 5>; + status = "disabled"; + }; + + pcie@2,0 { + device_type = "pci"; + assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 62>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 9>; + status = "disabled"; + }; + }; }; - }; }; diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index e83505e4c23..d6cc8bf8272 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -26,99 +26,134 @@ memory { device_type = "memory"; - reg = <0x00000000 0x80000000>; /* 2 GB */ + reg = <0 0x00000000 0 0x80000000>; /* 2 GB */ }; soc { - serial@d0012000 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@d0012100 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@d0012200 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@d0012300 { - clock-frequency = <250000000>; - status = "okay"; - }; - - sata@d00a0000 { - nr-ports = <2>; - status = "okay"; - }; - - mdio { - phy0: ethernet-phy@0 { - reg = <0>; + internal-regs { + serial@12000 { + clock-frequency = <250000000>; + status = "okay"; + }; + serial@12100 { + clock-frequency = <250000000>; + status = "okay"; + }; + serial@12200 { + clock-frequency = <250000000>; + status = "okay"; + }; + serial@12300 { + clock-frequency = <250000000>; + status = "okay"; }; - phy1: ethernet-phy@1 { - reg = <1>; + sata@a0000 { + nr-ports = <2>; + status = "okay"; }; - phy2: ethernet-phy@2 { - reg = <25>; + mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + + phy2: ethernet-phy@2 { + reg = <25>; + }; + + phy3: ethernet-phy@3 { + reg = <27>; + }; }; - phy3: ethernet-phy@3 { - reg = <27>; + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + ethernet@74000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + ethernet@30000 { + status = "okay"; + phy = <&phy2>; + phy-mode = "sgmii"; + }; + ethernet@34000 { + status = "okay"; + phy = <&phy3>; + phy-mode = "sgmii"; }; - }; - ethernet@d0070000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - ethernet@d0074000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; - ethernet@d0030000 { - status = "okay"; - phy = <&phy2>; - phy-mode = "sgmii"; - }; - ethernet@d0034000 { - status = "okay"; - phy = <&phy3>; - phy-mode = "sgmii"; - }; + mvsdio@d4000 { + pinctrl-0 = <&sdio_pins>; + pinctrl-names = "default"; + status = "okay"; + /* No CD or WP GPIOs */ + }; - mvsdio@d00d4000 { - pinctrl-0 = <&sdio_pins>; - pinctrl-names = "default"; - status = "okay"; - /* No CD or WP GPIOs */ - }; + usb@50000 { + status = "okay"; + }; - usb@d0050000 { - status = "okay"; - }; + usb@51000 { + status = "okay"; + }; - usb@d0051000 { - status = "okay"; - }; + usb@52000 { + status = "okay"; + }; - usb@d0052000 { - status = "okay"; - }; + spi0: spi@10600 { + status = "okay"; - spi0: spi@d0010600 { - status = "okay"; + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p64"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <20000000>; + }; + }; - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "m25p64"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <20000000>; + pcie-controller { + status = "okay"; + + /* + * All 6 slots are physically present as + * standard PCIe slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + pcie@2,0 { + /* Port 0, Lane 1 */ + status = "okay"; + }; + pcie@3,0 { + /* Port 0, Lane 2 */ + status = "okay"; + }; + pcie@4,0 { + /* Port 0, Lane 3 */ + status = "okay"; + }; + pcie@9,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + pcie@10,0 { + /* Port 3, Lane 0 */ + status = "okay"; + }; }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index 1c8afe2ffeb..26ad06fc147 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -26,87 +26,141 @@ memory { device_type = "memory"; - /* - * 4 GB of plug-in RAM modules by default but only 3GB - * are visible, the amount of memory available can be - * changed by the bootloader according the size of the - * module actually plugged + * 8 GB of plug-in RAM modules by default.The amount + * of memory available can be changed by the + * bootloader according the size of the module + * actually plugged. Only 7GB are usable because + * addresses from 0xC0000000 to 0xffffffff are used by + * the internal registers of the SoC. */ - reg = <0x00000000 0xC0000000>; + reg = <0x00000000 0x00000000 0x00000000 0xC0000000>, + <0x00000001 0x00000000 0x00000001 0x00000000>; }; soc { - serial@d0012000 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@d0012100 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@d0012200 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@d0012300 { - clock-frequency = <250000000>; - status = "okay"; - }; - - sata@d00a0000 { - nr-ports = <2>; - status = "okay"; - }; + internal-regs { + serial@12000 { + clock-frequency = <250000000>; + status = "okay"; + }; + serial@12100 { + clock-frequency = <250000000>; + status = "okay"; + }; + serial@12200 { + clock-frequency = <250000000>; + status = "okay"; + }; + serial@12300 { + clock-frequency = <250000000>; + status = "okay"; + }; - mdio { - phy0: ethernet-phy@0 { - reg = <16>; + sata@a0000 { + nr-ports = <2>; + status = "okay"; }; - phy1: ethernet-phy@1 { - reg = <17>; + mdio { + phy0: ethernet-phy@0 { + reg = <16>; + }; + + phy1: ethernet-phy@1 { + reg = <17>; + }; + + phy2: ethernet-phy@2 { + reg = <18>; + }; + + phy3: ethernet-phy@3 { + reg = <19>; + }; }; - phy2: ethernet-phy@2 { - reg = <18>; + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; }; + ethernet@74000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + ethernet@30000 { + status = "okay"; + phy = <&phy2>; + phy-mode = "rgmii-id"; + }; + ethernet@34000 { + status = "okay"; + phy = <&phy3>; + phy-mode = "rgmii-id"; + }; + + spi0: spi@10600 { + status = "okay"; - phy3: ethernet-phy@3 { - reg = <19>; + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q128a13"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + }; }; - }; - ethernet@d0070000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - ethernet@d0074000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; - ethernet@d0030000 { - status = "okay"; - phy = <&phy2>; - phy-mode = "rgmii-id"; - }; - ethernet@d0034000 { - status = "okay"; - phy = <&phy3>; - phy-mode = "rgmii-id"; - }; + devbus-bootcs@10400 { + status = "okay"; + ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */ + + /* Device Bus parameters are required */ + + /* Read parameters */ + devbus,bus-width = <8>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; + + /* NOR 16 MiB */ + nor@0 { + compatible = "cfi-flash"; + reg = <0 0x1000000>; + bank-width = <2>; + }; + }; - spi0: spi@d0010600 { - status = "okay"; + pcie-controller { + status = "okay"; - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "n25q128a13"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; + /* + * The 3 slots are physically present as + * standard PCIe slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + pcie@9,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + pcie@10,0 { + /* Port 3, Lane 0 */ + status = "okay"; + }; }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index f56c40599f5..f8eaa383e07 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -25,56 +25,162 @@ }; cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <0>; - clocks = <&cpuclk 0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <1>; - clocks = <&cpuclk 1>; - }; + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <0>; + clocks = <&cpuclk 0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <1>; + clocks = <&cpuclk 1>; + }; }; soc { - pinctrl { - compatible = "marvell,mv78230-pinctrl"; - reg = <0xd0018000 0x38>; - - sdio_pins: sdio-pins { - marvell,pins = "mpp30", "mpp31", "mpp32", - "mpp33", "mpp34", "mpp35"; - marvell,function = "sd0"; + internal-regs { + pinctrl { + compatible = "marvell,mv78230-pinctrl"; + reg = <0x18000 0x38>; + + sdio_pins: sdio-pins { + marvell,pins = "mpp30", "mpp31", "mpp32", + "mpp33", "mpp34", "mpp35"; + marvell,function = "sd0"; + }; }; - }; - gpio0: gpio@d0018100 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018100 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; - }; + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; + reg = <0x18100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; + }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; + reg = <0x18140 0x40>; + ngpios = <17>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <87>, <88>, <89>; + }; - gpio1: gpio@d0018140 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018140 0x40>; - ngpios = <17>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <87>, <88>, <89>; + /* + * MV78230 has 2 PCIe units Gen2.0: One unit can be + * configured as x4 or quad x1 lanes. One unit is + * x4/x1. + */ + pcie-controller { + compatible = "marvell,armada-xp-pcie"; + status = "disabled"; + device_type = "pci"; + +#address-cells = <3>; +#size-cells = <2>; + + bus-range = <0x00 0xff>; + + ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */ + 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */ + 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */ + 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */ + 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ + 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ + + pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 58>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 5>; + status = "disabled"; + }; + + pcie@2,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 59>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <1>; + clocks = <&gateclk 6>; + status = "disabled"; + }; + + pcie@3,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; + reg = <0x1800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 60>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <2>; + clocks = <&gateclk 7>; + status = "disabled"; + }; + + pcie@4,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>; + reg = <0x2000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 61>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <3>; + clocks = <&gateclk 8>; + status = "disabled"; + }; + + pcie@9,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; + reg = <0x4800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 99>; + marvell,pcie-port = <2>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 26>; + status = "disabled"; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index f8f2b787d2b..f4029f015af 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -26,75 +26,199 @@ }; cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <0>; - clocks = <&cpuclk 0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <1>; - clocks = <&cpuclk 1>; - }; + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <0>; + clocks = <&cpuclk 0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <1>; + clocks = <&cpuclk 1>; + }; }; soc { - pinctrl { - compatible = "marvell,mv78260-pinctrl"; - reg = <0xd0018000 0x38>; - - sdio_pins: sdio-pins { - marvell,pins = "mpp30", "mpp31", "mpp32", - "mpp33", "mpp34", "mpp35"; - marvell,function = "sd0"; + internal-regs { + pinctrl { + compatible = "marvell,mv78260-pinctrl"; + reg = <0x18000 0x38>; + + sdio_pins: sdio-pins { + marvell,pins = "mpp30", "mpp31", "mpp32", + "mpp33", "mpp34", "mpp35"; + marvell,function = "sd0"; + }; }; - }; - gpio0: gpio@d0018100 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018100 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; - }; + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; + reg = <0x18100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; + }; - gpio1: gpio@d0018140 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018140 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; - }; + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; + reg = <0x18140 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <87>, <88>, <89>, <90>; + }; - gpio2: gpio@d0018180 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018180 0x40>; - ngpios = <3>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <91>; - }; + gpio2: gpio@18180 { + compatible = "marvell,orion-gpio"; + reg = <0x18180 0x40>; + ngpios = <3>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <91>; + }; - ethernet@d0034000 { + ethernet@34000 { compatible = "marvell,armada-370-neta"; - reg = <0xd0034000 0x2500>; + reg = <0x34000 0x2500>; interrupts = <14>; clocks = <&gateclk 1>; status = "disabled"; + }; + + /* + * MV78260 has 3 PCIe units Gen2.0: Two units can be + * configured as x4 or quad x1 lanes. One unit is + * x4/x1. + */ + pcie-controller { + compatible = "marvell,armada-xp-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + + ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */ + 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */ + 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */ + 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */ + 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */ + 0x82000000 0 0x82000 0x82000 0 0x00002000 /* Port 3.0 registers */ + 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ + 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ + + pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 58>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 5>; + status = "disabled"; + }; + + pcie@2,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 59>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <1>; + clocks = <&gateclk 6>; + status = "disabled"; + }; + + pcie@3,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; + reg = <0x1800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 60>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <2>; + clocks = <&gateclk 7>; + status = "disabled"; + }; + + pcie@4,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>; + reg = <0x2000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 61>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <3>; + clocks = <&gateclk 8>; + status = "disabled"; + }; + + pcie@9,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; + reg = <0x4800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 99>; + marvell,pcie-port = <2>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 26>; + status = "disabled"; + }; + + pcie@10,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x82000 0 0x2000>; + reg = <0x5000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 103>; + marvell,pcie-port = <3>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 27>; + status = "disabled"; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 936c25dc32b..6ab56bd35de 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -27,89 +27,279 @@ cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <0>; - clocks = <&cpuclk 0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <1>; - clocks = <&cpuclk 1>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <2>; - clocks = <&cpuclk 2>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "marvell,sheeva-v7"; - reg = <3>; - clocks = <&cpuclk 3>; - }; - }; + #address-cells = <1>; + #size-cells = <0>; - soc { - pinctrl { - compatible = "marvell,mv78460-pinctrl"; - reg = <0xd0018000 0x38>; - - sdio_pins: sdio-pins { - marvell,pins = "mpp30", "mpp31", "mpp32", - "mpp33", "mpp34", "mpp35"; - marvell,function = "sd0"; - }; + cpu@0 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <0>; + clocks = <&cpuclk 0>; }; - gpio0: gpio@d0018100 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018100 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; + cpu@1 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <1>; + clocks = <&cpuclk 1>; }; - gpio1: gpio@d0018140 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018140 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; + cpu@2 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <2>; + clocks = <&cpuclk 2>; }; - gpio2: gpio@d0018180 { - compatible = "marvell,orion-gpio"; - reg = <0xd0018180 0x40>; - ngpios = <3>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupts-cells = <2>; - interrupts = <91>; + cpu@3 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <3>; + clocks = <&cpuclk 3>; }; + }; + + soc { + internal-regs { + pinctrl { + compatible = "marvell,mv78460-pinctrl"; + reg = <0x18000 0x38>; + + sdio_pins: sdio-pins { + marvell,pins = "mpp30", "mpp31", "mpp32", + "mpp33", "mpp34", "mpp35"; + marvell,function = "sd0"; + }; + }; - ethernet@d0034000 { + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; + reg = <0x18100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; + }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; + reg = <0x18140 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <87>, <88>, <89>, <90>; + }; + + gpio2: gpio@18180 { + compatible = "marvell,orion-gpio"; + reg = <0x18180 0x40>; + ngpios = <3>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; + interrupts = <91>; + }; + + ethernet@34000 { compatible = "marvell,armada-370-neta"; - reg = <0xd0034000 0x2500>; + reg = <0x34000 0x2500>; interrupts = <14>; clocks = <&gateclk 1>; status = "disabled"; + }; + + /* + * MV78460 has 4 PCIe units Gen2.0: Two units can be + * configured as x4 or quad x1 lanes. Two units are + * x4/x1. + */ + pcie-controller { + compatible = "marvell,armada-xp-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + + ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */ + 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */ + 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */ + 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */ + 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */ + 0x82000000 0 0x82000 0x82000 0 0x00002000 /* Port 3.0 registers */ + 0x82000000 0 0x84000 0x84000 0 0x00002000 /* Port 1.1 registers */ + 0x82000000 0 0x88000 0x88000 0 0x00002000 /* Port 1.2 registers */ + 0x82000000 0 0x8c000 0x8c000 0 0x00002000 /* Port 1.3 registers */ + 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ + 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ + + pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 58>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 5>; + status = "disabled"; + }; + + pcie@2,0 { + device_type = "pci"; + assigned-addresses = <0x82001000 0 0x44000 0 0x2000>; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 59>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <1>; + clocks = <&gateclk 6>; + status = "disabled"; + }; + + pcie@3,0 { + device_type = "pci"; + assigned-addresses = <0x82001800 0 0x48000 0 0x2000>; + reg = <0x1800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 60>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <2>; + clocks = <&gateclk 7>; + status = "disabled"; + }; + + pcie@4,0 { + device_type = "pci"; + assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>; + reg = <0x2000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 61>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <3>; + clocks = <&gateclk 8>; + status = "disabled"; + }; + + pcie@5,0 { + device_type = "pci"; + assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; + reg = <0x2800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 62>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 9>; + status = "disabled"; + }; + + pcie@6,0 { + device_type = "pci"; + assigned-addresses = <0x82003000 0 0x84000 0 0x2000>; + reg = <0x3000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 63>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <1>; + clocks = <&gateclk 10>; + status = "disabled"; + }; + + pcie@7,0 { + device_type = "pci"; + assigned-addresses = <0x82003800 0 0x88000 0 0x2000>; + reg = <0x3800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 64>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <2>; + clocks = <&gateclk 11>; + status = "disabled"; + }; + + pcie@8,0 { + device_type = "pci"; + assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>; + reg = <0x4000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 65>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <3>; + clocks = <&gateclk 12>; + status = "disabled"; + }; + pcie@9,0 { + device_type = "pci"; + assigned-addresses = <0x82004800 0 0x42000 0 0x2000>; + reg = <0x4800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 99>; + marvell,pcie-port = <2>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 26>; + status = "disabled"; + }; + + pcie@10,0 { + device_type = "pci"; + assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; + reg = <0x5000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 103>; + marvell,pcie-port = <3>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 27>; + status = "disabled"; + }; + }; }; }; - }; +}; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 3818a82176a..f14d36c4615 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -23,121 +23,161 @@ memory { device_type = "memory"; - reg = <0x00000000 0xC0000000>; /* 3 GB */ + reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */ }; soc { - serial@d0012000 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@d0012100 { - clock-frequency = <250000000>; - status = "okay"; - }; - pinctrl { - led_pins: led-pins-0 { - marvell,pins = "mpp49", "mpp51", "mpp53"; - marvell,function = "gpio"; + internal-regs { + serial@12000 { + clock-frequency = <250000000>; + status = "okay"; }; - }; - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins>; - - red_led { - label = "red_led"; - gpios = <&gpio1 17 1>; - default-state = "off"; + serial@12100 { + clock-frequency = <250000000>; + status = "okay"; }; - - yellow_led { - label = "yellow_led"; - gpios = <&gpio1 19 1>; - default-state = "off"; + pinctrl { + led_pins: led-pins-0 { + marvell,pins = "mpp49", "mpp51", "mpp53"; + marvell,function = "gpio"; + }; }; - - green_led { - label = "green_led"; - gpios = <&gpio1 21 1>; - default-state = "off"; - linux,default-trigger = "heartbeat"; + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + red_led { + label = "red_led"; + gpios = <&gpio1 17 1>; + default-state = "off"; + }; + + yellow_led { + label = "yellow_led"; + gpios = <&gpio1 19 1>; + default-state = "off"; + }; + + green_led { + label = "green_led"; + gpios = <&gpio1 21 1>; + default-state = "off"; + linux,default-trigger = "heartbeat"; + }; }; - }; - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; - button@1 { - label = "Init Button"; - linux,code = <116>; - gpios = <&gpio1 28 0>; + button@1 { + label = "Init Button"; + linux,code = <116>; + gpios = <&gpio1 28 0>; + }; }; - }; - mdio { - phy0: ethernet-phy@0 { - reg = <0>; - }; + mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; - phy1: ethernet-phy@1 { - reg = <1>; - }; + phy1: ethernet-phy@1 { + reg = <1>; + }; - phy2: ethernet-phy@2 { - reg = <2>; + phy2: ethernet-phy@2 { + reg = <2>; + }; + + phy3: ethernet-phy@3 { + reg = <3>; + }; }; - phy3: ethernet-phy@3 { - reg = <3>; + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "sgmii"; + }; + ethernet@74000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; + }; + ethernet@30000 { + status = "okay"; + phy = <&phy2>; + phy-mode = "sgmii"; + }; + ethernet@34000 { + status = "okay"; + phy = <&phy3>; + phy-mode = "sgmii"; + }; + i2c@11000 { + status = "okay"; + clock-frequency = <400000>; + }; + i2c@11100 { + status = "okay"; + clock-frequency = <400000>; + + s35390a: s35390a@30 { + compatible = "s35390a"; + reg = <0x30>; + }; + }; + sata@a0000 { + nr-ports = <2>; + status = "okay"; + }; + usb@50000 { + status = "okay"; + }; + usb@51000 { + status = "okay"; }; - }; - ethernet@d0070000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "sgmii"; - }; - ethernet@d0074000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "sgmii"; - }; - ethernet@d0030000 { - status = "okay"; - phy = <&phy2>; - phy-mode = "sgmii"; - }; - ethernet@d0034000 { - status = "okay"; - phy = <&phy3>; - phy-mode = "sgmii"; - }; - i2c@d0011000 { - status = "okay"; - clock-frequency = <400000>; - }; - i2c@d0011100 { - status = "okay"; - clock-frequency = <400000>; + devbus-bootcs@10400 { + status = "okay"; + ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */ + + /* Device Bus parameters are required */ + + /* Read parameters */ + devbus,bus-width = <8>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; + + /* NOR 128 MiB */ + nor@0 { + compatible = "cfi-flash"; + reg = <0 0x8000000>; + bank-width = <2>; + }; + }; - s35390a: s35390a@30 { - compatible = "s35390a"; - reg = <0x30>; + pcie-controller { + status = "okay"; + /* Internal mini-PCIe connector */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; }; }; - sata@d00a0000 { - nr-ports = <2>; - status = "okay"; - }; - usb@d0050000 { - status = "okay"; - }; - usb@d0051000 { - status = "okay"; - }; }; }; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index ca00d8326c8..bacab11c10d 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -22,134 +22,140 @@ model = "Marvell Armada XP family SoC"; compatible = "marvell,armadaxp", "marvell,armada-370-xp"; - L2: l2-cache { - compatible = "marvell,aurora-system-cache"; - reg = <0xd0008000 0x1000>; - cache-id-part = <0x100>; - wt-override; - }; + soc { + internal-regs { + L2: l2-cache { + compatible = "marvell,aurora-system-cache"; + reg = <0x08000 0x1000>; + cache-id-part = <0x100>; + wt-override; + }; - mpic: interrupt-controller@d0020000 { - reg = <0xd0020a00 0x2d0>, - <0xd0021070 0x58>; - }; + mpic: interrupt-controller@20000 { + reg = <0x20a00 0x2d0>, <0x21070 0x58>; + }; - armada-370-xp-pmsu@d0022000 { - compatible = "marvell,armada-370-xp-pmsu"; - reg = <0xd0022100 0x430>, - <0xd0020800 0x20>; - }; + armada-370-xp-pmsu@22000 { + compatible = "marvell,armada-370-xp-pmsu"; + reg = <0x22100 0x430>, <0x20800 0x20>; + }; - soc { - serial@d0012200 { + serial@12200 { compatible = "snps,dw-apb-uart"; - reg = <0xd0012200 0x100>; + reg = <0x12200 0x100>; reg-shift = <2>; interrupts = <43>; reg-io-width = <1>; status = "disabled"; - }; - serial@d0012300 { + }; + serial@12300 { compatible = "snps,dw-apb-uart"; - reg = <0xd0012300 0x100>; + reg = <0x12300 0x100>; reg-shift = <2>; interrupts = <44>; reg-io-width = <1>; status = "disabled"; - }; + }; - timer@d0020300 { + timer@20300 { marvell,timer-25Mhz; - }; + }; - coreclk: mvebu-sar@d0018230 { - compatible = "marvell,armada-xp-core-clock"; - reg = <0xd0018230 0x08>; - #clock-cells = <1>; - }; + coreclk: mvebu-sar@18230 { + compatible = "marvell,armada-xp-core-clock"; + reg = <0x18230 0x08>; + #clock-cells = <1>; + }; - cpuclk: clock-complex@d0018700 { - #clock-cells = <1>; - compatible = "marvell,armada-xp-cpu-clock"; - reg = <0xd0018700 0xA0>; - clocks = <&coreclk 1>; - }; + cpuclk: clock-complex@18700 { + #clock-cells = <1>; + compatible = "marvell,armada-xp-cpu-clock"; + reg = <0x18700 0xA0>; + clocks = <&coreclk 1>; + }; - gateclk: clock-gating-control@d0018220 { - compatible = "marvell,armada-xp-gating-clock"; - reg = <0xd0018220 0x4>; - clocks = <&coreclk 0>; - #clock-cells = <1>; - }; + gateclk: clock-gating-control@18220 { + compatible = "marvell,armada-xp-gating-clock"; + reg = <0x18220 0x4>; + clocks = <&coreclk 0>; + #clock-cells = <1>; + }; - system-controller@d0018200 { + system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; - reg = <0xd0018200 0x500>; - }; + reg = <0x18200 0x500>; + }; - ethernet@d0030000 { + ethernet@30000 { compatible = "marvell,armada-370-neta"; - reg = <0xd0030000 0x2500>; + reg = <0x30000 0x2500>; interrupts = <12>; clocks = <&gateclk 2>; status = "disabled"; - }; - - xor@d0060900 { - compatible = "marvell,orion-xor"; - reg = <0xd0060900 0x100 - 0xd0060b00 0x100>; - clocks = <&gateclk 22>; - status = "okay"; - - xor10 { - interrupts = <51>; - dmacap,memcpy; - dmacap,xor; - }; - xor11 { - interrupts = <52>; - dmacap,memcpy; - dmacap,xor; - dmacap,memset; }; - }; - xor@d00f0900 { - compatible = "marvell,orion-xor"; - reg = <0xd00F0900 0x100 - 0xd00F0B00 0x100>; - clocks = <&gateclk 28>; - status = "okay"; + xor@60900 { + compatible = "marvell,orion-xor"; + reg = <0x60900 0x100 + 0x60b00 0x100>; + clocks = <&gateclk 22>; + status = "okay"; + + xor10 { + interrupts = <51>; + dmacap,memcpy; + dmacap,xor; + }; + xor11 { + interrupts = <52>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; - xor00 { - interrupts = <94>; - dmacap,memcpy; - dmacap,xor; + xor@f0900 { + compatible = "marvell,orion-xor"; + reg = <0xF0900 0x100 + 0xF0B00 0x100>; + clocks = <&gateclk 28>; + status = "okay"; + + xor00 { + interrupts = <94>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <95>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; }; - xor01 { - interrupts = <95>; - dmacap,memcpy; - dmacap,xor; - dmacap,memset; + + usb@50000 { + clocks = <&gateclk 18>; }; - }; - usb@d0050000 { - clocks = <&gateclk 18>; - }; + usb@51000 { + clocks = <&gateclk 19>; + }; - usb@d0051000 { - clocks = <&gateclk 19>; - }; + usb@52000 { + compatible = "marvell,orion-ehci"; + reg = <0x52000 0x500>; + interrupts = <47>; + clocks = <&gateclk 20>; + status = "disabled"; + }; - usb@d0052000 { - compatible = "marvell,orion-ehci"; - reg = <0xd0052000 0x500>; - interrupts = <47>; - clocks = <&gateclk 20>; - status = "disabled"; + thermal@182b0 { + compatible = "marvell,armadaxp-thermal"; + reg = <0x182b0 0x4 + 0x184d0 0x4>; + status = "okay"; + }; }; - }; }; diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts index f712fb607a4..c914357c0d8 100644 --- a/arch/arm/boot/dts/da850-evm.dts +++ b/arch/arm/boot/dts/da850-evm.dts @@ -35,14 +35,124 @@ clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; + + tps: tps@48 { + reg = <0x48>; + }; }; wdt: wdt@1c21000 { status = "okay"; }; + mmc0: mmc@1c40000 { + max-frequency = <50000000>; + bus-width = <4>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + }; + spi1: spi@1f0e000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p64"; + spi-max-frequency = <30000000>; + reg = <0>; + partition@0 { + label = "U-Boot-SPL"; + reg = <0x00000000 0x00010000>; + read-only; + }; + partition@1 { + label = "U-Boot"; + reg = <0x00010000 0x00080000>; + read-only; + }; + partition@2 { + label = "U-Boot-Env"; + reg = <0x00090000 0x00010000>; + read-only; + }; + partition@3 { + label = "Kernel"; + reg = <0x000a0000 0x00280000>; + }; + partition@4 { + label = "Filesystem"; + reg = <0x00320000 0x00400000>; + }; + partition@5 { + label = "MAC-Address"; + reg = <0x007f0000 0x00010000>; + read-only; + }; + }; + }; }; nand_cs3@62000000 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&nand_cs3_pins>; }; + vbat: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vbat"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + }; +}; + +/include/ "tps6507x.dtsi" + +&tps { + vdcdc1_2-supply = <&vbat>; + vdcdc3-supply = <&vbat>; + vldo1_2-supply = <&vbat>; + + regulators { + vdcdc1_reg: regulator@0 { + regulator-name = "VDCDC1_3.3V"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3450000>; + regulator-always-on; + regulator-boot-on; + }; + + vdcdc2_reg: regulator@1 { + regulator-name = "VDCDC2_3.3V"; + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <3450000>; + regulator-always-on; + regulator-boot-on; + ti,defdcdc_default = <1>; + }; + + vdcdc3_reg: regulator@2 { + regulator-name = "VDCDC3_1.2V"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + ti,defdcdc_default = <1>; + }; + + ldo1_reg: regulator@3 { + regulator-name = "LDO1_1.8V"; + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1890000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2_reg: regulator@4 { + regulator-name = "LDO2_1.2V"; + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1320000>; + regulator-always-on; + regulator-boot-on; + }; + }; }; diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 3ec1bda6435..2c88313d2c7 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -62,6 +62,69 @@ 0x10 0x00002200 0x0000ff00 >; }; + mmc0_pins: pinmux_mmc_pins { + pinctrl-single,bits = < + /* MMCSD0_DAT[3] MMCSD0_DAT[2] + * MMCSD0_DAT[1] MMCSD0_DAT[0] + * MMCSD0_CMD MMCSD0_CLK + */ + 0x28 0x00222222 0x00ffffff + >; + }; + ehrpwm0a_pins: pinmux_ehrpwm0a_pins { + pinctrl-single,bits = < + /* EPWM0A */ + 0xc 0x00000002 0x0000000f + >; + }; + ehrpwm0b_pins: pinmux_ehrpwm0b_pins { + pinctrl-single,bits = < + /* EPWM0B */ + 0xc 0x00000020 0x000000f0 + >; + }; + ehrpwm1a_pins: pinmux_ehrpwm1a_pins { + pinctrl-single,bits = < + /* EPWM1A */ + 0x14 0x00000002 0x0000000f + >; + }; + ehrpwm1b_pins: pinmux_ehrpwm1b_pins { + pinctrl-single,bits = < + /* EPWM1B */ + 0x14 0x00000020 0x000000f0 + >; + }; + ecap0_pins: pinmux_ecap0_pins { + pinctrl-single,bits = < + /* ECAP0_APWM0 */ + 0x8 0x20000000 0xf0000000 + >; + }; + ecap1_pins: pinmux_ecap1_pins { + pinctrl-single,bits = < + /* ECAP1_APWM1 */ + 0x4 0x40000000 0xf0000000 + >; + }; + ecap2_pins: pinmux_ecap2_pins { + pinctrl-single,bits = < + /* ECAP2_APWM2 */ + 0x4 0x00000004 0x0000000f + >; + }; + spi1_pins: pinmux_spi_pins { + pinctrl-single,bits = < + /* SIMO, SOMI, CLK */ + 0x14 0x00110100 0x00ff0f00 + >; + }; + spi1_cs0_pin: pinmux_spi1_cs0 { + pinctrl-single,bits = < + /* CS0 */ + 0x14 0x00000010 0x000000f0 + >; + }; }; serial0: serial@1c42000 { compatible = "ns16550a"; @@ -107,6 +170,52 @@ reg = <0x21000 0x1000>; status = "disabled"; }; + mmc0: mmc@1c40000 { + compatible = "ti,da830-mmc"; + reg = <0x40000 0x1000>; + interrupts = <16>; + status = "disabled"; + }; + ehrpwm0: ehrpwm@01f00000 { + compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x300000 0x2000>; + status = "disabled"; + }; + ehrpwm1: ehrpwm@01f02000 { + compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x302000 0x2000>; + status = "disabled"; + }; + ecap0: ecap@01f06000 { + compatible = "ti,da850-ecap", "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x306000 0x80>; + status = "disabled"; + }; + ecap1: ecap@01f07000 { + compatible = "ti,da850-ecap", "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x307000 0x80>; + status = "disabled"; + }; + ecap2: ecap@01f08000 { + compatible = "ti,da850-ecap", "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x308000 0x80>; + status = "disabled"; + }; + spi1: spi@1f0e000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,da830-spi"; + reg = <0x30e000 0x1000>; + num-cs = <4>; + ti,davinci-spi-intr-line = <1>; + interrupts = <56>; + status = "disabled"; + }; }; nand_cs3@62000000 { compatible = "ti,davinci-nand"; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index f7509cafc37..6cab46849cd 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -50,6 +50,11 @@ #clock-cells = <1>; }; + thermal: thermal@d001c { + compatible = "marvell,dove-thermal"; + reg = <0xd001c 0x0c>, <0xd005c 0x08>; + }; + uart0: serial@12000 { compatible = "ns16550a"; reg = <0x12000 0x100>; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index d75c047e80a..7f428272fee 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -51,4 +51,12 @@ <0x7 0 &gic 1 12 0>; }; }; + + mshc@12550000 { + compatible = "samsung,exynos4412-dw-mshc"; + reg = <0x12550000 0x1000>; + interrupts = <0 77 0>; + #address-cells = <1>; + #size-cells = <0>; + }; }; diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts index 035c13f9d3c..da0588a0413 100644 --- a/arch/arm/boot/dts/imx23-evk.dts +++ b/arch/arm/boot/dts/imx23-evk.dts @@ -59,8 +59,33 @@ lcdif@80030000 { pinctrl-names = "default"; pinctrl-0 = <&lcdif_24bit_pins_a>; - panel-enable-gpios = <&gpio1 18 0>; + lcd-supply = <®_lcd_3v3>; + display = <&display>; status = "okay"; + + display: display { + bits-per-pixel = <32>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <9200000>; + hactive = <480>; + vactive = <272>; + hback-porch = <15>; + hfront-porch = <8>; + vback-porch = <12>; + vfront-porch = <4>; + hsync-len = <1>; + vsync-len = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; }; }; @@ -95,6 +120,15 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio1 29 0>; }; + + reg_lcd_3v3: lcd-3v3 { + compatible = "regulator-fixed"; + regulator-name = "lcd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 18 0>; + enable-active-high; + }; }; backlight { diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index e7484e4ea65..d107c4af321 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts @@ -29,6 +29,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; bus-width = <4>; + broken-cd; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 56afcf41aae..73fd7d0887b 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -49,9 +49,15 @@ reg = <0x80000000 0x2000>; }; - dma-apbh@80004000 { + dma_apbh: dma-apbh@80004000 { compatible = "fsl,imx23-dma-apbh"; reg = <0x80004000 0x2000>; + interrupts = <0 14 20 0 + 13 13 13 13>; + interrupt-names = "empty", "ssp0", "ssp1", "empty", + "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <1>; + dma-channels = <8>; clocks = <&clks 15>; }; @@ -70,6 +76,8 @@ interrupt-names = "gpmi-dma", "bch"; clocks = <&clks 34>; clock-names = "gpmi_io"; + dmas = <&dma_apbh 4>; + dma-names = "rx-tx"; fsl,gpmi-dma-channel = <4>; status = "disabled"; }; @@ -78,6 +86,8 @@ reg = <0x80010000 0x2000>; interrupts = <15 14>; clocks = <&clks 33>; + dmas = <&dma_apbh 1>; + dma-names = "rx-tx"; fsl,ssp-dma-channel = <1>; status = "disabled"; }; @@ -295,6 +305,7 @@ }; digctl@8001c000 { + compatible = "fsl,imx23-digctl"; reg = <0x8001c000 2000>; status = "disabled"; }; @@ -304,9 +315,19 @@ status = "disabled"; }; - dma-apbx@80024000 { + dma_apbx: dma-apbx@80024000 { compatible = "fsl,imx23-dma-apbx"; reg = <0x80024000 0x2000>; + interrupts = <7 5 9 26 + 19 0 25 23 + 60 58 9 0 + 0 0 0 0>; + interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c", + "saif0", "empty", "auart0-rx", "auart0-tx", + "auart1-rx", "auart1-tx", "saif1", "empty", + "empty", "empty", "empty", "empty"; + #dma-cells = <1>; + dma-channels = <16>; clocks = <&clks 16>; }; @@ -321,6 +342,7 @@ }; ocotp@8002c000 { + compatible = "fsl,ocotp"; reg = <0x8002c000 0x2000>; status = "disabled"; }; @@ -342,6 +364,8 @@ reg = <0x80034000 0x2000>; interrupts = <2 20>; clocks = <&clks 33>; + dmas = <&dma_apbh 2>; + dma-names = "rx-tx"; fsl,ssp-dma-channel = <2>; status = "disabled"; }; @@ -360,13 +384,15 @@ ranges; clks: clkctrl@80040000 { - compatible = "fsl,imx23-clkctrl"; + compatible = "fsl,imx23-clkctrl", "fsl,clkctrl"; reg = <0x80040000 0x2000>; #clock-cells = <1>; }; saif0: saif@80042000 { reg = <0x80042000 0x2000>; + dmas = <&dma_apbx 4>; + dma-names = "rx-tx"; status = "disabled"; }; @@ -377,16 +403,22 @@ saif1: saif@80046000 { reg = <0x80046000 0x2000>; + dmas = <&dma_apbx 10>; + dma-names = "rx-tx"; status = "disabled"; }; audio-out@80048000 { reg = <0x80048000 0x2000>; + dmas = <&dma_apbx 1>; + dma-names = "tx"; status = "disabled"; }; audio-in@8004c000 { reg = <0x8004c000 0x2000>; + dmas = <&dma_apbx 0>; + dma-names = "rx"; status = "disabled"; }; @@ -399,11 +431,15 @@ spdif@80054000 { reg = <0x80054000 2000>; + dmas = <&dma_apbx 2>; + dma-names = "tx"; status = "disabled"; }; i2c@80058000 { reg = <0x80058000 0x2000>; + dmas = <&dma_apbx 3>; + dma-names = "rx-tx"; status = "disabled"; }; @@ -426,6 +462,7 @@ compatible = "fsl,imx23-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; interrupts = <28 29 30 31>; + clocks = <&clks 28>; }; auart0: serial@8006c000 { @@ -433,6 +470,8 @@ reg = <0x8006c000 0x2000>; interrupts = <24 25 23>; clocks = <&clks 32>; + dmas = <&dma_apbx 6>, <&dma_apbx 7>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -441,6 +480,8 @@ reg = <0x8006e000 0x2000>; interrupts = <59 60 58>; clocks = <&clks 32>; + dmas = <&dma_apbx 8>, <&dma_apbx 9>; + dma-names = "rx", "tx"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts index 6d8865bfb4b..3d905d16cbe 100644 --- a/arch/arm/boot/dts/imx28-apf28dev.dts +++ b/arch/arm/boot/dts/imx28-apf28dev.dts @@ -72,7 +72,32 @@ pinctrl-names = "default"; pinctrl-0 = <&lcdif_16bit_pins_a &lcdif_pins_apf28dev>; + display = <&display>; status = "okay"; + + display: display { + bits-per-pixel = <16>; + bus-width = <16>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <33000033>; + hactive = <800>; + vactive = <480>; + hback-porch = <96>; + hfront-porch = <96>; + vback-porch = <20>; + vfront-porch = <21>; + hsync-len = <64>; + vsync-len = <4>; + hsync-active = <1>; + vsync-active = <1>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; }; }; diff --git a/arch/arm/boot/dts/imx28-apx4devkit.dts b/arch/arm/boot/dts/imx28-apx4devkit.dts index 5171667a776..43bf3c796cb 100644 --- a/arch/arm/boot/dts/imx28-apx4devkit.dts +++ b/arch/arm/boot/dts/imx28-apx4devkit.dts @@ -94,7 +94,32 @@ pinctrl-names = "default"; pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_pins_apx4>; + display = <&display>; status = "okay"; + + display: display { + bits-per-pixel = <32>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <30000000>; + hactive = <800>; + vactive = <480>; + hback-porch = <88>; + hfront-porch = <40>; + vback-porch = <32>; + vfront-porch = <13>; + hsync-len = <48>; + vsync-len = <3>; + hsync-active = <1>; + vsync-active = <1>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts index a0d3e9f1738..063e6205989 100644 --- a/arch/arm/boot/dts/imx28-cfa10049.dts +++ b/arch/arm/boot/dts/imx28-cfa10049.dts @@ -30,7 +30,6 @@ reg = <0>; fsl,pinmux-ids = < 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ - 0x1153 /* MX28_PAD_LCD_D22__GPIO_1_21 */ 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */ 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ @@ -120,13 +119,48 @@ fsl,voltage = <1>; fsl,pull-up = <0>; }; + + w1_gpio_pins: w1-gpio@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <0>; /* 0 will enable the keeper */ + }; }; lcdif@80030000 { pinctrl-names = "default"; pinctrl-0 = <&lcdif_18bit_pins_cfa10049 &lcdif_pins_cfa10049>; + display = <&display>; status = "okay"; + + display: display { + bits-per-pixel = <32>; + bus-width = <18>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <9216000>; + hactive = <320>; + vactive = <480>; + hback-porch = <2>; + hfront-porch = <2>; + vback-porch = <2>; + vfront-porch = <2>; + hsync-len = <15>; + vsync-len = <15>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; + }; }; }; @@ -183,6 +217,11 @@ usbphy1: usbphy@8007e000 { status = "okay"; }; + + lradc@80050000 { + status = "okay"; + fsl,lradc-touchscreen-wires = <4>; + }; }; }; @@ -304,5 +343,14 @@ pwms = <&pwm 3 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; + + }; + + onewire@0 { + compatible = "w1-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&w1_gpio_pins>; + status = "okay"; + gpios = <&gpio1 21 0>; }; }; diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index 2da316e0440..3637bf3b1d5 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -123,8 +123,33 @@ pinctrl-names = "default"; pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_pins_evk>; - panel-enable-gpios = <&gpio3 30 0>; + lcd-supply = <®_lcd_3v3>; + display = <&display>; status = "okay"; + + display: display { + bits-per-pixel = <32>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <33500000>; + hactive = <800>; + vactive = <480>; + hback-porch = <89>; + hfront-porch = <164>; + vback-porch = <23>; + vfront-porch = <10>; + hsync-len = <10>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; }; can0: can@80032000 { @@ -285,6 +310,15 @@ gpio = <&gpio3 8 0>; enable-active-high; }; + + reg_lcd_3v3: lcd-3v3 { + compatible = "regulator-fixed"; + regulator-name = "lcd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 30 0>; + enable-active-high; + }; }; sound { diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts index fd36e1cca10..5aa44e05c9f 100644 --- a/arch/arm/boot/dts/imx28-m28evk.dts +++ b/arch/arm/boot/dts/imx28-m28evk.dts @@ -119,7 +119,32 @@ pinctrl-names = "default"; pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_pins_m28>; + display = <&display>; status = "okay"; + + display: display { + bits-per-pixel = <16>; + bus-width = <18>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <33260000>; + hactive = <800>; + vactive = <480>; + hback-porch = <0>; + hfront-porch = <256>; + vback-porch = <0>; + vfront-porch = <45>; + hsync-len = <1>; + vsync-len = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; + }; }; can0: can@80032000 { @@ -220,6 +245,8 @@ phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a>; + clocks = <&clks 57>, <&clks 57>; + clock-names = "ipg", "ahb"; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 7ba49662b9b..600f7cb51f3 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -61,12 +61,24 @@ hsadc@80002000 { reg = <0x80002000 0x2000>; interrupts = <13 87>; + dmas = <&dma_apbh 12>; + dma-names = "rx"; status = "disabled"; }; - dma-apbh@80004000 { + dma_apbh: dma-apbh@80004000 { compatible = "fsl,imx28-dma-apbh"; reg = <0x80004000 0x2000>; + interrupts = <82 83 84 85 + 88 88 88 88 + 88 88 88 88 + 87 86 0 0>; + interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3", + "gpmi0", "gmpi1", "gpmi2", "gmpi3", + "gpmi4", "gmpi5", "gpmi6", "gmpi7", + "hsadc", "lcdif", "empty", "empty"; + #dma-cells = <1>; + dma-channels = <16>; clocks = <&clks 25>; }; @@ -86,6 +98,8 @@ interrupt-names = "gpmi-dma", "bch"; clocks = <&clks 50>; clock-names = "gpmi_io"; + dmas = <&dma_apbh 4>; + dma-names = "rx-tx"; fsl,gpmi-dma-channel = <4>; status = "disabled"; }; @@ -96,6 +110,8 @@ reg = <0x80010000 0x2000>; interrupts = <96 82>; clocks = <&clks 46>; + dmas = <&dma_apbh 0>; + dma-names = "rx-tx"; fsl,ssp-dma-channel = <0>; status = "disabled"; }; @@ -106,6 +122,8 @@ reg = <0x80012000 0x2000>; interrupts = <97 83>; clocks = <&clks 47>; + dmas = <&dma_apbh 1>; + dma-names = "rx-tx"; fsl,ssp-dma-channel = <1>; status = "disabled"; }; @@ -116,6 +134,8 @@ reg = <0x80014000 0x2000>; interrupts = <98 84>; clocks = <&clks 48>; + dmas = <&dma_apbh 2>; + dma-names = "rx-tx"; fsl,ssp-dma-channel = <2>; status = "disabled"; }; @@ -126,6 +146,8 @@ reg = <0x80016000 0x2000>; interrupts = <99 85>; clocks = <&clks 49>; + dmas = <&dma_apbh 3>; + dma-names = "rx-tx"; fsl,ssp-dma-channel = <3>; status = "disabled"; }; @@ -647,6 +669,7 @@ }; digctl@8001c000 { + compatible = "fsl,imx28-digctl"; reg = <0x8001c000 0x2000>; interrupts = <89>; status = "disabled"; @@ -657,9 +680,19 @@ status = "disabled"; }; - dma-apbx@80024000 { + dma_apbx: dma-apbx@80024000 { compatible = "fsl,imx28-dma-apbx"; reg = <0x80024000 0x2000>; + interrupts = <78 79 66 0 + 80 81 68 69 + 70 71 72 73 + 74 75 76 77>; + interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty", + "saif0", "saif1", "i2c0", "i2c1", + "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", + "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; + #dma-cells = <1>; + dma-channels = <16>; clocks = <&clks 26>; }; @@ -676,6 +709,7 @@ }; ocotp@8002c000 { + compatible = "fsl,ocotp"; reg = <0x8002c000 0x2000>; status = "disabled"; }; @@ -690,6 +724,8 @@ reg = <0x80030000 0x2000>; interrupts = <38 86>; clocks = <&clks 55>; + dmas = <&dma_apbh 13>; + dma-names = "rx"; status = "disabled"; }; @@ -755,7 +791,7 @@ ranges; clks: clkctrl@80040000 { - compatible = "fsl,imx28-clkctrl"; + compatible = "fsl,imx28-clkctrl", "fsl,clkctrl"; reg = <0x80040000 0x2000>; #clock-cells = <1>; }; @@ -765,6 +801,8 @@ reg = <0x80042000 0x2000>; interrupts = <59 80>; clocks = <&clks 53>; + dmas = <&dma_apbx 4>; + dma-names = "rx-tx"; fsl,saif-dma-channel = <4>; status = "disabled"; }; @@ -779,6 +817,8 @@ reg = <0x80046000 0x2000>; interrupts = <58 81>; clocks = <&clks 54>; + dmas = <&dma_apbx 5>; + dma-names = "rx-tx"; fsl,saif-dma-channel = <5>; status = "disabled"; }; @@ -794,6 +834,8 @@ spdif@80054000 { reg = <0x80054000 0x2000>; interrupts = <45 66>; + dmas = <&dma_apbx 2>; + dma-names = "tx"; status = "disabled"; }; @@ -810,6 +852,8 @@ reg = <0x80058000 0x2000>; interrupts = <111 68>; clock-frequency = <100000>; + dmas = <&dma_apbx 6>; + dma-names = "rx-tx"; fsl,i2c-dma-channel = <6>; status = "disabled"; }; @@ -821,6 +865,8 @@ reg = <0x8005a000 0x2000>; interrupts = <110 69>; clock-frequency = <100000>; + dmas = <&dma_apbx 7>; + dma-names = "rx-tx"; fsl,i2c-dma-channel = <7>; status = "disabled"; }; @@ -838,12 +884,15 @@ compatible = "fsl,imx28-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; interrupts = <48 49 50 51>; + clocks = <&clks 26>; }; auart0: serial@8006a000 { compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006a000 0x2000>; interrupts = <112 70 71>; + dmas = <&dma_apbx 8>, <&dma_apbx 9>; + dma-names = "rx", "tx"; fsl,auart-dma-channel = <8 9>; clocks = <&clks 45>; status = "disabled"; @@ -853,6 +902,8 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006c000 0x2000>; interrupts = <113 72 73>; + dmas = <&dma_apbx 10>, <&dma_apbx 11>; + dma-names = "rx", "tx"; clocks = <&clks 45>; status = "disabled"; }; @@ -861,6 +912,8 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006e000 0x2000>; interrupts = <114 74 75>; + dmas = <&dma_apbx 12>, <&dma_apbx 13>; + dma-names = "rx", "tx"; clocks = <&clks 45>; status = "disabled"; }; @@ -869,6 +922,8 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x80070000 0x2000>; interrupts = <115 76 77>; + dmas = <&dma_apbx 14>, <&dma_apbx 15>; + dma-names = "rx", "tx"; clocks = <&clks 45>; status = "disabled"; }; @@ -877,6 +932,8 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x80072000 0x2000>; interrupts = <116 78 79>; + dmas = <&dma_apbx 0>, <&dma_apbx 1>; + dma-names = "rx", "tx"; clocks = <&clks 45>; status = "disabled"; }; @@ -940,8 +997,8 @@ compatible = "fsl,imx28-fec"; reg = <0x800f0000 0x4000>; interrupts = <101>; - clocks = <&clks 57>, <&clks 57>; - clock-names = "ipg", "ahb"; + clocks = <&clks 57>, <&clks 57>, <&clks 64>; + clock-names = "ipg", "ahb", "enet_out"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 281a223591f..491b0a0c24b 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -65,9 +65,13 @@ interrupt-parent = <&intc>; ranges; - dma-apbh@00110000 { + dma_apbh: dma-apbh@00110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; reg = <0x00110000 0x2000>; + interrupts = <0 13 0x04>, <0 13 0x04>, <0 13 0x04>, <0 13 0x04>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <1>; + dma-channels = <4>; clocks = <&clks 106>; }; @@ -83,6 +87,8 @@ <&clks 150>, <&clks 149>; clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"; + dmas = <&dma_apbh 0>; + dma-names = "rx-tx"; fsl,gpmi-dma-channel = <0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi index 192cf76fbf9..23991e45bc5 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi @@ -49,6 +49,12 @@ }; }; + thermal@10078 { + compatible = "marvell,kirkwood-thermal"; + reg = <0x10078 0x4>; + status = "okay"; + }; + i2c@11100 { compatible = "marvell,mv64xxx-i2c"; reg = <0x11100 0x20>; diff --git a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts index 9555a86297c..44fd97dfc1f 100644 --- a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts +++ b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts @@ -69,6 +69,10 @@ status = "okay"; nr-ports = <1>; }; + + mvsdio@90000 { + status = "okay"; + }; }; gpio-leds { diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 761c4b69b25..37aa7487d4d 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -26,6 +26,11 @@ }; }; + pmu { + compatible = "arm,arm1136-pmu"; + interrupts = <3>; + }; + soc { compatible = "ti,omap-infra"; mpu { @@ -49,6 +54,18 @@ reg = <0x480FE000 0x1000>; }; + sdma: dma-controller@48056000 { + compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; + reg = <0x48056000 0x1000>; + interrupts = <12>, + <13>, + <14>, + <15>; + #dma-cells = <1>; + #dma-channels = <32>; + #dma-requests = <64>; + }; + uart1: serial@4806a000 { compatible = "ti,omap2-uart"; ti,hwmods = "uart1"; @@ -68,28 +85,28 @@ }; timer2: timer@4802a000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x4802a000 0x400>; interrupts = <38>; ti,hwmods = "timer2"; }; timer3: timer@48078000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x48078000 0x400>; interrupts = <39>; ti,hwmods = "timer3"; }; timer4: timer@4807a000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x4807a000 0x400>; interrupts = <40>; ti,hwmods = "timer4"; }; timer5: timer@4807c000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x4807c000 0x400>; interrupts = <41>; ti,hwmods = "timer5"; @@ -97,7 +114,7 @@ }; timer6: timer@4807e000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x4807e000 0x400>; interrupts = <42>; ti,hwmods = "timer6"; @@ -105,7 +122,7 @@ }; timer7: timer@48080000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x48080000 0x400>; interrupts = <43>; ti,hwmods = "timer7"; @@ -113,7 +130,7 @@ }; timer8: timer@48082000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x48082000 0x400>; interrupts = <44>; ti,hwmods = "timer8"; @@ -121,7 +138,7 @@ }; timer9: timer@48084000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x48084000 0x400>; interrupts = <45>; ti,hwmods = "timer9"; @@ -129,7 +146,7 @@ }; timer10: timer@48086000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x48086000 0x400>; interrupts = <46>; ti,hwmods = "timer10"; @@ -137,7 +154,7 @@ }; timer11: timer@48088000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x48088000 0x400>; interrupts = <47>; ti,hwmods = "timer11"; @@ -145,7 +162,7 @@ }; timer12: timer@4808a000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x4808a000 0x400>; interrupts = <48>; ti,hwmods = "timer12"; diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts index 9b0d07746cb..68282ee13e2 100644 --- a/arch/arm/boot/dts/omap2420-h4.dts +++ b/arch/arm/boot/dts/omap2420-h4.dts @@ -18,3 +18,49 @@ reg = <0x80000000 0x4000000>; /* 64 MB */ }; }; + +&gpmc { + ranges = <0 0 0x08000000 0x04000000>; + + nor@0,0 { + compatible = "cfi-flash"; + linux,mtd-name= "intel,ge28f256l18b85"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0 0x04000000>; + bank-width = <2>; + + gpmc,mux-add-data = <2>; + gpmc,cs-on-ns = <10>; + gpmc,cs-rd-off-ns = <160>; + gpmc,cs-wr-off-ns = <160>; + gpmc,adv-on-ns = <20>; + gpmc,adv-rd-off-ns = <50>; + gpmc,adv-wr-off-ns = <50>; + gpmc,oe-on-ns = <60>; + gpmc,oe-off-ns = <120>; + gpmc,we-on-ns = <60>; + gpmc,we-off-ns = <120>; + gpmc,rd-cycle-ns = <170>; + gpmc,wr-cycle-ns = <170>; + gpmc,access-ns = <150>; + gpmc,page-burst-access-ns = <10>; + + partition@0 { + label = "bootloader"; + reg = <0 0x20000>; + }; + partition@0x20000 { + label = "params"; + reg = <0x20000 0x20000>; + }; + partition@0x40000 { + label = "kernel"; + reg = <0x40000 0x200000>; + }; + partition@0x240000 { + label = "file-system"; + reg = <0x240000 0x3dc0000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index af656090890..da5b285b73b 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -29,6 +29,65 @@ pinctrl-single,function-mask = <0x3f>; }; + gpio1: gpio@48018000 { + compatible = "ti,omap2-gpio"; + reg = <0x48018000 0x200>; + interrupts = <29>; + ti,hwmods = "gpio1"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio2: gpio@4801a000 { + compatible = "ti,omap2-gpio"; + reg = <0x4801a000 0x200>; + interrupts = <30>; + ti,hwmods = "gpio2"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio3: gpio@4801c000 { + compatible = "ti,omap2-gpio"; + reg = <0x4801c000 0x200>; + interrupts = <31>; + ti,hwmods = "gpio3"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio4: gpio@4801e000 { + compatible = "ti,omap2-gpio"; + reg = <0x4801e000 0x200>; + interrupts = <32>; + ti,hwmods = "gpio4"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpmc: gpmc@6800a000 { + compatible = "ti,omap2420-gpmc"; + reg = <0x6800a000 0x1000>; + #address-cells = <2>; + #size-cells = <1>; + interrupts = <20>; + gpmc,num-cs = <8>; + gpmc,num-waitpins = <4>; + ti,hwmods = "gpmc"; + }; + mcbsp1: mcbsp@48074000 { compatible = "ti,omap2420-mcbsp"; reg = <0x48074000 0xff>; @@ -37,6 +96,9 @@ <60>; /* RX interrupt */ interrupt-names = "tx", "rx"; ti,hwmods = "mcbsp1"; + dmas = <&sdma 31>, + <&sdma 32>; + dma-names = "tx", "rx"; }; mcbsp2: mcbsp@48076000 { @@ -47,10 +109,13 @@ <63>; /* RX interrupt */ interrupt-names = "tx", "rx"; ti,hwmods = "mcbsp2"; + dmas = <&sdma 33>, + <&sdma 34>; + dma-names = "tx", "rx"; }; timer1: timer@48028000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x48028000 0x400>; interrupts = <37>; ti,hwmods = "timer1"; diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index c3924457c9b..054bc443956 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -29,6 +29,76 @@ pinctrl-single,function-mask = <0x3f>; }; + gpio1: gpio@4900c000 { + compatible = "ti,omap2-gpio"; + reg = <0x4900c000 0x200>; + interrupts = <29>; + ti,hwmods = "gpio1"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio2: gpio@4900e000 { + compatible = "ti,omap2-gpio"; + reg = <0x4900e000 0x200>; + interrupts = <30>; + ti,hwmods = "gpio2"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio3: gpio@49010000 { + compatible = "ti,omap2-gpio"; + reg = <0x49010000 0x200>; + interrupts = <31>; + ti,hwmods = "gpio3"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio4: gpio@49012000 { + compatible = "ti,omap2-gpio"; + reg = <0x49012000 0x200>; + interrupts = <32>; + ti,hwmods = "gpio4"; + ti,gpio-always-on; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio5: gpio@480b6000 { + compatible = "ti,omap2-gpio"; + reg = <0x480b6000 0x200>; + interrupts = <33>; + ti,hwmods = "gpio5"; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpmc: gpmc@6e000000 { + compatible = "ti,omap2430-gpmc"; + reg = <0x6e000000 0x1000>; + #address-cells = <2>; + #size-cells = <1>; + interrupts = <20>; + gpmc,num-cs = <8>; + gpmc,num-waitpins = <4>; + ti,hwmods = "gpmc"; + }; + mcbsp1: mcbsp@48074000 { compatible = "ti,omap2430-mcbsp"; reg = <0x48074000 0xff>; @@ -40,6 +110,9 @@ interrupt-names = "common", "tx", "rx", "rx_overflow"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; + dmas = <&sdma 31>, + <&sdma 32>; + dma-names = "tx", "rx"; }; mcbsp2: mcbsp@48076000 { @@ -52,6 +125,9 @@ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; + dmas = <&sdma 33>, + <&sdma 34>; + dma-names = "tx", "rx"; }; mcbsp3: mcbsp@4808c000 { @@ -64,6 +140,9 @@ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; + dmas = <&sdma 17>, + <&sdma 18>; + dma-names = "tx", "rx"; }; mcbsp4: mcbsp@4808e000 { @@ -76,6 +155,9 @@ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; + dmas = <&sdma 19>, + <&sdma 20>; + dma-names = "tx", "rx"; }; mcbsp5: mcbsp@48096000 { @@ -88,10 +170,13 @@ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp5"; + dmas = <&sdma 21>, + <&sdma 22>; + dma-names = "tx", "rx"; }; timer1: timer@49018000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap2420-timer"; reg = <0x49018000 0x400>; interrupts = <37>; ti,hwmods = "timer1"; diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index 3705a81c1fc..5a31964ae33 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -13,6 +13,12 @@ model = "TI OMAP3 BeagleBoard xM"; compatible = "ti,omap3-beagle-xm, ti,omap3-beagle", "ti,omap3"; + cpus { + cpu@0 { + cpu0-supply = <&vcc>; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512 MB */ @@ -20,10 +26,6 @@ leds { compatible = "gpio-leds"; - pmu_stat { - label = "beagleboard::pmu_stat"; - gpios = <&twl_gpio 19 0>; /* LEDB */ - }; heartbeat { label = "beagleboard::usr0"; @@ -38,6 +40,16 @@ }; }; + pwmleds { + compatible = "pwm-leds"; + + pmu_stat { + label = "beagleboard::pmu_stat"; + pwms = <&twl_pwmled 1 7812500>; + max-brightness = <127>; + }; + }; + sound { compatible = "ti,omap-twl4030"; ti,model = "omap3beagle"; @@ -107,3 +119,9 @@ */ ti,pulldowns = <0x03a1c4>; }; + +&usb_otg_hs { + interface-type = <0>; + mode = <3>; + power = <50>; +}; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index f624dc85d44..6eec6999760 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -7,12 +7,18 @@ */ /dts-v1/; -/include/ "omap3.dtsi" +/include/ "omap34xx.dtsi" / { model = "TI OMAP3 BeagleBoard"; compatible = "ti,omap3-beagle", "ti,omap3"; + cpus { + cpu@0 { + cpu0-supply = <&vcc>; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ @@ -38,6 +44,57 @@ }; }; + /* HS USB Port 2 RESET */ + hsusb2_reset: hsusb2_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 19 0>; /* gpio_147 */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Port 2 Power */ + hsusb2_power: hsusb2_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&twl_gpio 18 0>; /* GPIO LEDA */ + startup-delay-us = <70000>; + }; + + /* HS USB Host PHY on PORT 2 */ + hsusb2_phy: hsusb2_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb2_reset>; + vcc-supply = <&hsusb2_power>; + }; +}; + +&omap3_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < + &hsusbb2_pins + >; + + hsusbb2_pins: pinmux_hsusbb2_pins { + pinctrl-single,pins = < + 0x5c0 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk OUTPUT */ + 0x5c2 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */ + 0x5c4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */ + 0x5c6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */ + 0x5c8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */ + 0x5cA 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */ + 0x1a4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */ + 0x1a6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */ + 0x1a8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */ + 0x1aa 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */ + 0x1ac 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */ + 0x1ae 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */ + >; + }; }; &i2c1 { @@ -65,3 +122,23 @@ &mmc3 { status = "disabled"; }; + +&usbhshost { + port2-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <0 &hsusb2_phy>; +}; + +&twl_gpio { + ti,use-leds; + /* pullups: BIT(1) */ + ti,pullups = <0x000002>; + /* + * pulldowns: + * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13) + * BIT(15), BIT(16), BIT(17) + */ + ti,pulldowns = <0x03a1c4>; +}; diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts new file mode 100644 index 00000000000..8a5cdcc6deb --- /dev/null +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -0,0 +1,169 @@ +/* + * Author: Anil Kumar <anilk4.v@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "omap34xx.dtsi" +/ { + model = "TimLL OMAP3 Devkit8000"; + compatible = "timll,omap3-devkit8000", "ti,omap3"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + leds { + compatible = "gpio-leds"; + + heartbeat { + label = "devkit8000::led1"; + gpios = <&gpio6 26 0>; /* 186 -> LED1 */ + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + mmc { + label = "devkit8000::led2"; + gpios = <&gpio6 3 0>; /* 163 -> LED2 */ + default-state = "on"; + linux,default-trigger = "none"; + }; + + usr { + label = "devkit8000::led3"; + gpios = <&gpio6 4 0>; /* 164 -> LED3 */ + default-state = "on"; + linux,default-trigger = "usr"; + }; + + }; + + sound { + compatible = "ti,omap-twl4030"; + ti,model = "devkit8000"; + + ti,mcbsp = <&mcbsp2>; + ti,codec = <&twl_audio>; + ti,audio-routing = + "Ext Spk", "PREDRIVEL", + "Ext Spk", "PREDRIVER", + "MAINMIC", "Main Mic", + "Main Mic", "Mic Bias 1"; + }; +}; + +&i2c1 { + clock-frequency = <2600000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + + twl_audio: audio { + compatible = "ti,twl4030-audio"; + codec { + }; + }; + }; +}; + +&i2c2 { + status = "disabled"; +}; + +&i2c3 { + status = "disabled"; +}; + +/include/ "twl4030.dtsi" + +&mmc1 { + vmmc-supply = <&vmmc1>; + vmmc_aux-supply = <&vsim>; + bus-width = <8>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&wdt2 { + status = "disabled"; +}; + +&mcbsp1 { + status = "disabled"; +}; + +&mcbsp3 { + status = "disabled"; +}; + +&mcbsp4 { + status = "disabled"; +}; + +&mcbsp5 { + status = "disabled"; +}; + +&gpmc { + ranges = <0 0 0x30000000 0x04>; /* CS0: NAND */ + + nand@0,0 { + reg = <0 0 0>; /* CS0, offset 0 */ + nand-bus-width = <16>; + + gpmc,sync-clk = <0>; + gpmc,cs-on = <0>; + gpmc,cs-rd-off = <44>; + gpmc,cs-wr-off = <44>; + gpmc,adv-on = <6>; + gpmc,adv-rd-off = <34>; + gpmc,adv-wr-off = <44>; + gpmc,we-off = <40>; + gpmc,oe-off = <54>; + gpmc,access = <64>; + gpmc,rd-cycle = <82>; + gpmc,wr-cycle = <82>; + gpmc,wr-access = <40>; + gpmc,wr-data-mux-bus = <0>; + + #address-cells = <1>; + #size-cells = <1>; + + x-loader@0 { + label = "X-Loader"; + reg = <0 0x80000>; + }; + + bootloaders@80000 { + label = "U-Boot"; + reg = <0x80000 0x1e0000>; + }; + + bootloaders_env@260000 { + label = "U-Boot Env"; + reg = <0x260000 0x20000>; + }; + + kernel@280000 { + label = "Kernel"; + reg = <0x280000 0x400000>; + }; + + filesystem@680000 { + label = "File System"; + reg = <0x680000 0xf980000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts index e8ba1c247a3..05f51e10ddd 100644 --- a/arch/arm/boot/dts/omap3-evm.dts +++ b/arch/arm/boot/dts/omap3-evm.dts @@ -7,12 +7,18 @@ */ /dts-v1/; -/include/ "omap3.dtsi" +/include/ "omap34xx.dtsi" / { model = "TI OMAP3 EVM (OMAP3530, AM/DM37x)"; compatible = "ti,omap3-evm", "ti,omap3"; + cpus { + cpu@0 { + cpu0-supply = <&vcc>; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ @@ -59,3 +65,9 @@ &twl_gpio { ti,use-leds; }; + +&usb_otg_hs { + interface-type = <0>; + mode = <3>; + power = <50>; +}; diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi new file mode 100644 index 00000000000..f8fe3b748c3 --- /dev/null +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -0,0 +1,122 @@ +/* + * Device Tree Source for IGEP Technology devices + * + * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> + * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "omap34xx.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB */ + }; + + sound { + compatible = "ti,omap-twl4030"; + ti,model = "igep2"; + ti,mcbsp = <&mcbsp2>; + ti,codec = <&twl_audio>; + }; +}; + +&omap3_pmx_core { + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x152 0x100 /* uart1_rx.uart1_rx INPUT | MODE0 */ + 0x14c 0 /* uart1_tx.uart1_tx OUTPUT | MODE0 */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + 0x14a 0x100 /* uart2_rx.uart2_rx INPUT | MODE0 */ + 0x148 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e 0x100 /* uart3_rx.uart3_rx INPUT | MODE0 */ + 0x170 0 /* uart3_tx.uart3_tx OUTPUT | MODE0 */ + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + 0x114 0x0118 /* sdmmc1_clk.sdmmc1_clk INPUT PULLUP | MODE 0 */ + 0x116 0x0118 /* sdmmc1_cmd.sdmmc1_cmd INPUT PULLUP | MODE 0 */ + 0x118 0x0118 /* sdmmc1_dat0.sdmmc1_dat0 INPUT PULLUP | MODE 0 */ + 0x11a 0x0118 /* sdmmc1_dat1.sdmmc1_dat1 INPUT PULLUP | MODE 0 */ + 0x11c 0x0118 /* sdmmc1_dat2.sdmmc1_dat2 INPUT PULLUP | MODE 0 */ + 0x11e 0x0118 /* sdmmc1_dat3.sdmmc1_dat3 INPUT PULLUP | MODE 0 */ + 0x120 0x0100 /* sdmmc1_dat4.sdmmc1_dat4 INPUT | MODE 0 */ + 0x122 0x0100 /* sdmmc1_dat5.sdmmc1_dat5 INPUT | MODE 0 */ + 0x124 0x0100 /* sdmmc1_dat6.sdmmc1_dat6 INPUT | MODE 0 */ + 0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */ + >; + }; +}; + +&i2c1 { + clock-frequency = <2600000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + interrupt-parent = <&intc>; + + twl_audio: audio { + compatible = "ti,twl4030-audio"; + codec { + }; + }; + }; +}; + +/include/ "twl4030.dtsi" + +&i2c2 { + clock-frequency = <400000>; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <&vmmc1>; + vmmc_aux-supply = <&vsim>; + bus-width = <8>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; + +&twl_gpio { + ti,use-leds; +}; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts new file mode 100644 index 00000000000..e2b98490cc9 --- /dev/null +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -0,0 +1,56 @@ +/* + * Device Tree Source for IGEPv2 board + * + * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> + * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/include/ "omap3-igep.dtsi" + +/ { + model = "IGEPv2"; + compatible = "isee,omap3-igep0020", "ti,omap3"; + + leds { + compatible = "gpio-leds"; + boot { + label = "omap3:green:boot"; + gpios = <&gpio1 26 0>; + default-state = "on"; + }; + + user0 { + label = "omap3:red:user0"; + gpios = <&gpio1 27 0>; + default-state = "off"; + }; + + user1 { + label = "omap3:red:user1"; + gpios = <&gpio1 28 0>; + default-state = "off"; + }; + + user2 { + label = "omap3:green:user1"; + gpios = <&twl_gpio 19 1>; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + + /* + * Display monitor features are burnt in the EEPROM + * as EDID data. + */ + eeprom@50 { + compatible = "ti,eeprom"; + reg = <0x50>; + }; +}; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts new file mode 100644 index 00000000000..9dc48d262ff --- /dev/null +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -0,0 +1,44 @@ +/* + * Device Tree Source for IGEP COM Module + * + * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> + * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/include/ "omap3-igep.dtsi" + +/ { + model = "IGEP COM Module"; + compatible = "isee,omap3-igep0030", "ti,omap3"; + + leds { + compatible = "gpio-leds"; + boot { + label = "omap3:green:boot"; + gpios = <&twl_gpio 13 1>; + default-state = "on"; + }; + + user0 { + label = "omap3:red:user0"; + gpios = <&twl_gpio 18 1>; /* LEDA */ + default-state = "off"; + }; + + user1 { + label = "omap3:green:user1"; + gpios = <&twl_gpio 19 1>; /* LEDB */ + default-state = "off"; + }; + + user2 { + label = "omap3:red:user1"; + gpios = <&gpio1 16 1>; + default-state = "off"; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index 89808ce0167..d4a7280d18b 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -11,17 +11,26 @@ */ /dts-v1/; -/include/ "omap3.dtsi" +/include/ "omap34xx.dtsi" / { - leds { - compatible = "gpio-leds"; + pwmleds { + compatible = "pwm-leds"; + overo { label = "overo:blue:COM"; - gpios = <&twl_gpio 19 0>; - linux,default-trigger = "mmc0"; + pwms = <&twl_pwmled 1 7812500>; + max-brightness = <127>; }; }; + + sound { + compatible = "ti,omap-twl4030"; + ti,model = "overo"; + + ti,mcbsp = <&mcbsp2>; + ti,codec = <&twl_audio>; + }; }; &i2c1 { @@ -31,6 +40,12 @@ reg = <0x48>; interrupts = <7>; /* SYS_NIRQ cascaded to intc */ interrupt-parent = <&intc>; + + twl_audio: audio { + compatible = "ti,twl4030-audio"; + codec { + }; + }; }; }; @@ -55,3 +70,9 @@ &twl_gpio { ti,use-leds; }; + +&usb_otg_hs { + interface-type = <0>; + mode = <3>; + power = <50>; +}; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 1acc26148ff..4ad03d9dbf0 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -26,8 +26,14 @@ }; }; + pmu { + compatible = "arm,cortex-a8-pmu"; + interrupts = <3>; + ti,hwmods = "debugss"; + }; + /* - * The soc node represents the soc top level view. It is uses for IPs + * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { @@ -75,76 +81,101 @@ reg = <0x48200000 0x1000>; }; + sdma: dma-controller@48056000 { + compatible = "ti,omap3630-sdma", "ti,omap3430-sdma"; + reg = <0x48056000 0x1000>; + interrupts = <12>, + <13>, + <14>, + <15>; + #dma-cells = <1>; + #dma-channels = <32>; + #dma-requests = <96>; + }; + omap3_pmx_core: pinmux@48002030 { compatible = "ti,omap3-padconf", "pinctrl-single"; reg = <0x48002030 0x05cc>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0x7fff>; + pinctrl-single,function-mask = <0x7f1f>; }; - omap3_pmx_wkup: pinmux@0x48002a58 { + omap3_pmx_wkup: pinmux@0x48002a00 { compatible = "ti,omap3-padconf", "pinctrl-single"; - reg = <0x48002a58 0x5c>; + reg = <0x48002a00 0x5c>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0x7fff>; + pinctrl-single,function-mask = <0x7f1f>; }; gpio1: gpio@48310000 { compatible = "ti,omap3-gpio"; + reg = <0x48310000 0x200>; + interrupts = <29>; ti,hwmods = "gpio1"; + ti,gpio-always-on; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio2: gpio@49050000 { compatible = "ti,omap3-gpio"; + reg = <0x49050000 0x200>; + interrupts = <30>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio3: gpio@49052000 { compatible = "ti,omap3-gpio"; + reg = <0x49052000 0x200>; + interrupts = <31>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio4: gpio@49054000 { compatible = "ti,omap3-gpio"; + reg = <0x49054000 0x200>; + interrupts = <32>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio5: gpio@49056000 { compatible = "ti,omap3-gpio"; + reg = <0x49056000 0x200>; + interrupts = <33>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio6: gpio@49058000 { compatible = "ti,omap3-gpio"; + reg = <0x49058000 0x200>; + interrupts = <34>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; uart1: serial@4806a000 { @@ -192,6 +223,16 @@ #size-cells = <0>; ti,hwmods = "mcspi1"; ti,spi-num-cs = <4>; + dmas = <&sdma 35>, + <&sdma 36>, + <&sdma 37>, + <&sdma 38>, + <&sdma 39>, + <&sdma 40>, + <&sdma 41>, + <&sdma 42>; + dma-names = "tx0", "rx0", "tx1", "rx1", + "tx2", "rx2", "tx3", "rx3"; }; mcspi2: spi@4809a000 { @@ -200,6 +241,11 @@ #size-cells = <0>; ti,hwmods = "mcspi2"; ti,spi-num-cs = <2>; + dmas = <&sdma 43>, + <&sdma 44>, + <&sdma 45>, + <&sdma 46>; + dma-names = "tx0", "rx0", "tx1", "rx1"; }; mcspi3: spi@480b8000 { @@ -208,6 +254,11 @@ #size-cells = <0>; ti,hwmods = "mcspi3"; ti,spi-num-cs = <2>; + dmas = <&sdma 15>, + <&sdma 16>, + <&sdma 23>, + <&sdma 24>; + dma-names = "tx0", "rx0", "tx1", "rx1"; }; mcspi4: spi@480ba000 { @@ -216,22 +267,30 @@ #size-cells = <0>; ti,hwmods = "mcspi4"; ti,spi-num-cs = <1>; + dmas = <&sdma 70>, <&sdma 71>; + dma-names = "tx0", "rx0"; }; mmc1: mmc@4809c000 { compatible = "ti,omap3-hsmmc"; ti,hwmods = "mmc1"; ti,dual-volt; + dmas = <&sdma 61>, <&sdma 62>; + dma-names = "tx", "rx"; }; mmc2: mmc@480b4000 { compatible = "ti,omap3-hsmmc"; ti,hwmods = "mmc2"; + dmas = <&sdma 47>, <&sdma 48>; + dma-names = "tx", "rx"; }; mmc3: mmc@480ad000 { compatible = "ti,omap3-hsmmc"; ti,hwmods = "mmc3"; + dmas = <&sdma 77>, <&sdma 78>; + dma-names = "tx", "rx"; }; wdt2: wdt@48314000 { @@ -249,6 +308,9 @@ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; + dmas = <&sdma 31>, + <&sdma 32>; + dma-names = "tx", "rx"; }; mcbsp2: mcbsp@49022000 { @@ -263,6 +325,9 @@ interrupt-names = "common", "tx", "rx", "sidetone"; ti,buffer-size = <1280>; ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; + dmas = <&sdma 33>, + <&sdma 34>; + dma-names = "tx", "rx"; }; mcbsp3: mcbsp@49024000 { @@ -277,6 +342,9 @@ interrupt-names = "common", "tx", "rx", "sidetone"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; + dmas = <&sdma 17>, + <&sdma 18>; + dma-names = "tx", "rx"; }; mcbsp4: mcbsp@49026000 { @@ -289,6 +357,9 @@ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; + dmas = <&sdma 19>, + <&sdma 20>; + dma-names = "tx", "rx"; }; mcbsp5: mcbsp@48096000 { @@ -301,10 +372,13 @@ interrupt-names = "common", "tx", "rx"; ti,buffer-size = <128>; ti,hwmods = "mcbsp5"; + dmas = <&sdma 21>, + <&sdma 22>; + dma-names = "tx", "rx"; }; timer1: timer@48318000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x48318000 0x400>; interrupts = <37>; ti,hwmods = "timer1"; @@ -312,28 +386,28 @@ }; timer2: timer@49032000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x49032000 0x400>; interrupts = <38>; ti,hwmods = "timer2"; }; timer3: timer@49034000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x49034000 0x400>; interrupts = <39>; ti,hwmods = "timer3"; }; timer4: timer@49036000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x49036000 0x400>; interrupts = <40>; ti,hwmods = "timer4"; }; timer5: timer@49038000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x49038000 0x400>; interrupts = <41>; ti,hwmods = "timer5"; @@ -341,7 +415,7 @@ }; timer6: timer@4903a000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x4903a000 0x400>; interrupts = <42>; ti,hwmods = "timer6"; @@ -349,7 +423,7 @@ }; timer7: timer@4903c000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x4903c000 0x400>; interrupts = <43>; ti,hwmods = "timer7"; @@ -357,7 +431,7 @@ }; timer8: timer@4903e000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x4903e000 0x400>; interrupts = <44>; ti,hwmods = "timer8"; @@ -366,7 +440,7 @@ }; timer9: timer@49040000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x49040000 0x400>; interrupts = <45>; ti,hwmods = "timer9"; @@ -374,7 +448,7 @@ }; timer10: timer@48086000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x48086000 0x400>; interrupts = <46>; ti,hwmods = "timer10"; @@ -382,7 +456,7 @@ }; timer11: timer@48088000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x48088000 0x400>; interrupts = <47>; ti,hwmods = "timer11"; @@ -390,12 +464,65 @@ }; timer12: timer@48304000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x48304000 0x400>; interrupts = <95>; ti,hwmods = "timer12"; ti,timer-alwon; ti,timer-secure; }; + + usbhstll: usbhstll@48062000 { + compatible = "ti,usbhs-tll"; + reg = <0x48062000 0x1000>; + interrupts = <78>; + ti,hwmods = "usb_tll_hs"; + }; + + usbhshost: usbhshost@48064000 { + compatible = "ti,usbhs-host"; + reg = <0x48064000 0x400>; + ti,hwmods = "usb_host_hs"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbhsohci: ohci@48064400 { + compatible = "ti,ohci-omap3", "usb-ohci"; + reg = <0x48064400 0x400>; + interrupt-parent = <&intc>; + interrupts = <76>; + }; + + usbhsehci: ehci@48064800 { + compatible = "ti,ehci-omap", "usb-ehci"; + reg = <0x48064800 0x400>; + interrupt-parent = <&intc>; + interrupts = <77>; + }; + }; + + gpmc: gpmc@6e000000 { + compatible = "ti,omap3430-gpmc"; + ti,hwmods = "gpmc"; + reg = <0x6e000000 0x02d0>; + interrupts = <20>; + gpmc,num-cs = <8>; + gpmc,num-waitpins = <4>; + #address-cells = <2>; + #size-cells = <1>; + }; + + usb_otg_hs: usb_otg_hs@480ab000 { + compatible = "ti,omap3-musb"; + reg = <0x480ab000 0x1000>; + interrupts = <0 92 0x4>, <0 93 0x4>; + interrupt-names = "mc", "dma"; + ti,hwmods = "usb_otg_hs"; + usb-phy = <&usb2_phy>; + multipoint = <1>; + num-eps = <16>; + ram-bits = <12>; + }; }; }; diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts new file mode 100644 index 00000000000..144ae43453c --- /dev/null +++ b/arch/arm/boot/dts/omap3430-sdp.dts @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "omap34xx.dtsi" + +/ { + model = "TI OMAP3430 SDP"; + compatible = "ti,omap3430-sdp", "ti,omap3"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; +}; + +&i2c1 { + clock-frequency = <2600000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + }; +}; + +/include/ "twl4030.dtsi" + +&mmc1 { + vmmc-supply = <&vmmc1>; + vmmc_aux-supply = <&vsim>; + bus-width = <8>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&gpmc { + ranges = <0 0 0x10000000 0x08000000>, + <1 0 0x28000000 0x08000000>, + <2 0 0x20000000 0x10000000>; + + nor@0,0 { + compatible = "cfi-flash"; + linux,mtd-name= "intel,pf48f6000m0y1be"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0 0x08000000>; + bank-width = <2>; + + gpmc,mux-add-data = <2>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <186>; + gpmc,cs-wr-off-ns = <186>; + gpmc,adv-on-ns = <12>; + gpmc,adv-rd-off-ns = <48>; + gpmc,adv-wr-off-ns = <48>; + gpmc,oe-on-ns = <54>; + gpmc,oe-off-ns = <168>; + gpmc,we-on-ns = <54>; + gpmc,we-off-ns = <168>; + gpmc,rd-cycle-ns = <186>; + gpmc,wr-cycle-ns = <186>; + gpmc,access-ns = <114>; + gpmc,page-burst-access-ns = <6>; + gpmc,bus-turnaround-ns = <12>; + gpmc,cycle2cycle-delay-ns = <18>; + gpmc,wr-data-mux-bus-ns = <90>; + gpmc,wr-access-ns = <186>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + + partition@0 { + label = "bootloader-nor"; + reg = <0 0x40000>; + }; + partition@0x40000 { + label = "params-nor"; + reg = <0x40000 0x40000>; + }; + partition@0x80000 { + label = "kernel-nor"; + reg = <0x80000 0x200000>; + }; + partition@0x280000 { + label = "filesystem-nor"; + reg = <0x240000 0x7d80000>; + }; + }; + + nand@1,0 { + linux,mtd-name= "micron,mt29f1g08abb"; + #address-cells = <1>; + #size-cells = <1>; + reg = <1 0 0x08000000>; + nand-bus-width = <8>; + + ti,nand-ecc-opt = "sw"; + gpmc,device-nand; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <36>; + gpmc,cs-wr-off-ns = <36>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <24>; + gpmc,adv-wr-off-ns = <36>; + gpmc,oe-on-ns = <6>; + gpmc,oe-off-ns = <48>; + gpmc,we-on-ns = <6>; + gpmc,we-off-ns = <30>; + gpmc,rd-cycle-ns = <72>; + gpmc,wr-cycle-ns = <72>; + gpmc,access-ns = <54>; + gpmc,wr-access-ns = <30>; + + partition@0 { + label = "xloader-nand"; + reg = <0 0x80000>; + }; + partition@0x80000 { + label = "bootloader-nand"; + reg = <0x80000 0x140000>; + }; + partition@0x1c0000 { + label = "params-nand"; + reg = <0x1c0000 0xc0000>; + }; + partition@0x280000 { + label = "kernel-nand"; + reg = <0x280000 0x500000>; + }; + partition@0x780000 { + label = "filesystem-nand"; + reg = <0x780000 0x7880000>; + }; + }; + + onenand@2,0 { + linux,mtd-name= "samsung,kfm2g16q2m-deb8"; + #address-cells = <1>; + #size-cells = <1>; + reg = <2 0 0x10000000>; + + gpmc,device-width = <2>; + gpmc,mux-add-data = <2>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <84>; + gpmc,cs-wr-off-ns = <72>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <18>; + gpmc,adv-wr-off-ns = <18>; + gpmc,oe-on-ns = <30>; + gpmc,oe-off-ns = <84>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <42>; + gpmc,rd-cycle-ns = <108>; + gpmc,wr-cycle-ns = <96>; + gpmc,access-ns = <78>; + gpmc,wr-data-mux-bus-ns = <30>; + + partition@0 { + label = "xloader-onenand"; + reg = <0 0x80000>; + }; + partition@0x80000 { + label = "bootloader-onenand"; + reg = <0x80000 0x40000>; + }; + partition@0xc0000 { + label = "params-onenand"; + reg = <0xc0000 0x20000>; + }; + partition@0xe0000 { + label = "kernel-onenand"; + reg = <0xe0000 0x200000>; + }; + partition@0x2e0000 { + label = "filesystem-onenand"; + reg = <0x2e0000 0xfd20000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi new file mode 100644 index 00000000000..75ed4ae2e63 --- /dev/null +++ b/arch/arm/boot/dts/omap34xx.dtsi @@ -0,0 +1,28 @@ +/* + * Device Tree Source for OMAP34xx/OMAP35xx SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "omap3.dtsi" + +/ { + cpus { + cpu@0 { + /* OMAP343x/OMAP35xx variants OPP1-5 */ + operating-points = < + /* kHz uV */ + 125000 975000 + 250000 1075000 + 500000 1200000 + 550000 1270000 + 600000 1350000 + >; + clock-latency = <300000>; /* From legacy driver */ + }; + }; +}; diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index 96bf0287cb9..b89233e43b0 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -15,6 +15,19 @@ serial3 = &uart4; }; + cpus { + /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */ + cpu@0 { + operating-points = < + /* kHz uV */ + 300000 975000 + 600000 1075000 + 800000 1200000 + >; + clock-latency = <300000>; /* From legacy driver */ + }; + }; + ocp { uart4: serial@49042000 { compatible = "ti,omap3-uart"; diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts index 75466d2abfb..e30cdf0f5ac 100644 --- a/arch/arm/boot/dts/omap4-panda-a4.dts +++ b/arch/arm/boot/dts/omap4-panda-a4.dts @@ -5,7 +5,10 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -/include/ "omap4-panda.dts" +/dts-v1/; + +/include/ "omap443x.dtsi" +/include/ "omap4-panda-common.dtsi" /* Pandaboard Rev A4+ have external pullups on SCL & SDA */ &dss_hdmi_pins { diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi new file mode 100644 index 00000000000..03bd60deb52 --- /dev/null +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -0,0 +1,251 @@ +/* + * Copyright (C) 2011-2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/include/ "elpida_ecb240abacn.dtsi" + +/ { + model = "TI OMAP4 PandaBoard"; + compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; /* 1 GB */ + }; + + leds { + compatible = "gpio-leds"; + heartbeat { + label = "pandaboard::status1"; + gpios = <&gpio1 7 0>; + linux,default-trigger = "heartbeat"; + }; + + mmc { + label = "pandaboard::status2"; + gpios = <&gpio1 8 0>; + linux,default-trigger = "mmc0"; + }; + }; + + sound: sound { + compatible = "ti,abe-twl6040"; + ti,model = "PandaBoard"; + + ti,mclk-freq = <38400000>; + + ti,mcpdm = <&mcpdm>; + + ti,twl6040 = <&twl6040>; + + /* Audio routing */ + ti,audio-routing = + "Headset Stereophone", "HSOL", + "Headset Stereophone", "HSOR", + "Ext Spk", "HFL", + "Ext Spk", "HFR", + "Line Out", "AUXL", + "Line Out", "AUXR", + "HSMIC", "Headset Mic", + "Headset Mic", "Headset Mic Bias", + "AFML", "Line In", + "AFMR", "Line In"; + }; +}; + +&omap4_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < + &twl6040_pins + &mcpdm_pins + &mcbsp1_pins + &dss_hdmi_pins + &tpd12s015_pins + >; + + twl6040_pins: pinmux_twl6040_pins { + pinctrl-single,pins = < + 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ + 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */ + >; + }; + + mcpdm_pins: pinmux_mcpdm_pins { + pinctrl-single,pins = < + 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */ + 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */ + 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */ + 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */ + 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ + >; + }; + + mcbsp1_pins: pinmux_mcbsp1_pins { + pinctrl-single,pins = < + 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */ + 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */ + 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */ + 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ + >; + }; + + dss_hdmi_pins: pinmux_dss_hdmi_pins { + pinctrl-single,pins = < + 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ + 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ + 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ + >; + }; + + tpd12s015_pins: pinmux_tpd12s015_pins { + pinctrl-single,pins = < + 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ + 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ + 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ + 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */ + 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */ + 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c4_pins: pinmux_i2c4_pins { + pinctrl-single,pins = < + 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */ + 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + clock-frequency = <400000>; + + twl: twl@48 { + reg = <0x48>; + /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ + interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ + interrupt-parent = <&gic>; + }; + + twl6040: twl@4b { + compatible = "ti,twl6040"; + reg = <0x4b>; + /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ + interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */ + interrupt-parent = <&gic>; + ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ + + vio-supply = <&v1v8>; + v2v1-supply = <&v2v1>; + enable-active-high; + }; +}; + +/include/ "twl6030.dtsi" + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + + clock-frequency = <400000>; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + + clock-frequency = <100000>; + + /* + * Display monitor features are burnt in their EEPROM as EDID data. + * The EEPROM is connected as I2C slave device. + */ + eeprom@50 { + compatible = "ti,eeprom"; + reg = <0x50>; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + + clock-frequency = <400000>; +}; + +&mmc1 { + vmmc-supply = <&vmmc>; + bus-width = <8>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&mmc4 { + status = "disabled"; +}; + +&mmc5 { + ti,non-removable; + bus-width = <4>; +}; + +&emif1 { + cs1-used; + device-handle = <&elpida_ECB240ABACN>; +}; + +&emif2 { + cs1-used; + device-handle = <&elpida_ECB240ABACN>; +}; + +&mcbsp2 { + status = "disabled"; +}; + +&mcbsp3 { + status = "disabled"; +}; + +&dmic { + status = "disabled"; +}; + +&twl_usb_comparator { + usb-supply = <&vusb>; +}; + +&usb_otg_hs { + interface-type = <1>; + mode = <3>; + power = <50>; +}; diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index 73bc1a67e44..f1d8c217ce1 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -5,7 +5,10 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -/include/ "omap4-panda.dts" +/dts-v1/; + +/include/ "omap4460.dtsi" +/include/ "omap4-panda-common.dtsi" /* Audio routing is differnet between PandaBoard4430 and PandaBoardES */ &sound { diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index 4122efe31cf..f8b221f0168 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts @@ -7,202 +7,5 @@ */ /dts-v1/; -/include/ "omap4.dtsi" -/include/ "elpida_ecb240abacn.dtsi" - -/ { - model = "TI OMAP4 PandaBoard"; - compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4"; - - memory { - device_type = "memory"; - reg = <0x80000000 0x40000000>; /* 1 GB */ - }; - - leds { - compatible = "gpio-leds"; - heartbeat { - label = "pandaboard::status1"; - gpios = <&gpio1 7 0>; - linux,default-trigger = "heartbeat"; - }; - - mmc { - label = "pandaboard::status2"; - gpios = <&gpio1 8 0>; - linux,default-trigger = "mmc0"; - }; - }; - - sound: sound { - compatible = "ti,abe-twl6040"; - ti,model = "PandaBoard"; - - ti,mclk-freq = <38400000>; - - ti,mcpdm = <&mcpdm>; - - ti,twl6040 = <&twl6040>; - - /* Audio routing */ - ti,audio-routing = - "Headset Stereophone", "HSOL", - "Headset Stereophone", "HSOR", - "Ext Spk", "HFL", - "Ext Spk", "HFR", - "Line Out", "AUXL", - "Line Out", "AUXR", - "HSMIC", "Headset Mic", - "Headset Mic", "Headset Mic Bias", - "AFML", "Line In", - "AFMR", "Line In"; - }; -}; - -&omap4_pmx_core { - pinctrl-names = "default"; - pinctrl-0 = < - &twl6040_pins - &mcpdm_pins - &mcbsp1_pins - &dss_hdmi_pins - &tpd12s015_pins - >; - - twl6040_pins: pinmux_twl6040_pins { - pinctrl-single,pins = < - 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ - 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */ - >; - }; - - mcpdm_pins: pinmux_mcpdm_pins { - pinctrl-single,pins = < - 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */ - 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */ - 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */ - 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */ - 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ - >; - }; - - mcbsp1_pins: pinmux_mcbsp1_pins { - pinctrl-single,pins = < - 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */ - 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */ - 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */ - 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ - >; - }; - - dss_hdmi_pins: pinmux_dss_hdmi_pins { - pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ - 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ - >; - }; - - tpd12s015_pins: pinmux_tpd12s015_pins { - pinctrl-single,pins = < - 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ - 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ - 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ - >; - }; -}; - -&i2c1 { - clock-frequency = <400000>; - - twl: twl@48 { - reg = <0x48>; - /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ - interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ - interrupt-parent = <&gic>; - }; - - twl6040: twl@4b { - compatible = "ti,twl6040"; - reg = <0x4b>; - /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ - interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */ - interrupt-parent = <&gic>; - ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ - - vio-supply = <&v1v8>; - v2v1-supply = <&v2v1>; - enable-active-high; - }; -}; - -/include/ "twl6030.dtsi" - -&i2c2 { - clock-frequency = <400000>; -}; - -&i2c3 { - clock-frequency = <100000>; - - /* - * Display monitor features are burnt in their EEPROM as EDID data. - * The EEPROM is connected as I2C slave device. - */ - eeprom@50 { - compatible = "ti,eeprom"; - reg = <0x50>; - }; -}; - -&i2c4 { - clock-frequency = <400000>; -}; - -&mmc1 { - vmmc-supply = <&vmmc>; - bus-width = <8>; -}; - -&mmc2 { - status = "disabled"; -}; - -&mmc3 { - status = "disabled"; -}; - -&mmc4 { - status = "disabled"; -}; - -&mmc5 { - ti,non-removable; - bus-width = <4>; -}; - -&emif1 { - cs1-used; - device-handle = <&elpida_ECB240ABACN>; -}; - -&emif2 { - cs1-used; - device-handle = <&elpida_ECB240ABACN>; -}; - -&mcbsp2 { - status = "disabled"; -}; - -&mcbsp3 { - status = "disabled"; -}; - -&dmic { - status = "disabled"; -}; - -&twl_usb_comparator { - usb-supply = <&vusb>; -}; +/include/ "omap443x.dtsi" +/include/ "omap4-panda-common.dtsi" diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 43e5258a937..c387bdc1b1d 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap4.dtsi" +/include/ "omap443x.dtsi" /include/ "elpida_ecb240abacn.dtsi" / { @@ -80,6 +80,32 @@ }; }; + pwmleds { + compatible = "pwm-leds"; + kpad { + label = "omap4::keypad"; + pwms = <&twl_pwm 0 7812500>; + max-brightness = <127>; + }; + + charging { + label = "omap4:green:chrg"; + pwms = <&twl_pwmled 0 7812500>; + max-brightness = <255>; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&twl_pwm 1 7812500>; + brightness-levels = < + 0 10 20 30 40 + 50 60 70 80 90 + 100 110 120 127 + >; + default-brightness-level = <13>; + }; + sound { compatible = "ti,abe-twl6040"; ti,model = "SDP4430"; @@ -212,9 +238,40 @@ 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ >; }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ + 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */ + 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */ + 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c4_pins: pinmux_i2c4_pins { + pinctrl-single,pins = < + 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */ + 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; }; &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <400000>; twl: twl@48 { @@ -253,10 +310,16 @@ /include/ "twl6030.dtsi" &i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; }; &i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + clock-frequency = <400000>; /* @@ -279,6 +342,9 @@ }; &i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + clock-frequency = <400000>; /* @@ -428,3 +494,9 @@ &twl_usb_comparator { usb-supply = <&vusb>; }; + +&usb_otg_hs { + interface-type = <1>; + mode = <3>; + power = <50>; +}; diff --git a/arch/arm/boot/dts/omap4-var-som.dts b/arch/arm/boot/dts/omap4-var-som.dts index 6601e6af609..222a413c2c5 100644 --- a/arch/arm/boot/dts/omap4-var-som.dts +++ b/arch/arm/boot/dts/omap4-var-som.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap4.dtsi" +/include/ "omap443x.dtsi" / { model = "Variscite OMAP4 SOM"; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 739bb79e410..2a5642882c8 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -94,6 +94,11 @@ #size-cells = <1>; ranges; ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; + reg = <0x44000000 0x1000>, + <0x44800000 0x2000>, + <0x45000000 0x1000>; + interrupts = <0 9 0x4>, + <0 10 0x4>; counter32k: counter@4a304000 { compatible = "ti,omap-counter32k"; @@ -118,15 +123,28 @@ pinctrl-single,function-mask = <0x7fff>; }; + sdma: dma-controller@4a056000 { + compatible = "ti,omap4430-sdma"; + reg = <0x4a056000 0x1000>; + interrupts = <0 12 0x4>, + <0 13 0x4>, + <0 14 0x4>, + <0 15 0x4>; + #dma-cells = <1>; + #dma-channels = <32>; + #dma-requests = <127>; + }; + gpio1: gpio@4a310000 { compatible = "ti,omap4-gpio"; reg = <0x4a310000 0x200>; interrupts = <0 29 0x4>; ti,hwmods = "gpio1"; + ti,gpio-always-on; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio2: gpio@48055000 { @@ -137,7 +155,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio3: gpio@48057000 { @@ -148,7 +166,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio4: gpio@48059000 { @@ -159,7 +177,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio5: gpio@4805b000 { @@ -170,7 +188,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio6: gpio@4805d000 { @@ -181,7 +199,18 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; + }; + + gpmc: gpmc@50000000 { + compatible = "ti,omap4430-gpmc"; + reg = <0x50000000 0x1000>; + #address-cells = <2>; + #size-cells = <1>; + interrupts = <0 20 0x4>; + gpmc,num-cs = <8>; + gpmc,num-waitpins = <4>; + ti,hwmods = "gpmc"; }; uart1: serial@4806a000 { @@ -260,6 +289,16 @@ #size-cells = <0>; ti,hwmods = "mcspi1"; ti,spi-num-cs = <4>; + dmas = <&sdma 35>, + <&sdma 36>, + <&sdma 37>, + <&sdma 38>, + <&sdma 39>, + <&sdma 40>, + <&sdma 41>, + <&sdma 42>; + dma-names = "tx0", "rx0", "tx1", "rx1", + "tx2", "rx2", "tx3", "rx3"; }; mcspi2: spi@4809a000 { @@ -270,6 +309,11 @@ #size-cells = <0>; ti,hwmods = "mcspi2"; ti,spi-num-cs = <2>; + dmas = <&sdma 43>, + <&sdma 44>, + <&sdma 45>, + <&sdma 46>; + dma-names = "tx0", "rx0", "tx1", "rx1"; }; mcspi3: spi@480b8000 { @@ -280,6 +324,8 @@ #size-cells = <0>; ti,hwmods = "mcspi3"; ti,spi-num-cs = <2>; + dmas = <&sdma 15>, <&sdma 16>; + dma-names = "tx0", "rx0"; }; mcspi4: spi@480ba000 { @@ -290,6 +336,8 @@ #size-cells = <0>; ti,hwmods = "mcspi4"; ti,spi-num-cs = <1>; + dmas = <&sdma 70>, <&sdma 71>; + dma-names = "tx0", "rx0"; }; mmc1: mmc@4809c000 { @@ -299,6 +347,8 @@ ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; + dmas = <&sdma 61>, <&sdma 62>; + dma-names = "tx", "rx"; }; mmc2: mmc@480b4000 { @@ -307,6 +357,8 @@ interrupts = <0 86 0x4>; ti,hwmods = "mmc2"; ti,needs-special-reset; + dmas = <&sdma 47>, <&sdma 48>; + dma-names = "tx", "rx"; }; mmc3: mmc@480ad000 { @@ -315,6 +367,8 @@ interrupts = <0 94 0x4>; ti,hwmods = "mmc3"; ti,needs-special-reset; + dmas = <&sdma 77>, <&sdma 78>; + dma-names = "tx", "rx"; }; mmc4: mmc@480d1000 { @@ -323,6 +377,8 @@ interrupts = <0 96 0x4>; ti,hwmods = "mmc4"; ti,needs-special-reset; + dmas = <&sdma 57>, <&sdma 58>; + dma-names = "tx", "rx"; }; mmc5: mmc@480d5000 { @@ -331,6 +387,8 @@ interrupts = <0 59 0x4>; ti,hwmods = "mmc5"; ti,needs-special-reset; + dmas = <&sdma 59>, <&sdma 60>; + dma-names = "tx", "rx"; }; wdt2: wdt@4a314000 { @@ -347,6 +405,9 @@ reg-names = "mpu", "dma"; interrupts = <0 112 0x4>; ti,hwmods = "mcpdm"; + dmas = <&sdma 65>, + <&sdma 66>; + dma-names = "up_link", "dn_link"; }; dmic: dmic@4012e000 { @@ -356,6 +417,8 @@ reg-names = "mpu", "dma"; interrupts = <0 114 0x4>; ti,hwmods = "dmic"; + dmas = <&sdma 67>; + dma-names = "up_link"; }; mcbsp1: mcbsp@40122000 { @@ -367,6 +430,9 @@ interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; + dmas = <&sdma 33>, + <&sdma 34>; + dma-names = "tx", "rx"; }; mcbsp2: mcbsp@40124000 { @@ -378,6 +444,9 @@ interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; + dmas = <&sdma 17>, + <&sdma 18>; + dma-names = "tx", "rx"; }; mcbsp3: mcbsp@40126000 { @@ -389,6 +458,9 @@ interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; + dmas = <&sdma 19>, + <&sdma 20>; + dma-names = "tx", "rx"; }; mcbsp4: mcbsp@48096000 { @@ -399,6 +471,9 @@ interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; + dmas = <&sdma 31>, + <&sdma 32>; + dma-names = "tx", "rx"; }; keypad: keypad@4a31c000 { @@ -438,10 +513,15 @@ #size-cells = <1>; ranges; ti,hwmods = "ocp2scp_usb_phy"; + usb2_phy: usb2phy@4a0ad080 { + compatible = "ti,omap-usb2"; + reg = <0x4a0ad080 0x58>; + ctrl-module = <&omap_control_usb>; + }; }; timer1: timer@4a318000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x4a318000 0x80>; interrupts = <0 37 0x4>; ti,hwmods = "timer1"; @@ -449,28 +529,28 @@ }; timer2: timer@48032000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x48032000 0x80>; interrupts = <0 38 0x4>; ti,hwmods = "timer2"; }; timer3: timer@48034000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x48034000 0x80>; interrupts = <0 39 0x4>; ti,hwmods = "timer3"; }; timer4: timer@48036000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x48036000 0x80>; interrupts = <0 40 0x4>; ti,hwmods = "timer4"; }; timer5: timer@40138000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x40138000 0x80>, <0x49038000 0x80>; interrupts = <0 41 0x4>; @@ -479,7 +559,7 @@ }; timer6: timer@4013a000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x4013a000 0x80>, <0x4903a000 0x80>; interrupts = <0 42 0x4>; @@ -488,7 +568,7 @@ }; timer7: timer@4013c000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x4013c000 0x80>, <0x4903c000 0x80>; interrupts = <0 43 0x4>; @@ -497,7 +577,7 @@ }; timer8: timer@4013e000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x4013e000 0x80>, <0x4903e000 0x80>; interrupts = <0 44 0x4>; @@ -507,7 +587,7 @@ }; timer9: timer@4803e000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x4803e000 0x80>; interrupts = <0 45 0x4>; ti,hwmods = "timer9"; @@ -515,7 +595,7 @@ }; timer10: timer@48086000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap3430-timer"; reg = <0x48086000 0x80>; interrupts = <0 46 0x4>; ti,hwmods = "timer10"; @@ -523,11 +603,62 @@ }; timer11: timer@48088000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap4430-timer"; reg = <0x48088000 0x80>; interrupts = <0 47 0x4>; ti,hwmods = "timer11"; ti,timer-pwm; }; + + usbhstll: usbhstll@4a062000 { + compatible = "ti,usbhs-tll"; + reg = <0x4a062000 0x1000>; + interrupts = <0 78 0x4>; + ti,hwmods = "usb_tll_hs"; + }; + + usbhshost: usbhshost@4a064000 { + compatible = "ti,usbhs-host"; + reg = <0x4a064000 0x800>; + ti,hwmods = "usb_host_hs"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbhsohci: ohci@4a064800 { + compatible = "ti,ohci-omap3", "usb-ohci"; + reg = <0x4a064800 0x400>; + interrupt-parent = <&gic>; + interrupts = <0 76 0x4>; + }; + + usbhsehci: ehci@4a064c00 { + compatible = "ti,ehci-omap", "usb-ehci"; + reg = <0x4a064c00 0x400>; + interrupt-parent = <&gic>; + interrupts = <0 77 0x4>; + }; + }; + + omap_control_usb: omap-control-usb@4a002300 { + compatible = "ti,omap-control-usb"; + reg = <0x4a002300 0x4>, + <0x4a00233c 0x4>; + reg-names = "control_dev_conf", "otghs_control"; + ti,type = <1>; + }; + + usb_otg_hs: usb_otg_hs@4a0ab000 { + compatible = "ti,omap4-musb"; + reg = <0x4a0ab000 0x7ff>; + interrupts = <0 92 0x4>, <0 93 0x4>; + interrupt-names = "mc", "dma"; + ti,hwmods = "usb_otg_hs"; + usb-phy = <&usb2_phy>; + multipoint = <1>; + num-eps = <16>; + ram-bits = <12>; + ti,has-mailbox; + }; }; }; diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi new file mode 100644 index 00000000000..cccf39af492 --- /dev/null +++ b/arch/arm/boot/dts/omap443x.dtsi @@ -0,0 +1,27 @@ +/* + * Device Tree Source for OMAP443x SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "omap4.dtsi" + +/ { + cpus { + cpu@0 { + /* OMAP443x variants OPP50-OPPNT */ + operating-points = < + /* kHz uV */ + 300000 1025000 + 600000 1200000 + 800000 1313000 + 1008000 1375000 + >; + clock-latency = <300000>; /* From legacy driver */ + }; + }; +}; diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi new file mode 100644 index 00000000000..7c2c23cc17e --- /dev/null +++ b/arch/arm/boot/dts/omap4460.dtsi @@ -0,0 +1,32 @@ +/* + * Device Tree Source for OMAP4460 SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +/include/ "omap4.dtsi" + +/ { + cpus { + /* OMAP446x 'standard device' variants OPP50 to OPPTurbo */ + cpu@0 { + operating-points = < + /* kHz uV */ + 350000 975000 + 700000 1075000 + 920000 1200000 + >; + clock-latency = <300000>; /* From legacy driver */ + }; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 54 0x4>, + <0 55 0x4>; + ti,hwmods = "debugss"; + }; +}; diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts index 8722c15bbba..982acd19477 100644 --- a/arch/arm/boot/dts/omap5-evm.dts +++ b/arch/arm/boot/dts/omap5-evm.dts @@ -16,7 +16,7 @@ memory { device_type = "memory"; - reg = <0x80000000 0x80000000>; /* 2 GB */ + reg = <0x80000000 0x7F000000>; /* 2032 MB */ }; vmmcsd_fixed: fixedregulator-mmcsd { @@ -80,6 +80,68 @@ 0x15a 0x100 /* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */ >; }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x1b2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ + 0x1b4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + 0x178 0x100 /* i2c2_scl INPUTENABLE | MODE0 */ + 0x17a 0x100 /* i2c2_sda INPUTENABLE | MODE0 */ + >; + }; + + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + 0x13a 0x100 /* i2c3_scl INPUTENABLE | MODE0 */ + 0x13c 0x100 /* i2c3_sda INPUTENABLE | MODE0 */ + >; + }; + + i2c4_pins: pinmux_i2c4_pins { + pinctrl-single,pins = < + 0xb8 0x100 /* i2c4_scl INPUTENABLE | MODE0 */ + 0xba 0x100 /* i2c4_sda INPUTENABLE | MODE0 */ + >; + }; + + i2c5_pins: pinmux_i2c5_pins { + pinctrl-single,pins = < + 0x184 0x100 /* i2c5_scl INPUTENABLE | MODE0 */ + 0x186 0x100 /* i2c5_sda INPUTENABLE | MODE0 */ + >; + }; + + mcspi2_pins: pinmux_mcspi2_pins { + pinctrl-single,pins = < + 0xbc 0x100 /* MCSPI2_CLK INPUTENABLE | MODE0 */ + 0xbe 0x100 /* MCSPI2_SIMO INPUTENABLE | MODE0 */ + 0xc0 0x118 /* MCSPI2_SOMI PULLUP | INPUTENABLE | MODE0*/ + 0xc2 0x0 /* MCSPI2_CS MODE0*/ + >; + }; + + mcspi3_pins: pinmux_mcspi3_pins { + pinctrl-single,pins = < + 0x78 0x101 /* MCSPI2_SOMI INPUTENABLE | MODE1 */ + 0x7a 0x101 /* MCSPI2_CS INPUTENABLE | MODE1 */ + 0x7c 0x101 /* MCSPI2_SIMO INPUTENABLE | MODE1 */ + 0x7e 0x101 /* MCSPI2_CLK INPUTENABLE | MODE1 */ + >; + }; + + mcspi4_pins: pinmux_mcspi4_pins { + pinctrl-single,pins = < + 0x164 0x101 /* MCSPI2_CLK INPUTENABLE | MODE1 */ + 0x168 0x101 /* MCSPI2_SIMO INPUTENABLE | MODE1 */ + 0x16a 0x101 /* MCSPI2_SOMI INPUTENABLE | MODE1 */ + 0x16c 0x101 /* MCSPI2_CS INPUTENABLE | MODE1 */ + >; + }; }; &mmc1 { @@ -106,7 +168,17 @@ status = "disabled"; }; +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + clock-frequency = <400000>; +}; + &i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; /* Pressure Sensor */ @@ -116,7 +188,17 @@ }; }; +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + + clock-frequency = <400000>; +}; + &i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + clock-frequency = <400000>; /* Temperature Sensor */ @@ -126,6 +208,13 @@ }; }; +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_pins>; + + clock-frequency = <400000>; +}; + &keypad { keypad,num-rows = <8>; keypad,num-columns = <8>; @@ -151,3 +240,22 @@ cs1-used; device-handle = <&samsung_K3PE0E000B>; }; + +&mcspi1 { + +}; + +&mcspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi2_pins>; +}; + +&mcspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi3_pins>; +}; + +&mcspi4 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi4_pins>; +}; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 790bb2a4b34..3dd7ff82582 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -18,6 +18,9 @@ /include/ "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ti,omap5"; interrupt-parent = <&gic>; @@ -33,24 +36,32 @@ cpus { cpu@0 { compatible = "arm,cortex-a15"; - timer { - compatible = "arm,armv7-timer"; - /* 14th PPI IRQ, active low level-sensitive */ - interrupts = <1 14 0x308>; - clock-frequency = <6144000>; - }; }; cpu@1 { compatible = "arm,cortex-a15"; - timer { - compatible = "arm,armv7-timer"; - /* 14th PPI IRQ, active low level-sensitive */ - interrupts = <1 14 0x308>; - clock-frequency = <6144000>; - }; }; }; + timer { + compatible = "arm,armv7-timer"; + /* PPI secure/nonsecure IRQ, active low level-sensitive */ + interrupts = <1 13 0x308>, + <1 14 0x308>, + <1 11 0x308>, + <1 10 0x308>; + clock-frequency = <6144000>; + }; + + gic: interrupt-controller@48211000 { + compatible = "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48211000 0x1000>, + <0x48212000 0x1000>, + <0x48214000 0x2000>, + <0x48216000 0x2000>; + }; + /* * The soc node represents the soc top level view. It is uses for IPs * that are not memory mapped in the MPU view or for the MPU itself. @@ -76,6 +87,11 @@ #size-cells = <1>; ranges; ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; + reg = <0x44000000 0x2000>, + <0x44800000 0x3000>, + <0x45000000 0x4000>; + interrupts = <0 9 0x4>, + <0 10 0x4>; counter32k: counter@4ae04000 { compatible = "ti,omap-counter32k"; @@ -100,12 +116,16 @@ pinctrl-single,function-mask = <0x7fff>; }; - gic: interrupt-controller@48211000 { - compatible = "arm,cortex-a15-gic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x48211000 0x1000>, - <0x48212000 0x1000>; + sdma: dma-controller@4a056000 { + compatible = "ti,omap4430-sdma"; + reg = <0x4a056000 0x1000>; + interrupts = <0 12 0x4>, + <0 13 0x4>, + <0 14 0x4>, + <0 15 0x4>; + #dma-cells = <1>; + #dma-channels = <32>; + #dma-requests = <127>; }; gpio1: gpio@4ae10000 { @@ -113,10 +133,11 @@ reg = <0x4ae10000 0x200>; interrupts = <0 29 0x4>; ti,hwmods = "gpio1"; + ti,gpio-always-on; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio2: gpio@48055000 { @@ -127,7 +148,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio3: gpio@48057000 { @@ -138,7 +159,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio4: gpio@48059000 { @@ -149,7 +170,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio5: gpio@4805b000 { @@ -160,7 +181,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio6: gpio@4805d000 { @@ -171,7 +192,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio7: gpio@48051000 { @@ -182,7 +203,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; }; gpio8: gpio@48053000 { @@ -193,7 +214,18 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; + }; + + gpmc: gpmc@50000000 { + compatible = "ti,omap4430-gpmc"; + reg = <0x50000000 0x1000>; + #address-cells = <2>; + #size-cells = <1>; + interrupts = <0 20 0x4>; + gpmc,num-cs = <8>; + gpmc,num-waitpins = <4>; + ti,hwmods = "gpmc"; }; i2c1: i2c@48070000 { @@ -241,6 +273,65 @@ ti,hwmods = "i2c5"; }; + mcspi1: spi@48098000 { + compatible = "ti,omap4-mcspi"; + reg = <0x48098000 0x200>; + interrupts = <0 65 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi1"; + ti,spi-num-cs = <4>; + dmas = <&sdma 35>, + <&sdma 36>, + <&sdma 37>, + <&sdma 38>, + <&sdma 39>, + <&sdma 40>, + <&sdma 41>, + <&sdma 42>; + dma-names = "tx0", "rx0", "tx1", "rx1", + "tx2", "rx2", "tx3", "rx3"; + }; + + mcspi2: spi@4809a000 { + compatible = "ti,omap4-mcspi"; + reg = <0x4809a000 0x200>; + interrupts = <0 66 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi2"; + ti,spi-num-cs = <2>; + dmas = <&sdma 43>, + <&sdma 44>, + <&sdma 45>, + <&sdma 46>; + dma-names = "tx0", "rx0", "tx1", "rx1"; + }; + + mcspi3: spi@480b8000 { + compatible = "ti,omap4-mcspi"; + reg = <0x480b8000 0x200>; + interrupts = <0 91 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi3"; + ti,spi-num-cs = <2>; + dmas = <&sdma 15>, <&sdma 16>; + dma-names = "tx0", "rx0"; + }; + + mcspi4: spi@480ba000 { + compatible = "ti,omap4-mcspi"; + reg = <0x480ba000 0x200>; + interrupts = <0 48 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi4"; + ti,spi-num-cs = <1>; + dmas = <&sdma 70>, <&sdma 71>; + dma-names = "tx0", "rx0"; + }; + uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; @@ -296,6 +387,8 @@ ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; + dmas = <&sdma 61>, <&sdma 62>; + dma-names = "tx", "rx"; }; mmc2: mmc@480b4000 { @@ -304,6 +397,8 @@ interrupts = <0 86 0x4>; ti,hwmods = "mmc2"; ti,needs-special-reset; + dmas = <&sdma 47>, <&sdma 48>; + dma-names = "tx", "rx"; }; mmc3: mmc@480ad000 { @@ -312,6 +407,8 @@ interrupts = <0 94 0x4>; ti,hwmods = "mmc3"; ti,needs-special-reset; + dmas = <&sdma 77>, <&sdma 78>; + dma-names = "tx", "rx"; }; mmc4: mmc@480d1000 { @@ -320,6 +417,8 @@ interrupts = <0 96 0x4>; ti,hwmods = "mmc4"; ti,needs-special-reset; + dmas = <&sdma 57>, <&sdma 58>; + dma-names = "tx", "rx"; }; mmc5: mmc@480d5000 { @@ -328,10 +427,13 @@ interrupts = <0 59 0x4>; ti,hwmods = "mmc5"; ti,needs-special-reset; + dmas = <&sdma 59>, <&sdma 60>; + dma-names = "tx", "rx"; }; keypad: keypad@4ae1c000 { compatible = "ti,omap4-keypad"; + reg = <0x4ae1c000 0x400>; ti,hwmods = "kbd"; }; @@ -342,6 +444,9 @@ reg-names = "mpu", "dma"; interrupts = <0 112 0x4>; ti,hwmods = "mcpdm"; + dmas = <&sdma 65>, + <&sdma 66>; + dma-names = "up_link", "dn_link"; }; dmic: dmic@4012e000 { @@ -351,6 +456,8 @@ reg-names = "mpu", "dma"; interrupts = <0 114 0x4>; ti,hwmods = "dmic"; + dmas = <&sdma 67>; + dma-names = "up_link"; }; mcbsp1: mcbsp@40122000 { @@ -362,6 +469,9 @@ interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; + dmas = <&sdma 33>, + <&sdma 34>; + dma-names = "tx", "rx"; }; mcbsp2: mcbsp@40124000 { @@ -373,6 +483,9 @@ interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; + dmas = <&sdma 17>, + <&sdma 18>; + dma-names = "tx", "rx"; }; mcbsp3: mcbsp@40126000 { @@ -384,10 +497,13 @@ interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; + dmas = <&sdma 19>, + <&sdma 20>; + dma-names = "tx", "rx"; }; timer1: timer@4ae18000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; interrupts = <0 37 0x4>; ti,hwmods = "timer1"; @@ -395,28 +511,28 @@ }; timer2: timer@48032000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; interrupts = <0 38 0x4>; ti,hwmods = "timer2"; }; timer3: timer@48034000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; interrupts = <0 39 0x4>; ti,hwmods = "timer3"; }; timer4: timer@48036000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; interrupts = <0 40 0x4>; ti,hwmods = "timer4"; }; timer5: timer@40138000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x40138000 0x80>, <0x49038000 0x80>; interrupts = <0 41 0x4>; @@ -425,7 +541,7 @@ }; timer6: timer@4013a000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x4013a000 0x80>, <0x4903a000 0x80>; interrupts = <0 42 0x4>; @@ -435,7 +551,7 @@ }; timer7: timer@4013c000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x4013c000 0x80>, <0x4903c000 0x80>; interrupts = <0 43 0x4>; @@ -444,7 +560,7 @@ }; timer8: timer@4013e000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x4013e000 0x80>, <0x4903e000 0x80>; interrupts = <0 44 0x4>; @@ -454,27 +570,34 @@ }; timer9: timer@4803e000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; interrupts = <0 45 0x4>; ti,hwmods = "timer9"; }; timer10: timer@48086000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; interrupts = <0 46 0x4>; ti,hwmods = "timer10"; }; timer11: timer@48088000 { - compatible = "ti,omap2-timer"; + compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; interrupts = <0 47 0x4>; ti,hwmods = "timer11"; ti,timer-pwm; }; + wdt2: wdt@4ae14000 { + compatible = "ti,omap5-wdt", "ti,omap3-wdt"; + reg = <0x4ae14000 0x80>; + interrupts = <0 80 0x4>; + ti,hwmods = "wd_timer2"; + }; + emif1: emif@0x4c000000 { compatible = "ti,emif-4d5"; ti,hwmods = "emif1"; @@ -496,5 +619,53 @@ hw-caps-ll-interface; hw-caps-temp-alert; }; + + omap_control_usb: omap-control-usb@4a002300 { + compatible = "ti,omap-control-usb"; + reg = <0x4a002300 0x4>, + <0x4a002370 0x4>; + reg-names = "control_dev_conf", "phy_power_usb"; + ti,type = <2>; + }; + + omap_dwc3@4a020000 { + compatible = "ti,dwc3"; + ti,hwmods = "usb_otg_ss"; + reg = <0x4a020000 0x1000>; + interrupts = <0 93 4>; + #address-cells = <1>; + #size-cells = <1>; + utmi-mode = <2>; + ranges; + dwc3@4a030000 { + compatible = "synopsys,dwc3"; + reg = <0x4a030000 0x1000>; + interrupts = <0 92 4>; + usb-phy = <&usb2_phy>, <&usb3_phy>; + tx-fifo-resize; + }; + }; + + ocp2scp { + compatible = "ti,omap-ocp2scp"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "ocp2scp1"; + usb2_phy: usb2phy@4a084000 { + compatible = "ti,omap-usb2"; + reg = <0x4a084000 0x7c>; + ctrl-module = <&omap_control_usb>; + }; + + usb3_phy: usb3phy@4a084400 { + compatible = "ti,omap-usb3"; + reg = <0x4a084400 0x80>, + <0x4a084800 0x64>, + <0x4a084c00 0x40>; + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; + ctrl-module = <&omap_control_usb>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi index f7bec3b1ba3..892c64e3f1e 100644 --- a/arch/arm/boot/dts/orion5x.dtsi +++ b/arch/arm/boot/dts/orion5x.dtsi @@ -74,6 +74,20 @@ status = "okay"; }; + ehci@50000 { + compatible = "marvell,orion-ehci"; + reg = <0x50000 0x1000>; + interrupts = <17>; + status = "disabled"; + }; + + ehci@a0000 { + compatible = "marvell,orion-ehci"; + reg = <0xa0000 0x1000>; + interrupts = <12>; + status = "disabled"; + }; + sata@80000 { compatible = "marvell,orion-sata"; reg = <0x80000 0x5000>; @@ -91,6 +105,25 @@ status = "disabled"; }; + xor@60900 { + compatible = "marvell,orion-xor"; + reg = <0x60900 0x100 + 0x60b00 0x100>; + status = "okay"; + + xor00 { + interrupts = <30>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <31>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + crypto@90000 { compatible = "marvell,orion-crypto"; reg = <0x90000 0x10000>, diff --git a/arch/arm/boot/dts/skeleton64.dtsi b/arch/arm/boot/dts/skeleton64.dtsi new file mode 100644 index 00000000000..15994158a99 --- /dev/null +++ b/arch/arm/boot/dts/skeleton64.dtsi @@ -0,0 +1,13 @@ +/* + * Skeleton device tree in the 64 bits version; the bare minimum + * needed to boot; just include and add a compatible value. The + * bootloader will typically populate the memory node. + */ + +/ { + #address-cells = <2>; + #size-cells = <2>; + chosen { }; + aliases { }; + memory { device_type = "memory"; reg = <0 0>; }; +}; diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index a30aca62658..72c1f27af7f 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -10,12 +10,915 @@ reg = <0x80000000 0x40000000>; }; + pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + clk1_out_pw4 { + nvidia,pins = "clk1_out_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + dap1_din_pn1 { + nvidia,pins = "dap1_din_pn1"; + nvidia,function = "i2s0"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + dap1_dout_pn2 { + nvidia,pins = "dap1_dout_pn2", + "dap1_fs_pn0", + "dap1_sclk_pn3"; + nvidia,function = "i2s0"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + dap2_din_pa4 { + nvidia,pins = "dap2_din_pa4"; + nvidia,function = "i2s1"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + dap2_dout_pa5 { + nvidia,pins = "dap2_dout_pa5", + "dap2_fs_pa2", + "dap2_sclk_pa3"; + nvidia,function = "i2s1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + dap4_din_pp5 { + nvidia,pins = "dap4_din_pp5", + "dap4_dout_pp6", + "dap4_fs_pp4", + "dap4_sclk_pp7"; + nvidia,function = "i2s3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + dvfs_pwm_px0 { + nvidia,pins = "dvfs_pwm_px0", + "dvfs_clk_px2"; + nvidia,function = "cldvfs"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0", + "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; + nvidia,function = "ulpi"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + ulpi_dir_py1 { + nvidia,pins = "ulpi_dir_py1", + "ulpi_nxt_py2"; + nvidia,function = "ulpi"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + ulpi_stp_py3 { + nvidia,pins = "ulpi_stp_py3"; + nvidia,function = "ulpi"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + cam_i2c_scl_pbb1 { + nvidia,pins = "cam_i2c_scl_pbb1", + "cam_i2c_sda_pbb2"; + nvidia,function = "i2c3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + nvidia,open-drain = <0>; + }; + cam_mclk_pcc0 { + nvidia,pins = "cam_mclk_pcc0", + "pbb0"; + nvidia,function = "vi_alt3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + nvidia,lock = <0>; + }; + gen2_i2c_scl_pt5 { + nvidia,pins = "gen2_i2c_scl_pt5", + "gen2_i2c_sda_pt6"; + nvidia,function = "i2c2"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + nvidia,open-drain = <0>; + }; + gmi_a16_pj7 { + nvidia,pins = "gmi_a16_pj7"; + nvidia,function = "uartd"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gmi_a17_pb0 { + nvidia,pins = "gmi_a17_pb0", + "gmi_a18_pb1"; + nvidia,function = "uartd"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + gmi_a19_pk7 { + nvidia,pins = "gmi_a19_pk7"; + nvidia,function = "uartd"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gmi_ad5_pg5 { + nvidia,pins = "gmi_ad5_pg5", + "gmi_cs6_n_pi3", + "gmi_wr_n_pi0"; + nvidia,function = "spi4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gmi_ad6_pg6 { + nvidia,pins = "gmi_ad6_pg6", + "gmi_ad7_pg7"; + nvidia,function = "spi4"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gmi_ad12_ph4 { + nvidia,pins = "gmi_ad12_ph4"; + nvidia,function = "rsvd4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gmi_ad9_ph1 { + nvidia,pins = "gmi_ad9_ph1"; + nvidia,function = "pwm1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gmi_cs1_n_pj2 { + nvidia,pins = "gmi_cs1_n_pj2", + "gmi_oe_n_pi1"; + nvidia,function = "soc"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + clk2_out_pw5 { + nvidia,pins = "clk2_out_pw5"; + nvidia,function = "extperiph2"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + sdmmc1_clk_pz0 { + nvidia,pins = "sdmmc1_clk_pz0"; + nvidia,function = "sdmmc1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + sdmmc1_cmd_pz1 { + nvidia,pins = "sdmmc1_cmd_pz1", + "sdmmc1_dat0_py7", + "sdmmc1_dat1_py6", + "sdmmc1_dat2_py5", + "sdmmc1_dat3_py4"; + nvidia,function = "sdmmc1"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + sdmmc1_wp_n_pv3 { + nvidia,pins = "sdmmc1_wp_n_pv3"; + nvidia,function = "spi4"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + sdmmc3_clk_pa6 { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + sdmmc3_cmd_pa7 { + nvidia,pins = "sdmmc3_cmd_pa7", + "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4", + "kb_col4_pq4", + "sdmmc3_clk_lb_out_pee4", + "sdmmc3_clk_lb_in_pee5"; + nvidia,function = "sdmmc3"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4"; + nvidia,function = "sdmmc4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + sdmmc4_cmd_pt7 { + nvidia,pins = "sdmmc4_cmd_pt7", + "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + clk_32k_out_pa0 { + nvidia,pins = "clk_32k_out_pa0"; + nvidia,function = "blink"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + kb_col0_pq0 { + nvidia,pins = "kb_col0_pq0", + "kb_col1_pq1", + "kb_col2_pq2", + "kb_row0_pr0", + "kb_row1_pr1", + "kb_row2_pr2"; + nvidia,function = "kbc"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + dap3_din_pp1 { + nvidia,pins = "dap3_din_pp1", + "dap3_sclk_pp3"; + nvidia,function = "displayb"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <0>; + }; + pv0 { + nvidia,pins = "pv0"; + nvidia,function = "rsvd4"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <0>; + }; + kb_row7_pr7 { + nvidia,pins = "kb_row7_pr7"; + nvidia,function = "rsvd2"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "uarta"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + kb_row9_ps1 { + nvidia,pins = "kb_row9_ps1"; + nvidia,function = "uarta"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + pwr_i2c_scl_pz6 { + nvidia,pins = "pwr_i2c_scl_pz6", + "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + nvidia,open-drain = <0>; + }; + sys_clk_req_pz5 { + nvidia,pins = "sys_clk_req_pz5"; + nvidia,function = "sysclk"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + core_pwr_req { + nvidia,pins = "core_pwr_req"; + nvidia,function = "pwron"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + cpu_pwr_req { + nvidia,pins = "cpu_pwr_req"; + nvidia,function = "cpu"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + pwr_int_n { + nvidia,pins = "pwr_int_n"; + nvidia,function = "pmi"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + reset_out_n { + nvidia,pins = "reset_out_n"; + nvidia,function = "reset_out_n"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + clk3_out_pee0 { + nvidia,pins = "clk3_out_pee0"; + nvidia,function = "extperiph3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gen1_i2c_scl_pc4 { + nvidia,pins = "gen1_i2c_scl_pc4", + "gen1_i2c_sda_pc5"; + nvidia,function = "i2c1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + nvidia,open-drain = <0>; + }; + uart2_cts_n_pj5 { + nvidia,pins = "uart2_cts_n_pj5"; + nvidia,function = "uartb"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + uart2_rts_n_pj6 { + nvidia,pins = "uart2_rts_n_pj6"; + nvidia,function = "uartb"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + uart2_rxd_pc3 { + nvidia,pins = "uart2_rxd_pc3"; + nvidia,function = "irda"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + uart2_txd_pc2 { + nvidia,pins = "uart2_txd_pc2"; + nvidia,function = "irda"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + uart3_cts_n_pa1 { + nvidia,pins = "uart3_cts_n_pa1", + "uart3_rxd_pw7"; + nvidia,function = "uartc"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + uart3_rts_n_pc0 { + nvidia,pins = "uart3_rts_n_pc0", + "uart3_txd_pw6"; + nvidia,function = "uartc"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + owr { + nvidia,pins = "owr"; + nvidia,function = "owr"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + hdmi_cec_pee3 { + nvidia,pins = "hdmi_cec_pee3"; + nvidia,function = "cec"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + nvidia,open-drain = <0>; + }; + ddc_scl_pv4 { + nvidia,pins = "ddc_scl_pv4", + "ddc_sda_pv5"; + nvidia,function = "i2c4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + nvidia,rcv-sel = <1>; + }; + spdif_in_pk6 { + nvidia,pins = "spdif_in_pk6"; + nvidia,function = "usb"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + }; + usb_vbus_en0_pn4 { + nvidia,pins = "usb_vbus_en0_pn4"; + nvidia,function = "usb"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + nvidia,lock = <0>; + nvidia,open-drain = <1>; + }; + gpio_x6_aud_px6 { + nvidia,pins = "gpio_x6_aud_px6"; + nvidia,function = "spi6"; + nvidia,pull = <2>; + nvidia,tristate = <1>; + nvidia,enable-input = <1>; + }; + gpio_x4_aud_px4 { + nvidia,pins = "gpio_x4_aud_px4", + "gpio_x7_aud_px7"; + nvidia,function = "rsvd1"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gpio_x5_aud_px5 { + nvidia,pins = "gpio_x5_aud_px5"; + nvidia,function = "rsvd1"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gpio_w2_aud_pw2 { + nvidia,pins = "gpio_w2_aud_pw2"; + nvidia,function = "rsvd2"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gpio_w3_aud_pw3 { + nvidia,pins = "gpio_w3_aud_pw3"; + nvidia,function = "spi6"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gpio_x1_aud_px1 { + nvidia,pins = "gpio_x1_aud_px1"; + nvidia,function = "rsvd4"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gpio_x3_aud_px3 { + nvidia,pins = "gpio_x3_aud_px3"; + nvidia,function = "rsvd4"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + dap3_fs_pp0 { + nvidia,pins = "dap3_fs_pp0"; + nvidia,function = "i2s2"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + dap3_dout_pp2 { + nvidia,pins = "dap3_dout_pp2"; + nvidia,function = "i2s2"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + pv1 { + nvidia,pins = "pv1"; + nvidia,function = "rsvd1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + pbb3 { + nvidia,pins = "pbb3", + "pbb5", + "pbb6", + "pbb7"; + nvidia,function = "rsvd4"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + pcc1 { + nvidia,pins = "pcc1", + "pcc2"; + nvidia,function = "rsvd4"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gmi_ad0_pg0 { + nvidia,pins = "gmi_ad0_pg0", + "gmi_ad1_pg1"; + nvidia,function = "gmi"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gmi_ad10_ph2 { + nvidia,pins = "gmi_ad10_ph2", + "gmi_ad11_ph3", + "gmi_ad13_ph5", + "gmi_ad8_ph0", + "gmi_clk_pk1"; + nvidia,function = "gmi"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + gmi_ad2_pg2 { + nvidia,pins = "gmi_ad2_pg2", + "gmi_ad3_pg3"; + nvidia,function = "gmi"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gmi_adv_n_pk0 { + nvidia,pins = "gmi_adv_n_pk0", + "gmi_cs0_n_pj0", + "gmi_cs2_n_pk3", + "gmi_cs4_n_pk2", + "gmi_cs7_n_pi6", + "gmi_dqs_p_pj3", + "gmi_iordy_pi5", + "gmi_wp_n_pc7"; + nvidia,function = "gmi"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + gmi_cs3_n_pk4 { + nvidia,pins = "gmi_cs3_n_pk4"; + nvidia,function = "gmi"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + clk2_req_pcc5 { + nvidia,pins = "clk2_req_pcc5"; + nvidia,function = "rsvd4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + kb_col3_pq3 { + nvidia,pins = "kb_col3_pq3", + "kb_col6_pq6", + "kb_col7_pq7"; + nvidia,function = "kbc"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + kb_col5_pq5 { + nvidia,pins = "kb_col5_pq5"; + nvidia,function = "kbc"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + kb_row3_pr3 { + nvidia,pins = "kb_row3_pr3", + "kb_row4_pr4", + "kb_row6_pr6", + "kb_row8_ps0"; + nvidia,function = "kbc"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + clk3_req_pee1 { + nvidia,pins = "clk3_req_pee1"; + nvidia,function = "rsvd4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + pu4 { + nvidia,pins = "pu4"; + nvidia,function = "displayb"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <0>; + }; + pu5 { + nvidia,pins = "pu5", + "pu6"; + nvidia,function = "displayb"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + hdmi_int_pn7 { + nvidia,pins = "hdmi_int_pn7"; + nvidia,function = "rsvd1"; + nvidia,pull = <1>; + nvidia,tristate = <0>; + nvidia,enable-input = <1>; + }; + clk1_req_pee2 { + nvidia,pins = "clk1_req_pee2", + "usb_vbus_en1_pn5"; + nvidia,function = "rsvd4"; + nvidia,pull = <1>; + nvidia,tristate = <1>; + nvidia,enable-input = <0>; + }; + + drive_sdio1 { + nvidia,pins = "drive_sdio1"; + nvidia,high-speed-mode = <1>; + nvidia,schmitt = <0>; + nvidia,low-power-mode = <3>; + nvidia,pull-down-strength = <36>; + nvidia,pull-up-strength = <20>; + nvidia,slew-rate-rising = <2>; + nvidia,slew-rate-falling = <2>; + }; + drive_sdio3 { + nvidia,pins = "drive_sdio3"; + nvidia,high-speed-mode = <1>; + nvidia,schmitt = <0>; + nvidia,low-power-mode = <3>; + nvidia,pull-down-strength = <22>; + nvidia,pull-up-strength = <36>; + nvidia,slew-rate-rising = <0>; + nvidia,slew-rate-falling = <0>; + }; + drive_gma { + nvidia,pins = "drive_gma"; + nvidia,high-speed-mode = <1>; + nvidia,schmitt = <0>; + nvidia,low-power-mode = <3>; + nvidia,pull-down-strength = <2>; + nvidia,pull-up-strength = <1>; + nvidia,slew-rate-rising = <0>; + nvidia,slew-rate-falling = <0>; + nvidia,drive-type = <1>; + }; + }; + }; + serial@70006300 { status = "okay"; - clock-frequency = <408000000>; + }; + + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + + battery: smart-battery { + compatible = "ti,bq20z45", "sbs,sbs-battery"; + reg = <0xb>; + battery-name = "battery"; + sbs,i2c-retry-count = <2>; + sbs,poll-retry-count = <100>; + }; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + tps51632 { + compatible = "ti,tps51632"; + reg = <0x43>; + regulator-name = "vdd-cpu"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1520000>; + regulator-boot-on; + regulator-always-on; + }; + + tps65090 { + compatible = "ti,tps65090"; + reg = <0x48>; + interrupt-parent = <&gpio>; + interrupts = <72 0x04>; /* gpio PJ0 */ + + vsys1-supply = <&vdd_ac_bat_reg>; + vsys2-supply = <&vdd_ac_bat_reg>; + vsys3-supply = <&vdd_ac_bat_reg>; + infet1-supply = <&vdd_ac_bat_reg>; + infet2-supply = <&vdd_ac_bat_reg>; + infet3-supply = <&tps65090_dcdc2_reg>; + infet4-supply = <&tps65090_dcdc2_reg>; + infet5-supply = <&tps65090_dcdc2_reg>; + infet6-supply = <&tps65090_dcdc2_reg>; + infet7-supply = <&tps65090_dcdc2_reg>; + vsys-l1-supply = <&vdd_ac_bat_reg>; + vsys-l2-supply = <&vdd_ac_bat_reg>; + + regulators { + tps65090_dcdc1_reg: dcdc1 { + regulator-name = "vdd-sys-5v0"; + regulator-always-on; + regulator-boot-on; + }; + + tps65090_dcdc2_reg: dcdc2 { + regulator-name = "vdd-sys-3v3"; + regulator-always-on; + regulator-boot-on; + }; + + dcdc3 { + regulator-name = "vdd-ao"; + regulator-always-on; + regulator-boot-on; + }; + + fet1 { + regulator-name = "vdd-lcd-bl"; + }; + + fet3 { + regulator-name = "vdd-modem-3v3"; + }; + + fet4 { + regulator-name = "avdd-lcd"; + }; + + fet5 { + regulator-name = "vdd-lvds"; + }; + + fet6 { + regulator-name = "vdd-sd-slot"; + regulator-always-on; + regulator-boot-on; + }; + + fet7 { + regulator-name = "vdd-com-3v3"; + }; + + ldo1 { + regulator-name = "vdd-sby-5v0"; + regulator-always-on; + regulator-boot-on; + }; + + ldo2 { + regulator-name = "vdd-sby-3v3"; + regulator-always-on; + regulator-boot-on; + }; + }; + }; }; pmc { nvidia,invert-interrupt; }; + + sdhci@78000400 { + cd-gpios = <&gpio 170 1>; /* gpio PV2 */ + bus-width = <4>; + status = "okay"; + }; + + sdhci@78000600 { + bus-width = <8>; + status = "okay"; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vdd_ac_bat_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "vdd_ac_bat"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + dvdd_ts_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "dvdd_ts"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + gpio = <&gpio 61 0>; /* GPIO PH5 */ + }; + + lcd_bl_en_reg: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "lcd_bl_en"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio 58 0>; /* GPIO PH2 */ + }; + + usb1_vbus_reg: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio 108 0>; /* GPIO PN4 */ + gpio-open-drain; + vin-supply = <&tps65090_dcdc1_reg>; + }; + + usb3_vbus_reg: regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "usb2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio 86 0>; /* GPIO PK6 */ + gpio-open-drain; + vin-supply = <&tps65090_dcdc1_reg>; + }; + + vdd_hdmi_reg: regulator@5 { + compatible = "regulator-fixed"; + reg = <5>; + regulator-name = "vdd_hdmi_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio 81 0>; /* GPIO PK1 */ + vin-supply = <&tps65090_dcdc1_reg>; + }; + }; }; diff --git a/arch/arm/boot/dts/tegra114-pluto.dts b/arch/arm/boot/dts/tegra114-pluto.dts index 9bea8f57aa4..6bbc8efae9c 100644 --- a/arch/arm/boot/dts/tegra114-pluto.dts +++ b/arch/arm/boot/dts/tegra114-pluto.dts @@ -12,10 +12,22 @@ serial@70006300 { status = "okay"; - clock-frequency = <408000000>; }; pmc { nvidia,invert-interrupt; }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; }; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 1dfaf2874c5..629415ffd8d 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -4,6 +4,13 @@ compatible = "nvidia,tegra114"; interrupt-parent = <&gic>; + aliases { + serial0 = &uarta; + serial1 = &uartb; + serial2 = &uartc; + serial3 = &uartd; + }; + gic: interrupt-controller { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; @@ -24,14 +31,53 @@ 0 42 0x04 0 121 0x04 0 122 0x04>; + clocks = <&tegra_car 5>; }; tegra_car: clock { - compatible = "nvidia,tegra114-car, nvidia,tegra30-car"; + compatible = "nvidia,tegra114-car"; reg = <0x60006000 0x1000>; #clock-cells = <1>; }; + apbdma: dma { + compatible = "nvidia,tegra114-apbdma"; + reg = <0x6000a000 0x1400>; + interrupts = <0 104 0x04 + 0 105 0x04 + 0 106 0x04 + 0 107 0x04 + 0 108 0x04 + 0 109 0x04 + 0 110 0x04 + 0 111 0x04 + 0 112 0x04 + 0 113 0x04 + 0 114 0x04 + 0 115 0x04 + 0 116 0x04 + 0 117 0x04 + 0 118 0x04 + 0 119 0x04 + 0 128 0x04 + 0 129 0x04 + 0 130 0x04 + 0 131 0x04 + 0 132 0x04 + 0 133 0x04 + 0 134 0x04 + 0 135 0x04 + 0 136 0x04 + 0 137 0x04 + 0 138 0x04 + 0 139 0x04 + 0 140 0x04 + 0 141 0x04 + 0 142 0x04 + 0 143 0x04>; + clocks = <&tegra_car 34>; + }; + ahb: ahb { compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb"; reg = <0x6000c004 0x14c>; @@ -60,35 +106,186 @@ 0x70003000 0x40c>; /* Mux registers */ }; - serial@70006000 { + /* + * There are two serial driver i.e. 8250 based simple serial + * driver and APB DMA based serial driver for higher baudrate + * and performace. To enable the 8250 based driver, the compatible + * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable + * the APB DMA based serial driver, the comptible is + * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". + */ + uarta: serial@70006000 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; reg-shift = <2>; interrupts = <0 36 0x04>; + nvidia,dma-request-selector = <&apbdma 8>; status = "disabled"; + clocks = <&tegra_car 6>; }; - serial@70006040 { + uartb: serial@70006040 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006040 0x40>; reg-shift = <2>; interrupts = <0 37 0x04>; + nvidia,dma-request-selector = <&apbdma 9>; status = "disabled"; + clocks = <&tegra_car 192>; }; - serial@70006200 { + uartc: serial@70006200 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006200 0x100>; reg-shift = <2>; interrupts = <0 46 0x04>; + nvidia,dma-request-selector = <&apbdma 10>; status = "disabled"; + clocks = <&tegra_car 55>; }; - serial@70006300 { + uartd: serial@70006300 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006300 0x100>; reg-shift = <2>; interrupts = <0 90 0x04>; + nvidia,dma-request-selector = <&apbdma 19>; + status = "disabled"; + clocks = <&tegra_car 65>; + }; + + pwm: pwm { + compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; + reg = <0x7000a000 0x100>; + #pwm-cells = <2>; + clocks = <&tegra_car 17>; + status = "disabled"; + }; + + i2c@7000c000 { + compatible = "nvidia,tegra114-i2c"; + reg = <0x7000c000 0x100>; + interrupts = <0 38 0x04>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 12>; + clock-names = "div-clk"; + status = "disabled"; + }; + + i2c@7000c400 { + compatible = "nvidia,tegra114-i2c"; + reg = <0x7000c400 0x100>; + interrupts = <0 84 0x04>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 54>; + clock-names = "div-clk"; + status = "disabled"; + }; + + i2c@7000c500 { + compatible = "nvidia,tegra114-i2c"; + reg = <0x7000c500 0x100>; + interrupts = <0 92 0x04>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 67>; + clock-names = "div-clk"; + status = "disabled"; + }; + + i2c@7000c700 { + compatible = "nvidia,tegra114-i2c"; + reg = <0x7000c700 0x100>; + interrupts = <0 120 0x04>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 103>; + clock-names = "div-clk"; + status = "disabled"; + }; + + i2c@7000d000 { + compatible = "nvidia,tegra114-i2c"; + reg = <0x7000d000 0x100>; + interrupts = <0 53 0x04>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 47>; + clock-names = "div-clk"; + status = "disabled"; + }; + + spi@7000d400 { + compatible = "nvidia,tegra114-spi"; + reg = <0x7000d400 0x200>; + interrupts = <0 59 0x04>; + nvidia,dma-request-selector = <&apbdma 15>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 41>; + clock-names = "spi"; + status = "disabled"; + }; + + spi@7000d600 { + compatible = "nvidia,tegra114-spi"; + reg = <0x7000d600 0x200>; + interrupts = <0 82 0x04>; + nvidia,dma-request-selector = <&apbdma 16>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 44>; + clock-names = "spi"; + status = "disabled"; + }; + + spi@7000d800 { + compatible = "nvidia,tegra114-spi"; + reg = <0x7000d800 0x200>; + interrupts = <0 83 0x04>; + nvidia,dma-request-selector = <&apbdma 17>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 46>; + clock-names = "spi"; + status = "disabled"; + }; + + spi@7000da00 { + compatible = "nvidia,tegra114-spi"; + reg = <0x7000da00 0x200>; + interrupts = <0 93 0x04>; + nvidia,dma-request-selector = <&apbdma 18>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 68>; + clock-names = "spi"; + status = "disabled"; + }; + + spi@7000dc00 { + compatible = "nvidia,tegra114-spi"; + reg = <0x7000dc00 0x200>; + interrupts = <0 94 0x04>; + nvidia,dma-request-selector = <&apbdma 27>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 104>; + clock-names = "spi"; + status = "disabled"; + }; + + spi@7000de00 { + compatible = "nvidia,tegra114-spi"; + reg = <0x7000de00 0x200>; + interrupts = <0 79 0x04>; + nvidia,dma-request-selector = <&apbdma 28>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 105>; + clock-names = "spi"; status = "disabled"; }; @@ -96,11 +293,22 @@ compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc"; reg = <0x7000e000 0x100>; interrupts = <0 2 0x04>; + clocks = <&tegra_car 4>; + }; + + kbc { + compatible = "nvidia,tegra114-kbc"; + reg = <0x7000e200 0x100>; + interrupts = <0 85 0x04>; + clocks = <&tegra_car 36>; + status = "disabled"; }; pmc { - compatible = "nvidia,tegra114-pmc", "nvidia,tegra30-pmc"; + compatible = "nvidia,tegra114-pmc"; reg = <0x7000e400 0x400>; + clocks = <&tegra_car 261>, <&clk32k_in>; + clock-names = "pclk", "clk32k_in"; }; iommu { @@ -114,6 +322,38 @@ nvidia,ahb = <&ahb>; }; + sdhci@78000000 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000000 0x200>; + interrupts = <0 14 0x04>; + clocks = <&tegra_car 14>; + status = "disable"; + }; + + sdhci@78000200 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000200 0x200>; + interrupts = <0 15 0x04>; + clocks = <&tegra_car 9>; + status = "disable"; + }; + + sdhci@78000400 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000400 0x200>; + interrupts = <0 19 0x04>; + clocks = <&tegra_car 69>; + status = "disable"; + }; + + sdhci@78000600 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000600 0x200>; + interrupts = <0 31 0x04>; + clocks = <&tegra_car 15>; + status = "disable"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index 44416209004..a573b94b7c9 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -361,6 +361,15 @@ }; }; + pmc { + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <3875>; + nvidia,sys-clock-req-active-high; + }; + memory-controller@7000f400 { emc-table@83250 { reg = <83250>; @@ -444,7 +453,20 @@ }; sdhci@c8000600 { - cd-gpios = <&gpio 23 0>; /* gpio PC7 */ + cd-gpios = <&gpio 23 1>; /* gpio PC7 */ + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; sound { @@ -460,6 +482,9 @@ "Mic", "MIC1"; nvidia,ac97-controller = <&ac97>; + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; regulators { diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 61d027f0361..e7d5de4e00b 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -416,6 +416,12 @@ pmc { nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <3875>; + nvidia,sys-clock-req-active-high; }; usb@c5000000 { @@ -437,7 +443,7 @@ sdhci@c8000200 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 155 0>; /* gpio PT3 */ bus-width = <4>; @@ -445,12 +451,36 @@ sdhci@c8000600 { status = "okay"; - cd-gpios = <&gpio 58 0>; /* gpio PH2 */ + cd-gpios = <&gpio 58 1>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ bus-width = <8>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio 170 1>; /* gpio PV2, active low */ + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; + }; + kbc { status = "okay"; nvidia,debounce-delay-ms = <2>; @@ -656,5 +686,8 @@ nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts index a2d6d6541f8..ace23437da8 100644 --- a/arch/arm/boot/dts/tegra20-medcom-wide.dts +++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts @@ -6,6 +6,10 @@ model = "Avionic Design Medcom-Wide board"; compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20"; + pwm { + status = "okay"; + }; + i2c@7000c000 { wm8903: wm8903@1a { compatible = "wlf,wm8903"; @@ -54,5 +58,8 @@ nvidia,spkr-en-gpios = <&wm8903 2 0>; nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 54d6fce00a5..e3e0c9977df 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -415,6 +415,12 @@ pmc { nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <2000>; + nvidia,cpu-pwr-off-time = <0>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <0>; + nvidia,sys-clock-req-active-high; }; usb@c5000000 { @@ -436,7 +442,7 @@ sdhci@c8000000 { status = "okay"; - cd-gpios = <&gpio 173 0>; /* gpio PV5 */ + cd-gpios = <&gpio 173 1>; /* gpio PV5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 169 0>; /* gpio PV1 */ bus-width = <4>; @@ -445,6 +451,20 @@ sdhci@c8000600 { status = "okay"; bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; gpio-keys { @@ -501,5 +521,8 @@ nvidia,audio-codec = <&alc5632>; nvidia,i2s-controller = <&tegra_i2s1>; nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts index 289480026fb..1a17cc30bb9 100644 --- a/arch/arm/boot/dts/tegra20-plutux.dts +++ b/arch/arm/boot/dts/tegra20-plutux.dts @@ -52,5 +52,8 @@ nvidia,spkr-en-gpios = <&wm8903 2 0>; nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 37b3a57ec0f..cee4c34010f 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -517,6 +517,12 @@ pmc { nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <3875>; + nvidia,sys-clock-req-active-high; }; memory-controller@7000f400 { @@ -580,11 +586,12 @@ status = "okay"; power-gpios = <&gpio 86 0>; /* gpio PK6 */ bus-width = <4>; + keep-power-in-suspend; }; sdhci@c8000400 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ bus-width = <4>; @@ -593,6 +600,20 @@ sdhci@c8000600 { status = "okay"; bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; gpio-keys { @@ -808,5 +829,8 @@ nvidia,spkr-en-gpios = <&wm8903 2 0>; nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 4766abae7a7..50b3ec16b93 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -458,6 +458,12 @@ pmc { nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <3875>; + nvidia,sys-clock-req-active-high; }; usb@c5008000 { @@ -465,12 +471,25 @@ }; sdhci@c8000600 { - cd-gpios = <&gpio 58 0>; /* gpio PH2 */ + cd-gpios = <&gpio 58 1>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ bus-width = <4>; status = "okay"; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + regulators { compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts index 402b21004be..742f0b38d21 100644 --- a/arch/arm/boot/dts/tegra20-tec.dts +++ b/arch/arm/boot/dts/tegra20-tec.dts @@ -52,5 +52,8 @@ nvidia,spkr-en-gpios = <&wm8903 2 0>; nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 5d79e4fc49a..9cc78a15d73 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -300,6 +300,15 @@ }; }; + pmc { + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <3875>; + nvidia,sys-clock-req-active-high; + }; + usb@c5000000 { status = "okay"; nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */ @@ -325,11 +334,35 @@ sdhci@c8000600 { status = "okay"; - cd-gpios = <&gpio 121 0>; /* gpio PP1 */ + cd-gpios = <&gpio 121 1>; /* gpio PP1 */ wp-gpios = <&gpio 122 0>; /* gpio PP2 */ bus-width = <4>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio 190 1>; /* gpio PX6, active low */ + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; + }; + poweroff { compatible = "gpio-poweroff"; gpios = <&gpio 191 1>; /* gpio PX7, active low */ @@ -363,5 +396,8 @@ compatible = "nvidia,tegra-audio-trimslice"; nvidia,i2s-controller = <&tegra_i2s1>; nvidia,audio-codec = <&codec>; + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 425c89000c2..dd38f1f0383 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -493,6 +493,12 @@ pmc { nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <2000>; + nvidia,cpu-pwr-off-time = <100>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <458>; + nvidia,sys-clock-req-active-high; }; usb@c5000000 { @@ -516,11 +522,12 @@ status = "okay"; power-gpios = <&gpio 86 0>; /* gpio PK6 */ bus-width = <4>; + keep-power-in-suspend; }; sdhci@c8000400 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ bus-width = <4>; @@ -529,6 +536,31 @@ sdhci@c8000600 { status = "okay"; bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio 170 1>; /* gpio PV2, active low */ + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; }; regulators { @@ -607,5 +639,8 @@ nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */ nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index ea57c0f6dcc..d2567f83aaf 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts @@ -496,6 +496,14 @@ pmc { nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <2000>; + nvidia,cpu-pwr-off-time = <1000>; + nvidia,core-pwr-good-time = <0 3845>; + nvidia,core-pwr-off-time = <93727>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + nvidia,combined-power-req; }; usb@c5000000 { @@ -510,6 +518,7 @@ sdhci@c8000400 { status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 173 0>; /* gpio PV5 */ bus-width = <8>; }; @@ -517,6 +526,20 @@ sdhci@c8000600 { status = "okay"; bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; kbc { @@ -525,6 +548,7 @@ nvidia,repeat-delay-ms = <160>; nvidia,kbc-row-pins = <0 1 2>; nvidia,kbc-col-pins = <16 17>; + nvidia,wakeup-source; linux,keymap = <0x00000074 /* KEY_POWER */ 0x01000066 /* KEY_HOME */ 0x0101009E /* KEY_BACK */ @@ -559,5 +583,8 @@ nvidia,i2s-controller = <&tegra_i2s1>; nvidia,audio-codec = <&codec>; + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 3d3f64d2111..56a91106041 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -145,6 +145,7 @@ 0 1 0x04 0 41 0x04 0 42 0x04>; + clocks = <&tegra_car 5>; }; tegra_car: clock { @@ -208,7 +209,7 @@ compatible = "nvidia,tegra20-das"; reg = <0x70000c00 0x80>; }; - + tegra_ac97: ac97 { compatible = "nvidia,tegra20-ac97"; reg = <0x70002000 0x200>; @@ -298,12 +299,14 @@ reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car 17>; + status = "disabled"; }; rtc { compatible = "nvidia,tegra20-rtc"; reg = <0x7000e000 0x100>; interrupts = <0 2 0x04>; + clocks = <&tegra_car 4>; }; i2c@7000c000 { @@ -416,6 +419,8 @@ pmc { compatible = "nvidia,tegra20-pmc"; reg = <0x7000e400 0x400>; + clocks = <&tegra_car 110>, <&clk32k_in>; + clock-names = "pclk", "clk32k_in"; }; memory-controller@7000f000 { @@ -438,31 +443,6 @@ #size-cells = <0>; }; - phy1: usb-phy@c5000400 { - compatible = "nvidia,tegra20-usb-phy"; - reg = <0xc5000400 0x3c00>; - phy_type = "utmi"; - nvidia,has-legacy-mode; - clocks = <&tegra_car 22>, <&tegra_car 127>; - clock-names = "phy", "pll_u"; - }; - - phy2: usb-phy@c5004400 { - compatible = "nvidia,tegra20-usb-phy"; - reg = <0xc5004400 0x3c00>; - phy_type = "ulpi"; - clocks = <&tegra_car 94>, <&tegra_car 127>; - clock-names = "phy", "pll_u"; - }; - - phy3: usb-phy@c5008400 { - compatible = "nvidia,tegra20-usb-phy"; - reg = <0xc5008400 0x3C00>; - phy_type = "utmi"; - clocks = <&tegra_car 22>, <&tegra_car 127>; - clock-names = "phy", "pll_u"; - }; - usb@c5000000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5000000 0x4000>; @@ -475,6 +455,15 @@ status = "disabled"; }; + phy1: usb-phy@c5000400 { + compatible = "nvidia,tegra20-usb-phy"; + reg = <0xc5000400 0x3c00>; + phy_type = "utmi"; + nvidia,has-legacy-mode; + clocks = <&tegra_car 22>, <&tegra_car 127>; + clock-names = "phy", "pll_u"; + }; + usb@c5004000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5004000 0x4000>; @@ -485,6 +474,14 @@ status = "disabled"; }; + phy2: usb-phy@c5004400 { + compatible = "nvidia,tegra20-usb-phy"; + reg = <0xc5004400 0x3c00>; + phy_type = "ulpi"; + clocks = <&tegra_car 93>, <&tegra_car 127>; + clock-names = "phy", "pll_u"; + }; + usb@c5008000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5008000 0x4000>; @@ -495,6 +492,14 @@ status = "disabled"; }; + phy3: usb-phy@c5008400 { + compatible = "nvidia,tegra20-usb-phy"; + reg = <0xc5008400 0x3c00>; + phy_type = "utmi"; + clocks = <&tegra_car 22>, <&tegra_car 127>; + clock-names = "phy", "pll_u"; + }; + sdhci@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 8ff2ff20e4a..b732f7c13a6 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -253,11 +253,18 @@ pmc { status = "okay"; nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <2000>; + nvidia,cpu-pwr-off-time = <200>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <0>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; }; sdhci@78000000 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 155 0>; /* gpio PT3 */ power-gpios = <&gpio 31 0>; /* gpio PD7 */ bus-width = <4>; @@ -266,6 +273,20 @@ sdhci@78000600 { status = "okay"; bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; regulators { diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts index adc88aa50eb..e392bd2dab9 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts @@ -88,6 +88,7 @@ status = "okay"; power-gpios = <&gpio 28 0>; /* gpio PD4 */ bus-width = <4>; + keep-power-in-suspend; }; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts index 08163e145d5..d0db6c7e774 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts @@ -100,5 +100,6 @@ status = "okay"; power-gpios = <&gpio 27 0>; /* gpio PD3 */ bus-width = <4>; + keep-power-in-suspend; }; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 17499272a4e..01b4c26fad9 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -307,11 +307,18 @@ pmc { status = "okay"; nvidia,invert-interrupt; + nvidia,suspend-mode = <2>; + nvidia,cpu-pwr-good-time = <2000>; + nvidia,cpu-pwr-off-time = <200>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <0>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; }; sdhci@78000000 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 155 0>; /* gpio PT3 */ power-gpios = <&gpio 31 0>; /* gpio PD7 */ bus-width = <4>; @@ -320,6 +327,20 @@ sdhci@78000600 { status = "okay"; bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; regulators { @@ -496,5 +517,8 @@ nvidia,spkr-en-gpios = <&wm8903 2 0>; nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + + clocks = <&tegra_car 184>, <&tegra_car 185>, <&tegra_car 120>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index dbf46c27256..15ded605142 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -148,6 +148,7 @@ 0 42 0x04 0 121 0x04 0 122 0x04>; + clocks = <&tegra_car 5>; }; tegra_car: clock { @@ -285,12 +286,14 @@ reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car 17>; + status = "disabled"; }; rtc { compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc"; reg = <0x7000e000 0x100>; interrupts = <0 2 0x04>; + clocks = <&tegra_car 4>; }; i2c@7000c000 { @@ -423,8 +426,10 @@ }; pmc { - compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; + compatible = "nvidia,tegra30-pmc"; reg = <0x7000e400 0x400>; + clocks = <&tegra_car 218>, <&clk32k_in>; + clock-names = "pclk", "clk32k_in"; }; memory-controller { diff --git a/arch/arm/boot/dts/tps6507x.dtsi b/arch/arm/boot/dts/tps6507x.dtsi new file mode 100644 index 00000000000..4c326e591e5 --- /dev/null +++ b/arch/arm/boot/dts/tps6507x.dtsi @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Integrated Power Management Chip + * http://www.ti.com/lit/ds/symlink/tps65070.pdf + */ + +&tps { + compatible = "ti,tps6507x"; + + regulators { + #address-cells = <1>; + #size-cells = <0>; + + vdcdc1_reg: regulator@0 { + reg = <0>; + regulator-compatible = "VDCDC1"; + }; + + vdcdc2_reg: regulator@1 { + reg = <1>; + regulator-compatible = "VDCDC2"; + }; + + vdcdc3_reg: regulator@2 { + reg = <2>; + regulator-compatible = "VDCDC3"; + }; + + ldo1_reg: regulator@3 { + reg = <3>; + regulator-compatible = "LDO1"; + }; + + ldo2_reg: regulator@4 { + reg = <4>; + regulator-compatible = "LDO2"; + }; + + }; +}; diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi index ed0bc954683..b3034da00a3 100644 --- a/arch/arm/boot/dts/twl4030.dtsi +++ b/arch/arm/boot/dts/twl4030.dtsi @@ -23,6 +23,12 @@ compatible = "ti,twl4030-wdt"; }; + vcc: regulator-vdd1 { + compatible = "ti,twl4030-vdd1"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1450000>; + }; + vdac: regulator-vdac { compatible = "ti,twl4030-vdac"; regulator-min-microvolt = <1800000>; @@ -67,7 +73,7 @@ #interrupt-cells = <1>; }; - twl4030-usb { + usb2_phy: twl4030-usb { compatible = "ti,twl4030-usb"; interrupts = <10>, <4>; usb1v5-supply = <&vusb1v5>; @@ -75,4 +81,14 @@ usb3v1-supply = <&vusb3v1>; usb_mode = <1>; }; + + twl_pwm: pwm { + compatible = "ti,twl4030-pwm"; + #pwm-cells = <2>; + }; + + twl_pwmled: pwmled { + compatible = "ti,twl4030-pwmled"; + #pwm-cells = <2>; + }; }; diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi index 9996cfc5ee8..2e3bd3172b2 100644 --- a/arch/arm/boot/dts/twl6030.dtsi +++ b/arch/arm/boot/dts/twl6030.dtsi @@ -91,4 +91,16 @@ compatible = "ti,twl6030-usb"; interrupts = <4>, <10>; }; + + twl_pwm: pwm { + /* provides two PWMs (id 0, 1 for PWM1 and PWM2) */ + compatible = "ti,twl6030-pwm"; + #pwm-cells = <2>; + }; + + twl_pwmled: pwmled { + /* provides one PWM (id 0 for Charging indicator LED) */ + compatible = "ti,twl6030-pwmled"; + #pwm-cells = <2>; + }; }; |