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-rw-r--r--arch/arm/lib/io-writesw-armv3.S30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 950e7e310f1..52d62b48129 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -11,16 +11,16 @@
#include <asm/assembler.h>
#include <asm/hardware.h>
-.outsw_bad_alignment:
- adr r0, .outsw_bad_align_msg
+.Loutsw_bad_alignment:
+ adr r0, .Loutsw_bad_align_msg
mov r2, lr
b panic
-.outsw_bad_align_msg:
+.Loutsw_bad_align_msg:
.asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
.align
-.outsw_align: tst r1, #1
- bne .outsw_bad_alignment
+.Loutsw_align: tst r1, #1
+ bne .Loutsw_bad_alignment
add r1, r1, #2
@@ -35,14 +35,14 @@ ENTRY(__raw_writesw)
teq r2, #0 @ do we have to check for the zero len?
moveq pc, lr
tst r1, #3
- bne .outsw_align
+ bne .Loutsw_align
-.outsw_aligned: stmfd sp!, {r4, r5, r6, lr}
+ stmfd sp!, {r4, r5, r6, lr}
subs r2, r2, #8
- bmi .no_outsw_8
+ bmi .Lno_outsw_8
-.outsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
+.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
mov ip, r3, lsl #16
orr ip, ip, ip, lsr #16
@@ -77,13 +77,13 @@ ENTRY(__raw_writesw)
str ip, [r0]
subs r2, r2, #8
- bpl .outsw_8_lp
+ bpl .Loutsw_8_lp
tst r2, #7
LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-.no_outsw_8: tst r2, #4
- beq .no_outsw_4
+.Lno_outsw_8: tst r2, #4
+ beq .Lno_outsw_4
ldmia r1!, {r3, r4}
@@ -103,8 +103,8 @@ ENTRY(__raw_writesw)
orr ip, ip, ip, lsl #16
str ip, [r0]
-.no_outsw_4: tst r2, #2
- beq .no_outsw_2
+.Lno_outsw_4: tst r2, #2
+ beq .Lno_outsw_2
ldr r3, [r1], #4
@@ -116,7 +116,7 @@ ENTRY(__raw_writesw)
orr ip, ip, ip, lsl #16
str ip, [r0]
-.no_outsw_2: tst r2, #1
+.Lno_outsw_2: tst r2, #1
ldrne r3, [r1]