diff options
Diffstat (limited to 'arch/arm/mach-at91')
| -rw-r--r-- | arch/arm/mach-at91/Kconfig | 25 | ||||
| -rw-r--r-- | arch/arm/mach-at91/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9g45_devices.c | 58 | ||||
| -rw-r--r-- | arch/arm/mach-at91/board-eco920.c | 158 | ||||
| -rw-r--r-- | arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c | 23 | ||||
| -rw-r--r-- | arch/arm/mach-at91/board-sam9m10g45ek.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-at91/cpuidle.c | 94 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/board.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/cpu.h | 9 | ||||
| -rw-r--r-- | arch/arm/mach-at91/pm.c | 62 | ||||
| -rw-r--r-- | arch/arm/mach-at91/pm.h | 67 |
11 files changed, 424 insertions, 76 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index e35d54d43e7..c71e39ed092 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -163,6 +163,11 @@ config MACH_CPUAT91 Select this if you are using the Eukrea Electromatique's CPUAT91 board <http://www.eukrea.com/>. +config MACH_ECO920 + bool "eco920" + help + Select this if you are using the eco920 board + endif # ---------------------------------------------------------- @@ -289,13 +294,6 @@ config MACH_NEOCORE926 help Select this if you are using the Adeneo Neocore 926 board. -config MACH_AT91SAM9G20EK_2MMC - bool "Atmel AT91SAM9G20-EK Evaluation Kit modified for 2 MMC Slots" - depends on ARCH_AT91SAM9G20 - help - Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit - Rev A or B modified for 2 MMC Slots. - endif # ---------------------------------------------------------- @@ -322,7 +320,16 @@ config MACH_AT91SAM9G20EK bool "Atmel AT91SAM9G20-EK Evaluation Kit" depends on ARCH_AT91SAM9G20 help - Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit. + Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit + that embeds only one SD/MMC slot. + +config MACH_AT91SAM9G20EK_2MMC + bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" + depends on ARCH_AT91SAM9G20 + help + Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit + with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and + onwards. config MACH_CPU9G20 bool "Eukrea CPU9G20 board" @@ -392,7 +399,7 @@ config MTD_AT91_DATAFLASH_CARD config MTD_NAND_ATMEL_BUSWIDTH_16 bool "Enable 16-bit data bus interface to NAND flash" - depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_AT91SAM9G45EKES || MACH_AT91CAP9ADK) + depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_AT91SAM9G20EK_2MMC || MACH_AT91SAM9G45EKES || MACH_AT91CAP9ADK) help On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index ada440aab0c..709fbad4a3e 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o +obj-$(CONFIG_MACH_ECO920) += board-eco920.o # AT91SAM9260 board-specific support obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o @@ -77,6 +78,7 @@ obj-y += leds.o # Power Management obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o +obj-$(CONFIG_CPU_IDLE) += cpuidle.o ifeq ($(CONFIG_PM_DEBUG),y) CFLAGS_pm.o += -DDEBUG diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index d581cff80c4..a57af3e99c7 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -131,6 +131,62 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {} /* -------------------------------------------------------------------- + * USB Host HS (EHCI) + * Needs an OHCI host for low and full speed management + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) +static u64 ehci_dmamask = DMA_BIT_MASK(32); +static struct at91_usbh_data usbh_ehci_data; + +static struct resource usbh_ehci_resources[] = { + [0] = { + .start = AT91SAM9G45_EHCI_BASE, + .end = AT91SAM9G45_EHCI_BASE + SZ_1M - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9G45_ID_UHPHS, + .end = AT91SAM9G45_ID_UHPHS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91_usbh_ehci_device = { + .name = "atmel-ehci", + .id = -1, + .dev = { + .dma_mask = &ehci_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &usbh_ehci_data, + }, + .resource = usbh_ehci_resources, + .num_resources = ARRAY_SIZE(usbh_ehci_resources), +}; + +void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) +{ + int i; + + if (!data) + return; + + /* Enable VBus control for UHP ports */ + for (i = 0; i < data->ports; i++) { + if (data->vbus_pin[i]) + at91_set_gpio_output(data->vbus_pin[i], 0); + } + + usbh_ehci_data = *data; + at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk"); + platform_device_register(&at91_usbh_ehci_device); +} +#else +void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {} +#endif + + +/* -------------------------------------------------------------------- * USB HS Device (Gadget) * -------------------------------------------------------------------- */ @@ -838,7 +894,7 @@ static void __init at91_add_device_rtt(void) * Watchdog * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) +#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) static struct platform_device at91sam9g45_wdt_device = { .name = "at91_wdt", .id = -1, diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c new file mode 100644 index 00000000000..295a96609e7 --- /dev/null +++ b/arch/arm/mach-at91/board-eco920.c @@ -0,0 +1,158 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/mtd/physmap.h> +#include <linux/gpio.h> + +#include <asm/mach-types.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <mach/board.h> +#include <mach/at91rm9200_mc.h> +#include "generic.h" + +static void __init eco920_map_io(void) +{ + at91rm9200_initialize(18432000, AT91RM9200_PQFP); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); + + /* DBGU on ttyS0. (Rx & Tx only */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +static void __init eco920_init_irq(void) +{ + at91rm9200_init_interrupts(NULL); +} + +static struct at91_eth_data __initdata eco920_eth_data = { + .phy_irq_pin = AT91_PIN_PC2, + .is_rmii = 1, +}; + +static struct at91_usbh_data __initdata eco920_usbh_data = { + .ports = 1, +}; + +static struct at91_udc_data __initdata eco920_udc_data = { + .vbus_pin = AT91_PIN_PB12, + .pullup_pin = AT91_PIN_PB13, +}; + +static struct at91_mmc_data __initdata eco920_mmc_data = { + .slot_b = 0, + .wire4 = 0, +}; + +static struct physmap_flash_data eco920_flash_data = { + .width = 2, +}; + +static struct resource eco920_flash_resource = { + .start = 0x11000000, + .end = 0x11ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device eco920_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &eco920_flash_data, + }, + .resource = &eco920_flash_resource, + .num_resources = 1, +}; + +static struct resource at91_beeper_resources[] = { + [0] = { + .start = AT91RM9200_BASE_TC3, + .end = AT91RM9200_BASE_TC3 + 0x39, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device at91_beeper = { + .name = "at91_beeper", + .id = 0, + .resource = at91_beeper_resources, + .num_resources = ARRAY_SIZE(at91_beeper_resources), +}; + +static struct spi_board_info eco920_spi_devices[] = { + { /* CAN controller */ + .modalias = "tlv5638", + .chip_select = 3, + .max_speed_hz = 20 * 1000 * 1000, + .mode = SPI_CPHA, + }, +}; + +static void __init eco920_board_init(void) +{ + at91_add_device_serial(); + at91_add_device_eth(&eco920_eth_data); + at91_add_device_usbh(&eco920_usbh_data); + at91_add_device_udc(&eco920_udc_data); + + at91_add_device_mmc(0, &eco920_mmc_data); + platform_device_register(&eco920_flash); + + at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1) + | AT91_SMC_RWSETUP_(1) + | AT91_SMC_DBW_8 + | AT91_SMC_WSEN + | AT91_SMC_NWS_(15)); + + at91_set_A_periph(AT91_PIN_PC6, 1); + + at91_set_gpio_input(AT91_PIN_PA23, 0); + at91_set_deglitch(AT91_PIN_PA23, 1); + +/* Initialization of the Static Memory Controller for Chip Select 3 */ + at91_sys_write(AT91_SMC_CSR(3), + AT91_SMC_DBW_16 | /* 16 bit */ + AT91_SMC_WSEN | + AT91_SMC_NWS_(5) | /* wait states */ + AT91_SMC_TDF_(1) /* float time */ + ); + + at91_clock_associate("tc3_clk", &at91_beeper.dev, "at91_beeper"); + at91_set_B_periph(AT91_PIN_PB6, 0); + platform_device_register(&at91_beeper); + + at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices)); +} + +MACHINE_START(ECO920, "eco920") + /* Maintainer: Sascha Hauer */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91rm9200_timer, + .map_io = eco920_map_io, + .init_irq = eco920_init_irq, + .init_machine = eco920_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c b/arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c index a28e53faf71..a4102d72cc9 100644 --- a/arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c +++ b/arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c @@ -90,7 +90,7 @@ static struct at91_udc_data __initdata ek_udc_data = { * SPI devices. */ static struct spi_board_info ek_spi_devices[] = { -#if !defined(CONFIG_MMC_ATMELMCI) +#if !(defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_AT91)) { /* DataFlash chip */ .modalias = "mtd_dataflash", .chip_select = 1, @@ -113,7 +113,7 @@ static struct spi_board_info ek_spi_devices[] = { * MACB Ethernet device */ static struct at91_eth_data __initdata ek_macb_data = { - .phy_irq_pin = AT91_PIN_PC12, + .phy_irq_pin = AT91_PIN_PB0, .is_rmii = 1, }; @@ -194,24 +194,27 @@ static void __init ek_add_device_nand(void) /* * MCI (SD/MMC) - * det_pin and wp_pin are not connected + * wp_pin is not connected */ #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE) static struct mci_platform_data __initdata ek_mmc_data = { .slot[0] = { .bus_width = 4, - .detect_pin = -ENODEV, + .detect_pin = AT91_PIN_PC2, .wp_pin = -ENODEV, }, .slot[1] = { .bus_width = 4, - .detect_pin = -ENODEV, + .detect_pin = AT91_PIN_PC9, .wp_pin = -ENODEV, }, }; #else -static struct amci_platform_data __initdata ek_mmc_data = { +static struct at91_mmc_data __initdata ek_mmc_data = { + .slot_b = 1, /* Only one slot so use slot B */ + .wire4 = 1, + .det_pin = AT91_PIN_PC9, }; #endif @@ -221,13 +224,13 @@ static struct amci_platform_data __initdata ek_mmc_data = { static struct gpio_led ek_leds[] = { { /* "bottom" led, green, userled1 to be defined */ .name = "ds5", - .gpio = AT91_PIN_PB12, + .gpio = AT91_PIN_PB8, .active_low = 1, .default_trigger = "none", }, { /* "power" led, yellow */ .name = "ds1", - .gpio = AT91_PIN_PB13, + .gpio = AT91_PIN_PB9, .default_trigger = "heartbeat", } }; @@ -254,7 +257,11 @@ static void __init ek_board_init(void) /* Ethernet */ at91_add_device_eth(&ek_macb_data); /* MMC */ +#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE) at91_add_device_mci(0, &ek_mmc_data); +#else + at91_add_device_mmc(0, &ek_mmc_data); +#endif /* I2C */ at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices)); /* LEDs */ diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 64c3843f323..1cf4d868107 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -366,6 +366,7 @@ static void __init ek_board_init(void) at91_add_device_serial(); /* USB HS Host */ at91_add_device_usbh_ohci(&ek_usbh_hs_data); + at91_add_device_usbh_ehci(&ek_usbh_hs_data); /* USB HS Device */ at91_add_device_usba(&ek_usba_udc_data); /* SPI */ diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c new file mode 100644 index 00000000000..1cfeac1483d --- /dev/null +++ b/arch/arm/mach-at91/cpuidle.c @@ -0,0 +1,94 @@ +/* + * based on arch/arm/mach-kirkwood/cpuidle.c + * + * CPU idle support for AT91 SoC + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * The cpu idle uses wait-for-interrupt and RAM self refresh in order + * to implement two idle states - + * #1 wait-for-interrupt + * #2 wait-for-interrupt and RAM self refresh + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/cpuidle.h> +#include <asm/proc-fns.h> +#include <linux/io.h> + +#include "pm.h" + +#define AT91_MAX_STATES 2 + +static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device); + +static struct cpuidle_driver at91_idle_driver = { + .name = "at91_idle", + .owner = THIS_MODULE, +}; + +/* Actual code that puts the SoC in different idle states */ +static int at91_enter_idle(struct cpuidle_device *dev, + struct cpuidle_state *state) +{ + struct timeval before, after; + int idle_time; + u32 saved_lpr; + + local_irq_disable(); + do_gettimeofday(&before); + if (state == &dev->states[0]) + /* Wait for interrupt state */ + cpu_do_idle(); + else if (state == &dev->states[1]) { + asm("b 1f; .align 5; 1:"); + asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ + saved_lpr = sdram_selfrefresh_enable(); + cpu_do_idle(); + sdram_selfrefresh_disable(saved_lpr); + } + do_gettimeofday(&after); + local_irq_enable(); + idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + + (after.tv_usec - before.tv_usec); + return idle_time; +} + +/* Initialize CPU idle by registering the idle states */ +static int at91_init_cpuidle(void) +{ + struct cpuidle_device *device; + + cpuidle_register_driver(&at91_idle_driver); + + device = &per_cpu(at91_cpuidle_device, smp_processor_id()); + device->state_count = AT91_MAX_STATES; + + /* Wait for interrupt state */ + device->states[0].enter = at91_enter_idle; + device->states[0].exit_latency = 1; + device->states[0].target_residency = 10000; + device->states[0].flags = CPUIDLE_FLAG_TIME_VALID; + strcpy(device->states[0].name, "WFI"); + strcpy(device->states[0].desc, "Wait for interrupt"); + + /* Wait for interrupt and RAM self refresh state */ + device->states[1].enter = at91_enter_idle; + device->states[1].exit_latency = 10; + device->states[1].target_residency = 10000; + device->states[1].flags = CPUIDLE_FLAG_TIME_VALID; + strcpy(device->states[1].name, "RAM_SR"); + strcpy(device->states[1].desc, "WFI and RAM Self Refresh"); + + if (cpuidle_register_device(device)) { + printk(KERN_ERR "at91_init_cpuidle: Failed registering\n"); + return -EIO; + } + return 0; +} + +device_initcall(at91_init_cpuidle); diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 2f4fcedc02b..2295d80dd89 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -98,6 +98,7 @@ struct at91_usbh_data { }; extern void __init at91_add_device_usbh(struct at91_usbh_data *data); extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); +extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); /* NAND / SmartMedia */ struct atmel_nand_data { diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index 34a9502c48b..c22df30ed5e 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -25,6 +25,8 @@ #define ARCH_ID_AT91SAM9G20 0x019905a0 #define ARCH_ID_AT91SAM9RL64 0x019b03a0 #define ARCH_ID_AT91SAM9G45 0x819b05a0 +#define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ +#define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ #define ARCH_ID_AT91CAP9 0x039A03A0 #define ARCH_ID_AT91SAM9XE128 0x329973a0 @@ -41,6 +43,11 @@ static inline unsigned long at91_cpu_identify(void) return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); } +static inline unsigned long at91_cpu_fully_identify(void) +{ + return at91_sys_read(AT91_DBGU_CIDR); +} + #define ARCH_EXID_AT91SAM9M11 0x00000001 #define ARCH_EXID_AT91SAM9M10 0x00000002 #define ARCH_EXID_AT91SAM9G45 0x00000004 @@ -118,8 +125,10 @@ static inline unsigned long at91cap9_rev_identify(void) #ifdef CONFIG_ARCH_AT91SAM9G45 #define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45) +#define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES) #else #define cpu_is_at91sam9g45() (0) +#define cpu_is_at91sam9g45es() (0) #endif #ifdef CONFIG_ARCH_AT91CAP9 diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 4028724d490..61566898648 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -29,62 +29,7 @@ #include <mach/cpu.h> #include "generic.h" - -#ifdef CONFIG_ARCH_AT91RM9200 -#include <mach/at91rm9200_mc.h> - -/* - * The AT91RM9200 goes into self-refresh mode with this command, and will - * terminate self-refresh automatically on the next SDRAM access. - */ -#define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1) -#define sdram_selfrefresh_disable() do {} while (0) - -#elif defined(CONFIG_ARCH_AT91CAP9) -#include <mach/at91cap9_ddrsdr.h> - -static u32 saved_lpr; - -static inline void sdram_selfrefresh_enable(void) -{ - u32 lpr; - - saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); - - lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; - at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); -} - -#define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) - -#else -#include <mach/at91sam9_sdramc.h> - -#ifdef CONFIG_ARCH_AT91SAM9263 -/* - * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; - * handle those cases both here and in the Suspend-To-RAM support. - */ -#define AT91_SDRAMC AT91_SDRAMC0 -#warning Assuming EB1 SDRAM controller is *NOT* used -#endif - -static u32 saved_lpr; - -static inline void sdram_selfrefresh_enable(void) -{ - u32 lpr; - - saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); - - lpr = saved_lpr & ~AT91_SDRAMC_LPCB; - at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); -} - -#define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) - -#endif - +#include "pm.h" /* * Show the reason for the previous system reset. @@ -260,6 +205,7 @@ extern u32 at91_slow_clock_sz; static int at91_pm_enter(suspend_state_t state) { + u32 saved_lpr; at91_gpio_suspend(); at91_irq_suspend(); @@ -315,9 +261,9 @@ static int at91_pm_enter(suspend_state_t state) */ asm("b 1f; .align 5; 1:"); asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ - sdram_selfrefresh_enable(); + saved_lpr = sdram_selfrefresh_enable(); asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ - sdram_selfrefresh_disable(); + sdram_selfrefresh_disable(saved_lpr); break; case PM_SUSPEND_ON: diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h new file mode 100644 index 00000000000..08322c44df1 --- /dev/null +++ b/arch/arm/mach-at91/pm.h @@ -0,0 +1,67 @@ +#ifdef CONFIG_ARCH_AT91RM9200 +#include <mach/at91rm9200_mc.h> + +/* + * The AT91RM9200 goes into self-refresh mode with this command, and will + * terminate self-refresh automatically on the next SDRAM access. + * + * Self-refresh mode is exited as soon as a memory access is made, but we don't + * know for sure when that happens. However, we need to restore the low-power + * mode if it was enabled before going idle. Restoring low-power mode while + * still in self-refresh is "not recommended", but seems to work. + */ + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); + + at91_sys_write(AT91_SDRAMC_LPR, 0); + at91_sys_write(AT91_SDRAMC_SRR, 1); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#elif defined(CONFIG_ARCH_AT91CAP9) +#include <mach/at91cap9_ddrsdr.h> + + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr, lpr; + + saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); + + lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; + at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) + +#else +#include <mach/at91sam9_sdramc.h> + +#ifdef CONFIG_ARCH_AT91SAM9263 +/* + * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; + * handle those cases both here and in the Suspend-To-RAM support. + */ +#define AT91_SDRAMC AT91_SDRAMC0 +#warning Assuming EB1 SDRAM controller is *NOT* used +#endif + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr, lpr; + + saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); + + lpr = saved_lpr & ~AT91_SDRAMC_LPCB; + at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#endif |