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-rw-r--r--arch/arm/mach-footbridge/include/mach/hardware.h14
-rw-r--r--arch/arm/mach-footbridge/include/mach/io.h3
-rw-r--r--arch/arm/mach-footbridge/include/mach/isa-dma.h (renamed from arch/arm/mach-footbridge/include/mach/dma.h)2
-rw-r--r--arch/arm/mach-footbridge/include/mach/memory.h9
4 files changed, 17 insertions, 11 deletions
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index ffaea90486f..51dd902043a 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -12,8 +12,6 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
-#include <mach/memory.h>
-
/* Virtual Physical Size
* 0xff800000 0x40000000 1MB X-Bus
* 0xff000000 0x7c000000 1MB PCI I/O space
@@ -28,9 +26,6 @@
#define XBUS_SIZE 0x00100000
#define XBUS_BASE 0xff800000
-#define PCIO_SIZE 0x00100000
-#define PCIO_BASE 0xff000000
-
#define ARMCSR_SIZE 0x00100000
#define ARMCSR_BASE 0xfe000000
@@ -91,10 +86,11 @@
#define CPLD_FLASH_WR_ENABLE 1
#ifndef __ASSEMBLY__
-extern void gpio_modify_op(int mask, int set);
-extern void gpio_modify_io(int mask, int in);
-extern int gpio_read(void);
-extern void cpld_modify(int mask, int set);
+extern spinlock_t nw_gpio_lock;
+extern void nw_gpio_modify_op(unsigned int mask, unsigned int set);
+extern void nw_gpio_modify_io(unsigned int mask, unsigned int in);
+extern unsigned int nw_gpio_read(void);
+extern void nw_cpld_modify(unsigned int mask, unsigned int set);
#endif
#define pcibios_assign_all_busses() 1
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index a7b06623999..101a4fe90bd 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -14,7 +14,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
-#include <mach/hardware.h>
+#define PCIO_SIZE 0x00100000
+#define PCIO_BASE 0xff000000
#define IO_SPACE_LIMIT 0xffff
diff --git a/arch/arm/mach-footbridge/include/mach/dma.h b/arch/arm/mach-footbridge/include/mach/isa-dma.h
index 62afd213eff..5bd4a0d338a 100644
--- a/arch/arm/mach-footbridge/include/mach/dma.h
+++ b/arch/arm/mach-footbridge/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
/*
- * arch/arm/mach-footbridge/include/mach/dma.h
+ * arch/arm/mach-footbridge/include/mach/isa-dma.h
*
* Architecture DMA routines
*
diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h
index 6ae2f1a07ab..cb16e59d87b 100644
--- a/arch/arm/mach-footbridge/include/mach/memory.h
+++ b/arch/arm/mach-footbridge/include/mach/memory.h
@@ -30,9 +30,18 @@
extern unsigned long __virt_to_bus(unsigned long);
extern unsigned long __bus_to_virt(unsigned long);
#endif
+#define __virt_to_bus __virt_to_bus
+#define __bus_to_virt __bus_to_virt
#elif defined(CONFIG_FOOTBRIDGE_HOST)
+/*
+ * The footbridge is programmed to expose the system RAM at the corresponding
+ * address. So, if PAGE_OFFSET is 0xc0000000, RAM appears at 0xe0000000.
+ * If 0x80000000, then its exposed at 0xa0000000 on the bus. etc.
+ * The only requirement is that the RAM isn't placed at bus address 0 which
+ * would clash with VGA cards.
+ */
#define __virt_to_bus(x) ((x) - 0xe0000000)
#define __bus_to_virt(x) ((x) + 0xe0000000)