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-rw-r--r--arch/arm/mach-imx/cpufreq.c2
-rw-r--r--arch/arm/mach-imx/dma.c8
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index 7e70e0b0b98..467d899fbe7 100644
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -245,7 +245,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
if(mpctl0) {
CSCR |= CSCR_MPLL_RESTART;
- /* Wait until MPLL is stablized */
+ /* Wait until MPLL is stabilized */
while( CSCR & CSCR_MPLL_RESTART );
imx_set_async_mode();
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c
index 6d50d85a618..bc6fb02d213 100644
--- a/arch/arm/mach-imx/dma.c
+++ b/arch/arm/mach-imx/dma.c
@@ -131,7 +131,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch,
* The function setups DMA channel source and destination addresses for transfer
* specified by provided parameters. The scatter-gather emulation is disabled,
* because linear data block
- * form the physical address range is transfered.
+ * form the physical address range is transferred.
* Return value: if incorrect parameters are provided -%EINVAL.
* Zero indicates success.
*/
@@ -192,7 +192,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
* @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
* or %DMA_MODE_WRITE from memory to the device
*
- * The function setups DMA channel state and registers to be ready for transfer
+ * The function sets up DMA channel state and registers to be ready for transfer
* specified by provided parameters. The scatter-gather emulation is set up
* according to the parameters.
*
@@ -212,7 +212,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
*
* %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
*
- * Be carefull there and do not mistakenly mix source and target device
+ * Be careful here and do not mistakenly mix source and target device
* port sizes constants, they are really different:
* %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
* %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
@@ -495,7 +495,7 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
/*
* The cleaning of @sg field would be questionable
* there, because its value can help to compute
- * remaining/transfered bytes count in the handler
+ * remaining/transferred bytes count in the handler
*/
/*imx_dma_channels[i].sg = NULL;*/