diff options
Diffstat (limited to 'arch/arm/mach-lh7a40x')
| -rw-r--r-- | arch/arm/mach-lh7a40x/Kconfig | 70 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/Makefile | 14 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/Makefile.boot | 4 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/arch-kev7a400.c | 111 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/arch-lpd7a40x.c | 286 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/common.h | 16 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/irq-kev7a400.c | 92 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/irq-lh7a400.c | 90 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/irq-lh7a404.c | 158 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/irq-lpd7a40x.c | 128 | ||||
| -rw-r--r-- | arch/arm/mach-lh7a40x/time.c | 75 |
11 files changed, 1044 insertions, 0 deletions
diff --git a/arch/arm/mach-lh7a40x/Kconfig b/arch/arm/mach-lh7a40x/Kconfig new file mode 100644 index 00000000000..8a17867a6a2 --- /dev/null +++ b/arch/arm/mach-lh7a40x/Kconfig @@ -0,0 +1,70 @@ +if ARCH_LH7A40X + +menu "LH7A40X Implementations" + +config MACH_KEV7A400 + bool "KEV7A400" + select ARCH_LH7A400 + help + Say Y here if you are using the Sharp KEV7A400 development + board. This hardware is discontinued, so I'd be very + suprised if you wanted this option. + +config MACH_LPD7A400 + bool "LPD7A400 Card Engine" + select ARCH_LH7A400 +# select IDE_POLL + help + Say Y here if you are using Logic Product Development's + LPD7A400 CardEngine. For the time being, the LPD7A400 and + LPD7A404 options are mutually exclusive. + +config MACH_LPD7A404 + bool "LPD7A404 Card Engine" + select ARCH_LH7A404 +# select IDE_POLL + help + Say Y here if you are using Logic Product Development's + LPD7A404 CardEngine. For the time being, the LPD7A400 and + LPD7A404 options are mutually exclusive. + +config ARCH_LH7A400 + bool + +config ARCH_LH7A404 + bool + +config LH7A40X_CONTIGMEM + bool "Disable NUMA Support" + depends on ARCH_LH7A40X + help + Say Y here if your bootloader sets the SROMLL bit(s) in + the SDRAM controller, organizing memory as a contiguous + array. This option will disable CONFIG_DISCONTIGMEM and + force the kernel to manage all memory in one node. + + Setting this option incorrectly may prevent the kernel from + booting. It is OK to leave it N. + + For more information, consult + <file:Documentation/arm/Sharp-LH/SDRAM>. + +config LH7A40X_ONE_BANK_PER_NODE + bool "Optimize NUMA Node Tables for Size" + depends on ARCH_LH7A40X && !LH7A40X_CONTIGMEM + help + Say Y here to produce compact memory node tables. By + default pairs of adjacent physical RAM banks are managed + together in a single node, incurring some wasted overhead + in the node tables, however also maintaining compatibility + with systems where physical memory is truly contiguous. + + Setting this option incorrectly may prevent the kernel from + booting. It is OK to leave it N. + + For more information, consult + <file:Documentation/arm/Sharp-LH/SDRAM>. + +endmenu + +endif diff --git a/arch/arm/mach-lh7a40x/Makefile b/arch/arm/mach-lh7a40x/Makefile new file mode 100644 index 00000000000..e90512dbc2d --- /dev/null +++ b/arch/arm/mach-lh7a40x/Makefile @@ -0,0 +1,14 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := time.o +obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o +obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o +obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o + +obj-m := +obj-n := +obj- := diff --git a/arch/arm/mach-lh7a40x/Makefile.boot b/arch/arm/mach-lh7a40x/Makefile.boot new file mode 100644 index 00000000000..af941be076e --- /dev/null +++ b/arch/arm/mach-lh7a40x/Makefile.boot @@ -0,0 +1,4 @@ + zreladdr-y := 0xc0008000 +params_phys-y := 0xc0000100 +initrd_phys-y := 0xc4000000 + diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c new file mode 100644 index 00000000000..be5d17fe9dc --- /dev/null +++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c @@ -0,0 +1,111 @@ +/* arch/arm/mach-lh7a40x/arch-kev7a400.c + * + * Copyright (C) 2004 Logic Product Development + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include <linux/tty.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/interrupt.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/mach/map.h> + +#include "common.h" + + /* This function calls the board specific IRQ initialization function. */ + +static struct map_desc kev7a400_io_desc[] __initdata = { + { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, + { CPLD_VIRT, CPLD_PHYS, CPLD_SIZE, MT_DEVICE }, +}; + +void __init kev7a400_map_io(void) +{ + iotable_init (kev7a400_io_desc, ARRAY_SIZE (kev7a400_io_desc)); +} + +static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */ + +static void kev7a400_ack_cpld_irq (u32 irq) +{ + CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD); +} + +static void kev7a400_mask_cpld_irq (u32 irq) +{ + CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD)); + CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; +} + +static void kev7a400_unmask_cpld_irq (u32 irq) +{ + CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD); + CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; +} + +static struct irqchip kev7a400_cpld_chip = { + .ack = kev7a400_ack_cpld_irq, + .mask = kev7a400_mask_cpld_irq, + .unmask = kev7a400_unmask_cpld_irq, +}; + + +static void kev7a400_cpld_handler (unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) +{ + u32 mask = CPLD_LATCHED_INTS; + irq = IRQ_KEV7A400_CPLD; + for (; mask; mask >>= 1, ++irq) { + if (mask & 1) + desc[irq].handle (irq, desc, regs); + } +} + +void __init lh7a40x_init_board_irq (void) +{ + int irq; + + for (irq = IRQ_KEV7A400_CPLD; + irq < IRQ_KEV7A400_CPLD + NR_IRQ_BOARD; ++irq) { + set_irq_chip (irq, &kev7a400_cpld_chip); + set_irq_handler (irq, do_edge_IRQ); + set_irq_flags (irq, IRQF_VALID); + } + set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler); + + /* Clear all CPLD interrupts */ + CPLD_CL_INT = 0xff; /* CPLD_INTR_MMC_CD | CPLD_INTR_ETH_INT; */ + + GPIO_GPIOINTEN = 0; /* Disable all GPIO interrupts */ + barrier(); + +#if 0 + GPIO_INTTYPE1 + = (GPIO_INTR_PCC1_CD | GPIO_INTR_PCC1_CD); /* Edge trig. */ + GPIO_INTTYPE2 = 0; /* Falling edge & low-level */ + GPIO_GPIOFEOI = 0xff; /* Clear all GPIO interrupts */ + GPIO_GPIOINTEN = 0xff; /* Enable all GPIO interrupts */ + + init_FIQ(); +#endif +} + +MACHINE_START (KEV7A400, "Sharp KEV7a400") + MAINTAINER ("Marc Singer") + BOOT_MEM (0xc0000000, 0x80000000, io_p2v (0x80000000)) + BOOT_PARAMS (0xc0000100) + MAPIO (kev7a400_map_io) + INITIRQ (lh7a400_init_irq) + .timer = &lh7a40x_timer, +MACHINE_END diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c new file mode 100644 index 00000000000..c823447a150 --- /dev/null +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c @@ -0,0 +1,286 @@ +/* arch/arm/mach-lh7a40x/arch-lpd7a40x.c + * + * Copyright (C) 2004 Logic Product Development + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include <linux/tty.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/interrupt.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/mach/map.h> + +#include "common.h" + +static struct resource smc91x_resources[] = { + [0] = { + .start = CPLD00_PHYS, + .end = CPLD00_PHYS + CPLD00_SIZE - 1, /* Only needs 16B */ + .flags = IORESOURCE_MEM, + }, + + [1] = { + .start = IRQ_LPD7A40X_ETH_INT, + .end = IRQ_LPD7A40X_ETH_INT, + .flags = IORESOURCE_IRQ, + }, + +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +static struct resource lh7a40x_usbclient_resources[] = { + [0] = { + .start = USB_PHYS, + .end = (USB_PHYS + 0xFF), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_USBINTR, + .end = IRQ_USBINTR, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL; + +static struct platform_device lh7a40x_usbclient_device = { + .name = "lh7a40x_udc", + .id = 0, + .dev = { + .dma_mask = &lh7a40x_usbclient_dma_mask, + .coherent_dma_mask = 0xffffffffUL, + }, + .num_resources = ARRAY_SIZE (lh7a40x_usbclient_resources), + .resource = lh7a40x_usbclient_resources, +}; + +#if defined (CONFIG_ARCH_LH7A404) + +static struct resource lh7a404_usbhost_resources [] = { + [0] = { + .start = USBH_PHYS, + .end = (USBH_PHYS + 0xFF), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_USHINTR, + .end = IRQ_USHINTR, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 lh7a404_usbhost_dma_mask = 0xffffffffUL; + +static struct platform_device lh7a404_usbhost_device = { + .name = "lh7a404-ohci", + .id = 0, + .dev = { + .dma_mask = &lh7a404_usbhost_dma_mask, + .coherent_dma_mask = 0xffffffffUL, + }, + .num_resources = ARRAY_SIZE (lh7a404_usbhost_resources), + .resource = lh7a404_usbhost_resources, +}; + +#endif + +static struct platform_device *lpd7a40x_devs[] __initdata = { + &smc91x_device, + &lh7a40x_usbclient_device, +#if defined (CONFIG_ARCH_LH7A404) + &lh7a404_usbhost_device, +#endif +}; + +extern void lpd7a400_map_io (void); + +static void __init lpd7a40x_init (void) +{ + CPLD_CONTROL |= (1<<6); /* Mask USB1 connection IRQ */ + CPLD_CONTROL &= ~(0 + | (1<<1) /* Disable LCD */ + | (1<<0) /* Enable WLAN */ + ); + + platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs)); +} + +static void lh7a40x_ack_cpld_irq (u32 irq) +{ + /* CPLD doesn't have ack capability */ +} + +static void lh7a40x_mask_cpld_irq (u32 irq) +{ + switch (irq) { + case IRQ_LPD7A40X_ETH_INT: + CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; + break; + case IRQ_LPD7A400_TS: + CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8; + break; + } +} + +static void lh7a40x_unmask_cpld_irq (u32 irq) +{ + switch (irq) { + case IRQ_LPD7A40X_ETH_INT: + CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; + break; + case IRQ_LPD7A400_TS: + CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8; + break; + } +} + +static struct irqchip lpd7a40x_cpld_chip = { + .ack = lh7a40x_ack_cpld_irq, + .mask = lh7a40x_mask_cpld_irq, + .unmask = lh7a40x_unmask_cpld_irq, +}; + +static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask = CPLD_INTERRUPTS; + + desc->chip->ack (irq); + + if ((mask & 0x1) == 0) /* WLAN */ + IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); + + if ((mask & 0x2) == 0) /* Touch */ + IRQ_DISPATCH (IRQ_LPD7A400_TS); + + desc->chip->unmask (irq); /* Level-triggered need this */ +} + + +void __init lh7a40x_init_board_irq (void) +{ + int irq; + + /* Rev A (v2.8): PF0, PF1, PF2, and PF3 are available IRQs. + PF7 supports the CPLD. + Rev B (v3.4): PF0, PF1, and PF2 are available IRQs. + PF3 supports the CPLD. + (Some) LPD7A404 prerelease boards report a version + number of 0x16, but we force an override since the + hardware is of the newer variety. + */ + + unsigned char cpld_version = CPLD_REVISION; + int pinCPLD = (cpld_version == 0x28) ? 7 : 3; + +#if defined CONFIG_MACH_LPD7A404 + cpld_version = 0x34; /* Coerce LPD7A404 to RevB */ +#endif + + /* First, configure user controlled GPIOF interrupts */ + + GPIO_PFDD &= ~0x0f; /* PF0-3 are inputs */ + GPIO_INTTYPE1 &= ~0x0f; /* PF0-3 are level triggered */ + GPIO_INTTYPE2 &= ~0x0f; /* PF0-3 are active low */ + barrier (); + GPIO_GPIOFINTEN |= 0x0f; /* Enable PF0, PF1, PF2, and PF3 IRQs */ + + /* Then, configure CPLD interrupt */ + + CPLD_INTERRUPTS = 0x9c; /* Disable all CPLD interrupts */ + GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ + GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */ + GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ + barrier (); + GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ + + /* Cascade CPLD interrupts */ + + for (irq = IRQ_BOARD_START; + irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { + set_irq_chip (irq, &lpd7a40x_cpld_chip); + set_irq_handler (irq, do_edge_IRQ); + set_irq_flags (irq, IRQF_VALID); + } + + set_irq_chained_handler ((cpld_version == 0x28) + ? IRQ_CPLD_V28 + : IRQ_CPLD_V34, + lpd7a40x_cpld_handler); +} + +static struct map_desc lpd7a400_io_desc[] __initdata = { + { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, + /* Mapping added to work around chip select problems */ + { IOBARRIER_VIRT, IOBARRIER_PHYS, IOBARRIER_SIZE, MT_DEVICE }, + { CF_VIRT, CF_PHYS, CF_SIZE, MT_DEVICE }, + /* This mapping is redundant since the smc driver performs another. */ +/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */ + { CPLD02_VIRT, CPLD02_PHYS, CPLD02_SIZE, MT_DEVICE }, + { CPLD06_VIRT, CPLD06_PHYS, CPLD06_SIZE, MT_DEVICE }, + { CPLD08_VIRT, CPLD08_PHYS, CPLD08_SIZE, MT_DEVICE }, + { CPLD0C_VIRT, CPLD0C_PHYS, CPLD0C_SIZE, MT_DEVICE }, + { CPLD0E_VIRT, CPLD0E_PHYS, CPLD0E_SIZE, MT_DEVICE }, + { CPLD10_VIRT, CPLD10_PHYS, CPLD10_SIZE, MT_DEVICE }, + { CPLD12_VIRT, CPLD12_PHYS, CPLD12_SIZE, MT_DEVICE }, + { CPLD14_VIRT, CPLD14_PHYS, CPLD14_SIZE, MT_DEVICE }, + { CPLD16_VIRT, CPLD16_PHYS, CPLD16_SIZE, MT_DEVICE }, + { CPLD18_VIRT, CPLD18_PHYS, CPLD18_SIZE, MT_DEVICE }, + { CPLD1A_VIRT, CPLD1A_PHYS, CPLD1A_SIZE, MT_DEVICE }, +}; + +void __init +lpd7a400_map_io(void) +{ + iotable_init (lpd7a400_io_desc, ARRAY_SIZE (lpd7a400_io_desc)); + + /* Fixup (improve) Static Memory Controller settings */ + SMC_BCR0 = 0x200039af; /* Boot Flash */ + SMC_BCR6 = 0x1000fbe0; /* CPLD */ + SMC_BCR7 = 0x1000b2c2; /* Compact Flash */ +} + +#ifdef CONFIG_MACH_LPD7A400 + +MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10") + MAINTAINER ("Marc Singer") + BOOT_MEM (0xc0000000, 0x80000000, io_p2v (0x80000000)) + BOOT_PARAMS (0xc0000100) + MAPIO (lpd7a400_map_io) + INITIRQ (lh7a400_init_irq) + .timer = &lh7a40x_timer, + INIT_MACHINE (lpd7a40x_init) +MACHINE_END + +#endif + +#ifdef CONFIG_MACH_LPD7A404 + +MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10") + MAINTAINER ("Marc Singer") + BOOT_MEM (0xc0000000, 0x80000000, io_p2v (0x80000000)) + BOOT_PARAMS (0xc0000100) + MAPIO (lpd7a400_map_io) + INITIRQ (lh7a404_init_irq) + .timer = &lh7a40x_timer, + INIT_MACHINE (lpd7a40x_init) +MACHINE_END + +#endif diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h new file mode 100644 index 00000000000..beda7c2602f --- /dev/null +++ b/arch/arm/mach-lh7a40x/common.h @@ -0,0 +1,16 @@ +/* arch/arm/mach-lh7a40x/common.h + * + * Copyright (C) 2004 Marc Singer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +extern struct sys_timer lh7a40x_timer; + +extern void lh7a400_init_irq (void); +extern void lh7a404_init_irq (void); + +#define IRQ_DISPATCH(irq) irq_desc[irq].handle ((irq), &irq_desc[irq], regs) diff --git a/arch/arm/mach-lh7a40x/irq-kev7a400.c b/arch/arm/mach-lh7a40x/irq-kev7a400.c new file mode 100644 index 00000000000..691bb09232a --- /dev/null +++ b/arch/arm/mach-lh7a40x/irq-kev7a400.c @@ -0,0 +1,92 @@ +/* arch/arm/mach-lh7a40x/irq-kev7a400.c + * + * Copyright (C) 2004 Coastal Environmental Systems + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include <linux/interrupt.h> +#include <linux/init.h> + +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/mach/hardware.h> +#include <asm/mach/irqs.h> + + + /* KEV7a400 CPLD IRQ handling */ + +static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */ + +static void +lh7a400_ack_cpld_irq (u32 irq) +{ + CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD); +} + +static void +lh7a400_mask_cpld_irq (u32 irq) +{ + CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD)); + CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; +} + +static void +lh7a400_unmask_cpld_irq (u32 irq) +{ + CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD); + CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; +} + +static struct +irqchip lh7a400_cpld_chip = { + .ack = lh7a400_ack_cpld_irq, + .mask = lh7a400_mask_cpld_irq, + .unmask = lh7a400_unmask_cpld_irq, +}; + +static void +lh7a400_cpld_handler (unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) +{ + u32 mask = CPLD_LATCHED_INTS; + irq = IRQ_KEV_7A400_CPLD; + for (; mask; mask >>= 1, ++irq) { + if (mask & 1) + desc[irq].handle (irq, desc, regs); + } +} + + /* IRQ initialization */ + +void __init +lh7a400_init_board_irq (void) +{ + int irq; + + for (irq = IRQ_KEV7A400_CPLD; + irq < IRQ_KEV7A400_CPLD + NR_IRQ_KEV7A400_CPLD; ++irq) { + set_irq_chip (irq, &lh7a400_cpld_chip); + set_irq_handler (irq, do_edge_IRQ); + set_irq_flags (irq, IRQF_VALID); + } + set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler); + + /* Clear all CPLD interrupts */ + CPLD_CL_INT = 0xff; /* CPLD_INTR_MMC_CD | CPLD_INTR_ETH_INT; */ + + /* *** FIXME CF enabled in ide-probe.c */ + + GPIO_GPIOINTEN = 0; /* Disable all GPIO interrupts */ + barrier(); + GPIO_INTTYPE1 + = (GPIO_INTR_PCC1_CD | GPIO_INTR_PCC1_CD); /* Edge trig. */ + GPIO_INTTYPE2 = 0; /* Falling edge & low-level */ + GPIO_GPIOFEOI = 0xff; /* Clear all GPIO interrupts */ + GPIO_GPIOINTEN = 0xff; /* Enable all GPIO interrupts */ + + init_FIQ(); +} diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c new file mode 100644 index 00000000000..f334d81c2cd --- /dev/null +++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c @@ -0,0 +1,90 @@ +/* arch/arm/mach-lh7a40x/irq-lh7a400.c + * + * Copyright (C) 2004 Coastal Environmental Systems + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ptrace.h> + +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/arch/irq.h> +#include <asm/arch/irqs.h> + + + /* CPU IRQ handling */ + +static void lh7a400_mask_irq (u32 irq) +{ + INTC_INTENC = (1 << irq); +} + +static void lh7a400_unmask_irq (u32 irq) +{ + INTC_INTENS = (1 << irq); +} + +static void lh7a400_ack_gpio_irq (u32 irq) +{ + GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); + INTC_INTENC = (1 << irq); +} + +static struct irqchip lh7a400_internal_chip = { + .ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ + .mask = lh7a400_mask_irq, + .unmask = lh7a400_unmask_irq, +}; + +static struct irqchip lh7a400_gpio_chip = { + .ack = lh7a400_ack_gpio_irq, + .mask = lh7a400_mask_irq, + .unmask = lh7a400_unmask_irq, +}; + + + /* IRQ initialization */ + +void __init lh7a400_init_irq (void) +{ + int irq; + + INTC_INTENC = 0xffffffff; /* Disable all interrupts */ + GPIO_GPIOFINTEN = 0x00; /* Disable all GPIOF interrupts */ + barrier (); + + for (irq = 0; irq < NR_IRQS; ++irq) { + switch (irq) { + case IRQ_GPIO0INTR: + case IRQ_GPIO1INTR: + case IRQ_GPIO2INTR: + case IRQ_GPIO3INTR: + case IRQ_GPIO4INTR: + case IRQ_GPIO5INTR: + case IRQ_GPIO6INTR: + case IRQ_GPIO7INTR: + set_irq_chip (irq, &lh7a400_gpio_chip); + set_irq_handler (irq, do_level_IRQ); /* OK default */ + break; + default: + set_irq_chip (irq, &lh7a400_internal_chip); + set_irq_handler (irq, do_level_IRQ); + } + set_irq_flags (irq, IRQF_VALID); + } + + lh7a40x_init_board_irq (); + +/* *** FIXME: the LH7a400 does use FIQ interrupts in some cases. For + the time being, these are not initialized. */ + +/* init_FIQ(); */ +} diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c new file mode 100644 index 00000000000..122fadabc97 --- /dev/null +++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c @@ -0,0 +1,158 @@ +/* arch/arm/mach-lh7a40x/irq-lh7a404.c + * + * Copyright (C) 2004 Logic Product Development + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ptrace.h> + +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/arch/irq.h> +#include <asm/arch/irqs.h> + +#define USE_PRIORITIES + +/* See Documentation/arm/Sharp-LH/VectoredInterruptController for more + * information on using the vectored interrupt controller's + * prioritizing feature. */ + +static unsigned char irq_pri_vic1[] = { +#if defined (USE_PRIORITIES) +IRQ_GPIO3INTR, +#endif +}; +static unsigned char irq_pri_vic2[] = { +#if defined (USE_PRIORITIES) + IRQ_T3UI, IRQ_GPIO7INTR, + IRQ_UART1INTR, IRQ_UART2INTR, IRQ_UART3INTR, +#endif +}; + + /* CPU IRQ handling */ + +static void lh7a404_vic1_mask_irq (u32 irq) +{ + VIC1_INTENCLR = (1 << irq); +} + +static void lh7a404_vic1_unmask_irq (u32 irq) +{ + VIC1_INTEN = (1 << irq); +} + +static void lh7a404_vic2_mask_irq (u32 irq) +{ + VIC2_INTENCLR = (1 << (irq - 32)); +} + +static void lh7a404_vic2_unmask_irq (u32 irq) +{ + VIC2_INTEN = (1 << (irq - 32)); +} + +static void lh7a404_vic1_ack_gpio_irq (u32 irq) +{ + GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); + VIC1_INTENCLR = (1 << irq); +} + +static void lh7a404_vic2_ack_gpio_irq (u32 irq) +{ + GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); + VIC2_INTENCLR = (1 << irq); +} + +static struct irqchip lh7a404_vic1_chip = { + .ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ + .mask = lh7a404_vic1_mask_irq, + .unmask = lh7a404_vic1_unmask_irq, +}; + +static struct irqchip lh7a404_vic2_chip = { + .ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ + .mask = lh7a404_vic2_mask_irq, + .unmask = lh7a404_vic2_unmask_irq, +}; + +static struct irqchip lh7a404_gpio_vic1_chip = { + .ack = lh7a404_vic1_ack_gpio_irq, + .mask = lh7a404_vic1_mask_irq, + .unmask = lh7a404_vic1_unmask_irq, +}; + +static struct irqchip lh7a404_gpio_vic2_chip = { + .ack = lh7a404_vic2_ack_gpio_irq, + .mask = lh7a404_vic2_mask_irq, + .unmask = lh7a404_vic2_unmask_irq, +}; + + /* IRQ initialization */ + +void __init lh7a404_init_irq (void) +{ + int irq; + + VIC1_INTENCLR = 0xffffffff; + VIC2_INTENCLR = 0xffffffff; + VIC1_INTSEL = 0; /* All IRQs */ + VIC2_INTSEL = 0; /* All IRQs */ + VIC1_NVADDR = VA_VIC1DEFAULT; + VIC2_NVADDR = VA_VIC2DEFAULT; + VIC1_VECTADDR = 0; + VIC2_VECTADDR = 0; + + GPIO_GPIOFINTEN = 0x00; /* Disable all GPIOF interrupts */ + barrier (); + + /* Install prioritized interrupts, if there are any. */ + /* The | 0x20*/ + for (irq = 0; irq < 16; ++irq) { + (&VIC1_VAD0)[irq] + = (irq < ARRAY_SIZE (irq_pri_vic1)) + ? (irq_pri_vic1[irq] | VA_VECTORED) : 0; + (&VIC1_VECTCNTL0)[irq] + = (irq < ARRAY_SIZE (irq_pri_vic1)) + ? (irq_pri_vic1[irq] | VIC_CNTL_ENABLE) : 0; + (&VIC2_VAD0)[irq] + = (irq < ARRAY_SIZE (irq_pri_vic2)) + ? (irq_pri_vic2[irq] | VA_VECTORED) : 0; + (&VIC2_VECTCNTL0)[irq] + = (irq < ARRAY_SIZE (irq_pri_vic2)) + ? (irq_pri_vic2[irq] | VIC_CNTL_ENABLE) : 0; + } + + for (irq = 0; irq < NR_IRQS; ++irq) { + switch (irq) { + case IRQ_GPIO0INTR: + case IRQ_GPIO1INTR: + case IRQ_GPIO2INTR: + case IRQ_GPIO3INTR: + case IRQ_GPIO4INTR: + case IRQ_GPIO5INTR: + case IRQ_GPIO6INTR: + case IRQ_GPIO7INTR: + set_irq_chip (irq, irq < 32 + ? &lh7a404_gpio_vic1_chip + : &lh7a404_gpio_vic2_chip); + set_irq_handler (irq, do_level_IRQ); /* OK default */ + break; + default: + set_irq_chip (irq, irq < 32 + ? &lh7a404_vic1_chip + : &lh7a404_vic2_chip); + set_irq_handler (irq, do_level_IRQ); + } + set_irq_flags (irq, IRQF_VALID); + } + + lh7a40x_init_board_irq (); +} diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c new file mode 100644 index 00000000000..6262d449120 --- /dev/null +++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c @@ -0,0 +1,128 @@ +/* arch/arm/mach-lh7a40x/irq-lpd7a40x.c + * + * Copyright (C) 2004 Coastal Environmental Systems + * Copyright (C) 2004 Logic Product Development + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ptrace.h> + +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/arch/irqs.h> + + +static void lh7a40x_ack_cpld_irq (u32 irq) +{ + /* CPLD doesn't have ack capability */ +} + +static void lh7a40x_mask_cpld_irq (u32 irq) +{ + switch (irq) { + case IRQ_LPD7A40X_ETH_INT: + CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; + break; + case IRQ_LPD7A400_TS: + CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8; + break; + } +} + +static void lh7a40x_unmask_cpld_irq (u32 irq) +{ + switch (irq) { + case IRQ_LPD7A40X_ETH_INT: + CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; + break; + case IRQ_LPD7A400_TS: + CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8; + break; + } +} + +static struct irqchip lh7a40x_cpld_chip = { + .ack = lh7a40x_ack_cpld_irq, + .mask = lh7a40x_mask_cpld_irq, + .unmask = lh7a40x_unmask_cpld_irq, +}; + +static void lh7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask = CPLD_INTERRUPTS; + + desc->chip->ack (irq); + + if ((mask & 0x1) == 0) /* WLAN */ + IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); + + if ((mask & 0x2) == 0) /* Touch */ + IRQ_DISPATCH (IRQ_LPD7A400_TS); + + desc->chip->unmask (irq); /* Level-triggered need this */ +} + + + /* IRQ initialization */ + +void __init lh7a40x_init_board_irq (void) +{ + int irq; + + /* Rev A (v2.8): PF0, PF1, PF2, and PF3 are available IRQs. + PF7 supports the CPLD. + Rev B (v3.4): PF0, PF1, and PF2 are available IRQs. + PF3 supports the CPLD. + (Some) LPD7A404 prerelease boards report a version + number of 0x16, but we force an override since the + hardware is of the newer variety. + */ + + unsigned char cpld_version = CPLD_REVISION; + int pinCPLD; + +#if defined CONFIG_MACH_LPD7A404 + cpld_version = 0x34; /* Override, for now */ +#endif + pinCPLD = (cpld_version == 0x28) ? 7 : 3; + + /* First, configure user controlled GPIOF interrupts */ + + GPIO_PFDD &= ~0x0f; /* PF0-3 are inputs */ + GPIO_INTTYPE1 &= ~0x0f; /* PF0-3 are level triggered */ + GPIO_INTTYPE2 &= ~0x0f; /* PF0-3 are active low */ + barrier (); + GPIO_GPIOFINTEN |= 0x0f; /* Enable PF0, PF1, PF2, and PF3 IRQs */ + + /* Then, configure CPLD interrupt */ + + CPLD_INTERRUPTS = 0x0c; /* Disable all CPLD interrupts */ + GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ + GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */ + GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ + barrier (); + GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ + + /* Cascade CPLD interrupts */ + + for (irq = IRQ_BOARD_START; + irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { + set_irq_chip (irq, &lh7a40x_cpld_chip); + set_irq_handler (irq, do_edge_IRQ); + set_irq_flags (irq, IRQF_VALID); + } + + set_irq_chained_handler ((cpld_version == 0x28) + ? IRQ_CPLD_V28 + : IRQ_CPLD_V34, + lh7a40x_cpld_handler); +} diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c new file mode 100644 index 00000000000..51e1c814b40 --- /dev/null +++ b/arch/arm/mach-lh7a40x/time.c @@ -0,0 +1,75 @@ +/* + * arch/arm/mach-lh7a40x/time.c + * + * Copyright (C) 2004 Logic Product Development + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ +#include <linux/config.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/time.h> + +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/leds.h> + +#include <asm/mach/time.h> +#include "common.h" + +#if HZ < 100 +# define TIMER_CONTROL TIMER_CONTROL2 +# define TIMER_LOAD TIMER_LOAD2 +# define TIMER_CONSTANT (508469/HZ) +# define TIMER_MODE (TIMER_C_ENABLE | TIMER_C_PERIODIC | TIMER_C_508KHZ) +# define TIMER_EOI TIMER_EOI2 +# define TIMER_IRQ IRQ_T2UI +#else +# define TIMER_CONTROL TIMER_CONTROL3 +# define TIMER_LOAD TIMER_LOAD3 +# define TIMER_CONSTANT (3686400/HZ) +# define TIMER_MODE (TIMER_C_ENABLE | TIMER_C_PERIODIC) +# define TIMER_EOI TIMER_EOI3 +# define TIMER_IRQ IRQ_T3UI +#endif + +static irqreturn_t +lh7a40x_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + write_seqlock(&xtime_lock); + + TIMER_EOI = 0; + timer_tick(regs); + + write_sequnlock(&xtime_lock); + + return IRQ_HANDLED; +} + +static struct irqaction lh7a40x_timer_irq = { + .name = "LHA740x Timer Tick", + .flags = SA_INTERRUPT, + .handler = lh7a40x_timer_interrupt +}; + +static void __init lh7a40x_timer_init(void) +{ + /* Stop/disable all timers */ + TIMER_CONTROL1 = 0; + TIMER_CONTROL2 = 0; + TIMER_CONTROL3 = 0; + + setup_irq (TIMER_IRQ, &lh7a40x_timer_irq); + + TIMER_LOAD = TIMER_CONSTANT; + TIMER_CONTROL = TIMER_MODE; +} + +struct sys_timer lh7a40x_timer = { + .init = &lh7a40x_timer_init, +}; |