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-rw-r--r--arch/arm/mach-mx3/Makefile30
-rw-r--r--arch/arm/mach-mx3/clock-imx31.c (renamed from arch/arm/mach-mx3/clock.c)5
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c5
-rw-r--r--arch/arm/mach-mx3/cpu.c2
-rw-r--r--arch/arm/mach-mx3/crm_regs.h2
-rw-r--r--arch/arm/mach-mx3/iomux-imx31.c (renamed from arch/arm/mach-mx3/iomux.c)2
-rw-r--r--arch/arm/mach-mx3/mach-armadillo5x0.c (renamed from arch/arm/mach-mx3/armadillo5x0.c)12
-rw-r--r--arch/arm/mach-mx3/mach-kzm_arm11_01.c (renamed from arch/arm/mach-mx3/kzmarm11.c)31
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c (renamed from arch/arm/mach-mx3/mx31pdk.c)10
-rw-r--r--arch/arm/mach-mx3/mach-mx31ads.c (renamed from arch/arm/mach-mx3/mx31ads.c)28
-rw-r--r--arch/arm/mach-mx3/mach-mx31lilly.c (renamed from arch/arm/mach-mx3/mx31lilly.c)8
-rw-r--r--arch/arm/mach-mx3/mach-mx31lite.c (renamed from arch/arm/mach-mx3/mx31lite.c)14
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c (renamed from arch/arm/mach-mx3/mx31moboard.c)4
-rw-r--r--arch/arm/mach-mx3/mach-mx35pdk.c (renamed from arch/arm/mach-mx3/mx35pdk.c)4
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c (renamed from arch/arm/mach-mx3/pcm037.c)16
-rw-r--r--arch/arm/mach-mx3/mach-pcm037_eet.c (renamed from arch/arm/mach-mx3/pcm037_eet.c)0
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c (renamed from arch/arm/mach-mx3/pcm043.c)4
-rw-r--r--arch/arm/mach-mx3/mach-qong.c (renamed from arch/arm/mach-mx3/qong.c)18
-rw-r--r--arch/arm/mach-mx3/mx31lite-db.c30
19 files changed, 118 insertions, 107 deletions
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 93c7b296be6..62b60931d87 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -5,18 +5,22 @@
# Object file lists.
obj-y := mm.o devices.o cpu.o
-obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o
+CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o
obj-$(CONFIG_ARCH_MX35) += clock-imx35.o
-obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o
-obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o
-obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite-db.o
-obj-$(CONFIG_MACH_PCM037) += pcm037.o
-obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o
-obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o
-obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \
+obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
+obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
+obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
+obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
+obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
+obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
+CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
mx31moboard-marxbot.o
-obj-$(CONFIG_MACH_QONG) += qong.o
-obj-$(CONFIG_MACH_PCM043) += pcm043.o
-obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o
-obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o
-obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o
+obj-$(CONFIG_MACH_QONG) += mach-qong.o
+obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
+obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
+obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35pdk.o
+obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock-imx31.c
index 27a318af0d2..d22a66f502a 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -618,14 +618,15 @@ int __init mx31_clocks_init(unsigned long fref)
mx31_read_cpu_rev();
- if (mx31_revision() >= CHIP_REV_2_0) {
+ if (mx31_revision() >= MX31_CHIP_REV_2_0) {
reg = __raw_readl(MXC_CCM_PMCR1);
/* No PLL restart on DVFS switch; enable auto EMI handshake */
reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
__raw_writel(reg, MXC_CCM_PMCR1);
}
- mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
+ mxc_timer_init(&ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),
+ MX31_INT_GPT);
return 0;
}
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 7584b4c6c55..07d630ebc28 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -28,7 +28,7 @@
#include <mach/hardware.h>
#include <mach/common.h>
-#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR)
+#define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)
#define CCM_CCMR 0x00
#define CCM_PDR0 0x04
@@ -504,7 +504,8 @@ int __init mx35_clocks_init()
__raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
__raw_writel(0, CCM_BASE + CCM_CGR3);
- mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
+ mxc_timer_init(&gpt_clk,
+ MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
return 0;
}
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index db828809c67..861afe0fe3a 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
u32 i, srev;
/* read SREV register from IIM module */
- srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV);
+ srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h
index adfa3627ad8..37a8a07beda 100644
--- a/arch/arm/mach-mx3/crm_regs.h
+++ b/arch/arm/mach-mx3/crm_regs.h
@@ -24,7 +24,7 @@
#define CKIH_CLK_FREQ_27MHZ 27000000
#define CKIL_CLK_FREQ 32768
-#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR)
+#define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
/* Register addresses */
#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux-imx31.c
index c66ccbcdc11..a1d7fa5123d 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux-imx31.c
@@ -29,7 +29,7 @@
/*
* IOMUX register (base) addresses
*/
-#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR)
+#define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)
#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)
#define IOMUXGPR (IOMUX_BASE + 0x008)
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 54aab401dbd..1fed146324f 100644
--- a/arch/arm/mach-mx3/armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
static struct resource armadillo5x0_nor_flash_resource = {
.flags = IORESOURCE_MEM,
- .start = CS0_BASE_ADDR,
- .end = CS0_BASE_ADDR + SZ_64M - 1,
+ .start = MX31_CS0_BASE_ADDR,
+ .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
};
static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {
*/
static struct resource armadillo5x0_smc911x_resources[] = {
{
- .start = CS3_BASE_ADDR,
- .end = CS3_BASE_ADDR + SZ_32M - 1,
+ .start = MX31_CS3_BASE_ADDR,
+ .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
@@ -406,8 +406,8 @@ static struct sys_timer armadillo5x0_timer = {
MACHINE_START(ARMADILLO5X0, "Armadillo-500")
/* Maintainer: Alberto Panizzo */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.map_io = mx31_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 6fa99ce3008..2484dddca54 100644
--- a/arch/arm/mach-mx3/kzmarm11.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -46,13 +46,18 @@
#include "devices.h"
+#define KZM_ARM11_IO_ADDRESS(x) ( \
+ IMX_IO_ADDRESS(x, MX31_CS4) ?: \
+ IMX_IO_ADDRESS(x, MX31_CS5) ?: \
+ MX31_IO_ADDRESS(x))
+
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
/*
* KZM-ARM11-01 has an external UART on FPGA
*/
static struct plat_serial8250_port serial_platform_data[] = {
{
- .membase = IO_ADDRESS(KZM_ARM11_16550),
+ .membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
.mapbase = KZM_ARM11_16550,
.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
.irqflags = IRQ_TYPE_EDGE_RISING,
@@ -102,9 +107,9 @@ static int __init kzm_init_ext_uart(void)
/*
* Unmask UART interrupt
*/
- tmp = __raw_readb(IO_ADDRESS(KZM_ARM11_CTL1));
+ tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
tmp |= 0x2;
- __raw_writeb(tmp, IO_ADDRESS(KZM_ARM11_CTL1));
+ __raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
return platform_device_register(&serial_device);
}
@@ -128,8 +133,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {
static struct resource kzm_smsc9118_resources[] = {
{
- .start = CS5_BASE_ADDR,
- .end = CS5_BASE_ADDR + SZ_128K - 1,
+ .start = MX31_CS5_BASE_ADDR,
+ .end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
.flags = IORESOURCE_MEM,
},
{
@@ -222,15 +227,15 @@ static void __init kzm_board_init(void)
*/
static struct map_desc kzm_io_desc[] __initdata = {
{
- .virtual = CS4_BASE_ADDR_VIRT,
- .pfn = __phys_to_pfn(CS4_BASE_ADDR),
- .length = CS4_SIZE,
+ .virtual = MX31_CS4_BASE_ADDR_VIRT,
+ .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+ .length = MX31_CS4_SIZE,
.type = MT_DEVICE
},
{
- .virtual = CS5_BASE_ADDR_VIRT,
- .pfn = __phys_to_pfn(CS5_BASE_ADDR),
- .length = CS5_SIZE,
+ .virtual = MX31_CS5_BASE_ADDR_VIRT,
+ .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
+ .length = MX31_CS5_SIZE,
.type = MT_DEVICE
},
};
@@ -258,8 +263,8 @@ static struct sys_timer kzm_timer = {
* initialize __mach_desc_KZM_ARM11_01 data structure.
*/
MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = kzm_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 18715f1aa7e..88af58514a7 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)
*/
static struct map_desc mx31pdk_io_desc[] __initdata = {
{
- .virtual = CS5_BASE_ADDR_VIRT,
- .pfn = __phys_to_pfn(CS5_BASE_ADDR),
- .length = CS5_SIZE,
+ .virtual = MX31_CS5_BASE_ADDR_VIRT,
+ .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
+ .length = MX31_CS5_SIZE,
.type = MT_DEVICE,
},
};
@@ -256,8 +256,8 @@ static struct sys_timer mx31pdk_timer = {
*/
MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
/* Maintainer: Freescale Semiconductor, Inc. */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31pdk_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 938c549767d..59de37887f3 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -60,7 +60,7 @@
static struct plat_serial8250_port serial_platform_data[] = {
{
.membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
- .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
+ .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTA),
.irq = EXPIO_INT_XUART_INTA,
.uartclk = 14745600,
.regshift = 0,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
}, {
.membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
- .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
+ .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB),
.irq = EXPIO_INT_XUART_INTB,
.uartclk = 14745600,
.regshift = 0,
@@ -309,12 +309,8 @@ static struct regulator_init_data ldo1_data = {
};
static struct regulator_consumer_supply ldo2_consumers[] = {
- {
- .supply = "AVDD",
- },
- {
- .supply = "HPVDD",
- },
+ { .supply = "AVDD", .dev_name = "1-001a" },
+ { .supply = "HPVDD", .dev_name = "1-001a" },
};
/* CODEC and SIM */
@@ -385,8 +381,6 @@ static struct wm8350_audio_platform_data imx32ads_wm8350_setup = {
static int mx31_wm8350_init(struct wm8350 *wm8350)
{
- int i;
-
wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN,
WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW,
WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF,
@@ -422,10 +416,6 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
WM8350_GPIO_DEBOUNCE_OFF);
- /* Fix up for our own supplies. */
- for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++)
- ldo2_consumers[i].dev = wm8350->dev;
-
wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data);
wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data);
wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data);
@@ -498,9 +488,9 @@ static void mxc_init_i2c(void)
*/
static struct map_desc mx31ads_io_desc[] __initdata = {
{
- .virtual = CS4_BASE_ADDR_VIRT,
- .pfn = __phys_to_pfn(CS4_BASE_ADDR),
- .length = CS4_SIZE / 2,
+ .virtual = MX31_CS4_BASE_ADDR_VIRT,
+ .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+ .length = MX31_CS4_SIZE / 2,
.type = MT_DEVICE
},
};
@@ -545,8 +535,8 @@ static struct sys_timer mx31ads_timer = {
*/
MACHINE_START(MX31ADS, "Freescale MX31ADS")
/* Maintainer: Freescale Semiconductor, Inc. */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31ads_map_io,
.init_irq = mx31ads_init_irq,
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 9ce029f554b..9225cb72dd0 100644
--- a/arch/arm/mach-mx3/mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -57,8 +57,8 @@
static struct resource smsc91x_resources[] = {
{
- .start = CS4_BASE_ADDR,
- .end = CS4_BASE_ADDR + 0xffff,
+ .start = MX31_CS4_BASE_ADDR,
+ .end = MX31_CS4_BASE_ADDR + 0xffff,
.flags = IORESOURCE_MEM,
},
{
@@ -195,8 +195,8 @@ static struct sys_timer mx31lilly_timer = {
};
MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index 789b20d1730..8589e3d1dad 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {
static struct resource smsc911x_resources[] = {
{
- .start = CS4_BASE_ADDR,
- .end = CS4_BASE_ADDR + 0x100,
+ .start = MX31_CS4_BASE_ADDR,
+ .end = MX31_CS4_BASE_ADDR + 0x100,
.flags = IORESOURCE_MEM,
}, {
.start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
@@ -214,9 +214,9 @@ static struct platform_device physmap_flash_device = {
*/
static struct map_desc mx31lite_io_desc[] __initdata = {
{
- .virtual = CS4_BASE_ADDR_VIRT,
- .pfn = __phys_to_pfn(CS4_BASE_ADDR),
- .length = CS4_SIZE,
+ .virtual = MX31_CS4_BASE_ADDR_VIRT,
+ .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+ .length = MX31_CS4_SIZE,
.type = MT_DEVICE
}
};
@@ -287,8 +287,8 @@ struct sys_timer mx31lite_timer = {
MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
/* Maintainer: Freescale Semiconductor, Inc. */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31lite_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index cfd605d078e..63f991f8817 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -569,8 +569,8 @@ struct sys_timer mx31moboard_timer = {
MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
/* Maintainer: Valentin Longchamp, EPFL Mobots group */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mach-mx35pdk.c
index 0bbc65ea23c..2d11bf053c7 100644
--- a/arch/arm/mach-mx3/mx35pdk.c
+++ b/arch/arm/mach-mx3/mach-mx35pdk.c
@@ -106,8 +106,8 @@ struct sys_timer mx35pdk_timer = {
MACHINE_START(MX35_3DS, "Freescale MX35PDK")
/* Maintainer: Freescale Semiconductor, Inc */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX35_AIPS1_BASE_ADDR,
+ .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx35_map_io,
.init_irq = mx35_init_irq,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 5be396917c9..d9bd7d2b0ad 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -248,8 +248,8 @@ static struct imxuart_platform_data uart_pdata = {
static struct resource smsc911x_resources[] = {
{
- .start = CS1_BASE_ADDR + 0x300,
- .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
+ .start = MX31_CS1_BASE_ADDR + 0x300,
+ .end = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
@@ -281,8 +281,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
};
static struct resource pcm038_sram_resource = {
- .start = CS4_BASE_ADDR,
- .end = CS4_BASE_ADDR + 512 * 1024 - 1,
+ .start = MX31_CS4_BASE_ADDR,
+ .end = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
.flags = IORESOURCE_MEM,
};
@@ -536,8 +536,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {
static struct resource pcm970_sja1000_resources[] = {
{
- .start = CS5_BASE_ADDR,
- .end = CS5_BASE_ADDR + 0x100 - 1,
+ .start = MX31_CS5_BASE_ADDR,
+ .end = MX31_CS5_BASE_ADDR + 0x100 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
@@ -636,8 +636,8 @@ struct sys_timer pcm037_timer = {
MACHINE_START(PCM037, "Phytec Phycore pcm037")
/* Maintainer: Pengutronix */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index 8d386000fc4..8d386000fc4 100644
--- a/arch/arm/mach-mx3/pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index e3aa829be58..1212194fb9c 100644
--- a/arch/arm/mach-mx3/pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -248,8 +248,8 @@ struct sys_timer pcm043_timer = {
MACHINE_START(PCM043, "Phytec Phycore pcm043")
/* Maintainer: Pengutronix */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX35_AIPS1_BASE_ADDR,
+ .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx35_map_io,
.init_irq = mx35_init_irq,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/mach-qong.c
index 044511f1b9a..fdb819ae0e6 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -43,7 +43,7 @@
#define QONG_FPGA_VERSION(major, minor, rev) \
(((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
-#define QONG_FPGA_BASEADDR CS1_BASE_ADDR
+#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
#define QONG_FPGA_PERIPH_SIZE (1 << 24)
#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = {
};
static struct resource qong_flash_resource = {
- .start = CS0_BASE_ADDR,
- .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
+ .start = MX31_CS0_BASE_ADDR,
+ .end = MX31_CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
.flags = IORESOURCE_MEM,
};
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = {
};
static struct resource qong_nand_resource = {
- .start = CS3_BASE_ADDR,
- .end = CS3_BASE_ADDR + SZ_32M - 1,
+ .start = MX31_CS3_BASE_ADDR,
+ .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
@@ -198,9 +198,7 @@ static struct platform_device qong_nand_device = {
static void __init qong_init_nand_mtd(void)
{
/* init CS */
- __raw_writel(0x00004f00, CSCR_U(3));
- __raw_writel(0x20013b31, CSCR_L(3));
- __raw_writel(0x00020800, CSCR_A(3));
+ mx31_setup_weimcs(3, 0x00004f00, 0x20013b31, 0x00020800);
mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
/* enable pin */
@@ -275,8 +273,8 @@ static struct sys_timer qong_timer = {
MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
/* Maintainer: DENX Software Engineering GmbH */
- .phys_io = AIPS1_BASE_ADDR,
- .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .phys_io = MX31_AIPS1_BASE_ADDR,
+ .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x100,
.map_io = mx31_map_io,
.init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index 694611d6b05..ccd874225c3 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {
MX31_PIN_CSPI1_SS0__SS0,
MX31_PIN_CSPI1_SS1__SS1,
MX31_PIN_CSPI1_SS2__SS2,
+ /* SDHC1 */
+ MX31_PIN_SD1_DATA0__SD1_DATA0,
+ MX31_PIN_SD1_DATA1__SD1_DATA1,
+ MX31_PIN_SD1_DATA2__SD1_DATA2,
+ MX31_PIN_SD1_DATA3__SD1_DATA3,
+ MX31_PIN_SD1_CLK__SD1_CLK,
+ MX31_PIN_SD1_CMD__SD1_CMD,
};
/* UART */
@@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {
static int gpio_det, gpio_wp;
#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
- PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+ PAD_CTL_ODE_CMOS)
static int mxc_mmc1_get_ro(struct device *dev)
{
- return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
+ return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6));
}
static int mxc_mmc1_init(struct device *dev,
@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev,
gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);
- mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
- mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
- mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
- mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
+ MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
+ MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
+ MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
+ MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+ mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
+ MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
- mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
ret = gpio_request(gpio_det, "MMC detect");
if (ret)
@@ -113,7 +125,7 @@ static int mxc_mmc1_init(struct device *dev,
gpio_direction_input(gpio_wp);
ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq,
- IRQF_DISABLED | IRQF_TRIGGER_FALLING,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"MMC detect", data);
if (ret)
goto exit_free_wp;
@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
{
gpio_free(gpio_det);
gpio_free(gpio_wp);
- free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
+ free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data);
}
static struct imxmmc_platform_data mmc_pdata = {