diff options
Diffstat (limited to 'arch/arm/mach-mx5/board-cpuimx51sd.c')
-rw-r--r-- | arch/arm/mach-mx5/board-cpuimx51sd.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c index 7e8fb82d22f..ad931895d8b 100644 --- a/arch/arm/mach-mx5/board-cpuimx51sd.c +++ b/arch/arm/mach-mx5/board-cpuimx51sd.c @@ -65,9 +65,6 @@ #define MX51_USB_PLL_DIV_19_2_MHZ 0x01 #define MX51_USB_PLL_DIV_24_MHZ 0x02 -#define CPUIMX51SD_GPIO_3_12 IOMUX_PAD(0x57C, 0x194, 3, 0x0, 0, \ - MX51_PAD_CTRL_1 | PAD_CTL_PUS_22K_UP) - static iomux_v3_cfg_t eukrea_cpuimx51sd_pads[] = { /* UART1 */ MX51_PAD_UART1_RXD__UART1_RXD, @@ -88,30 +85,33 @@ static iomux_v3_cfg_t eukrea_cpuimx51sd_pads[] = { MX51_PAD_USBH1_DATA6__USBH1_DATA6, MX51_PAD_USBH1_DATA7__USBH1_DATA7, MX51_PAD_USBH1_STP__USBH1_STP, - MX51_PAD_EIM_CS3__GPIO_2_28, /* PHY nRESET */ + MX51_PAD_EIM_CS3__GPIO2_28, /* PHY nRESET */ /* FEC */ - MX51_PAD_EIM_DTACK__GPIO_2_31, /* PHY nRESET */ + MX51_PAD_EIM_DTACK__GPIO2_31, /* PHY nRESET */ /* HSI2C */ - MX51_PAD_I2C1_CLK__GPIO_4_16, - MX51_PAD_I2C1_DAT__GPIO_4_17, + MX51_PAD_I2C1_CLK__GPIO4_16, + MX51_PAD_I2C1_DAT__GPIO4_17, /* CAN */ MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, MX51_PAD_CSPI1_MISO__ECSPI1_MISO, MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, - MX51_PAD_CSPI1_SS0__GPIO_4_24, /* nCS */ - MX51_PAD_CSI2_PIXCLK__GPIO_4_15, /* nReset */ - MX51_PAD_GPIO_1_1__GPIO_1_1, /* IRQ */ - MX51_PAD_GPIO_1_4__GPIO_1_4, /* Control signals */ - MX51_PAD_GPIO_1_6__GPIO_1_6, - MX51_PAD_GPIO_1_7__GPIO_1_7, - MX51_PAD_GPIO_1_8__GPIO_1_8, - MX51_PAD_GPIO_1_9__GPIO_1_9, + MX51_PAD_CSPI1_SS0__GPIO4_24, /* nCS */ + MX51_PAD_CSI2_PIXCLK__GPIO4_15, /* nReset */ + MX51_PAD_GPIO1_1__GPIO1_1, /* IRQ */ + MX51_PAD_GPIO1_4__GPIO1_4, /* Control signals */ + MX51_PAD_GPIO1_6__GPIO1_6, + MX51_PAD_GPIO1_7__GPIO1_7, + MX51_PAD_GPIO1_8__GPIO1_8, + MX51_PAD_GPIO1_9__GPIO1_9, /* Touchscreen */ - CPUIMX51SD_GPIO_3_12, /* IRQ */ + /* IRQ */ + _MX51_PAD_CSI1_D8__GPIO3_12 | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | + PAD_CTL_PKE | PAD_CTL_SRE_FAST | + PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), }; static const struct imxuart_platform_data uart_pdata __initconst = { |