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Diffstat (limited to 'arch/arm/mach-omap1/mux.c')
-rw-r--r--arch/arm/mach-omap1/mux.c58
1 files changed, 56 insertions, 2 deletions
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index e9cc52d4cb2..667ce5027f6 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -29,7 +29,7 @@
#include <mach/hardware.h>
-#include <plat/mux.h>
+#include <mach/mux.h>
#ifdef CONFIG_OMAP_MUX
@@ -451,6 +451,56 @@ static int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
#endif
}
+static struct omap_mux_cfg *mux_cfg;
+
+int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg)
+{
+ if (!arch_mux_cfg || !arch_mux_cfg->pins || arch_mux_cfg->size == 0
+ || !arch_mux_cfg->cfg_reg) {
+ printk(KERN_ERR "Invalid pin table\n");
+ return -EINVAL;
+ }
+
+ mux_cfg = arch_mux_cfg;
+
+ return 0;
+}
+
+/*
+ * Sets the Omap MUX and PULL_DWN registers based on the table
+ */
+int __init_or_module omap_cfg_reg(const unsigned long index)
+{
+ struct pin_config *reg;
+
+ if (!cpu_class_is_omap1()) {
+ printk(KERN_ERR "mux: Broken omap_cfg_reg(%lu) entry\n",
+ index);
+ WARN_ON(1);
+ return -EINVAL;
+ }
+
+ if (mux_cfg == NULL) {
+ printk(KERN_ERR "Pin mux table not initialized\n");
+ return -ENODEV;
+ }
+
+ if (index >= mux_cfg->size) {
+ printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
+ index, mux_cfg->size);
+ dump_stack();
+ return -ENODEV;
+ }
+
+ reg = &mux_cfg->pins[index];
+
+ if (!mux_cfg->cfg_reg)
+ return -ENODEV;
+
+ return mux_cfg->cfg_reg(reg);
+}
+EXPORT_SYMBOL(omap_cfg_reg);
+
int __init omap1_mux_init(void)
{
if (cpu_is_omap7xx()) {
@@ -468,4 +518,8 @@ int __init omap1_mux_init(void)
return omap_mux_register(&arch_mux_cfg);
}
-#endif
+#else
+#define omap_mux_init() do {} while(0)
+#define omap_cfg_reg(x) do {} while(0)
+#endif /* CONFIG_OMAP_MUX */
+