diff options
Diffstat (limited to 'arch/arm/mach-omap1')
29 files changed, 692 insertions, 522 deletions
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 10a301e3243..cd8de89c5fa 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -7,6 +7,11 @@ config ARCH_OMAP730 select CPU_ARM926T select ARCH_OMAP_OTG +config ARCH_OMAP850 + depends on ARCH_OMAP1 + bool "OMAP850 Based System" + select CPU_ARM926T + config ARCH_OMAP15XX depends on ARCH_OMAP1 default y @@ -46,6 +51,12 @@ config MACH_OMAP_H3 TI OMAP 1710 H3 board support. Say Y here if you have such a board. +config MACH_OMAP_HTCWIZARD + bool "HTC Wizard" + depends on ARCH_OMAP850 + help + HTC Wizard smartphone support (AKA QTEK 9100, ...) + config MACH_OMAP_OSK bool "TI OSK Support" depends on ARCH_OMAP1 && ARCH_OMAP16XX @@ -98,7 +109,7 @@ config MACH_OMAP_PALMZ71 help Support for the Palm Zire71 PDA. To boot the kernel, you'll need a PalmOS compatible bootloader; check out - http://hackndev.com/palm/z71 for more informations. + http://hackndev.com/palm/z71 for more information. Say Y here if you have such a PDA, say N otherwise. config MACH_OMAP_PALMTT @@ -163,7 +174,7 @@ config OMAP_ARM_216MHZ config OMAP_ARM_195MHZ bool "OMAP ARM 195 MHz CPU" - depends on ARCH_OMAP1 && ARCH_OMAP730 + depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850) help Enable 195MHz clock for OMAP CPU. If unsure, say N. @@ -175,13 +186,13 @@ config OMAP_ARM_192MHZ config OMAP_ARM_182MHZ bool "OMAP ARM 182 MHz CPU" - depends on ARCH_OMAP1 && ARCH_OMAP730 + depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850) help Enable 182MHz clock for OMAP CPU. If unsure, say N. config OMAP_ARM_168MHZ bool "OMAP ARM 168 MHz CPU" - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) + depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) help Enable 168MHz clock for OMAP CPU. If unsure, say N. @@ -193,20 +204,20 @@ config OMAP_ARM_150MHZ config OMAP_ARM_120MHZ bool "OMAP ARM 120 MHz CPU" - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) + depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) help Enable 120MHz clock for OMAP CPU. If unsure, say N. config OMAP_ARM_60MHZ bool "OMAP ARM 60 MHz CPU" - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) + depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) default y help Enable 60MHz clock for OMAP CPU. If unsure, say Y. config OMAP_ARM_30MHZ bool "OMAP ARM 30 MHz CPU" - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) + depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) help Enable 30MHz clock for OMAP CPU. If unsure, say N. diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 2e618391cc5..8b40aace9db 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -175,7 +175,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = { static struct omap_board_config_kernel ams_delta_config[] = { { OMAP_TAG_LCD, &ams_delta_lcd_config }, { OMAP_TAG_UART, &ams_delta_uart_config }, - { OMAP_TAG_USB, &ams_delta_usb_config }, }; static struct resource ams_delta_kp_resources[] = { @@ -232,6 +231,7 @@ static void __init ams_delta_init(void) /* Clear latch2 (NAND, LCD, modem enable) */ ams_delta_latch2_write(~0, 0); + omap_usb_init(&ams_delta_usb_config); platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); } diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 30308294e7c..19e0e923233 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -34,7 +34,39 @@ #include <mach/keypad.h> #include <mach/common.h> #include <mach/board.h> -#include <mach/board-fsample.h> + +/* fsample is pretty close to p2-sample */ + +#define fsample_cpld_read(reg) __raw_readb(reg) +#define fsample_cpld_write(val, reg) __raw_writeb(val, reg) + +#define FSAMPLE_CPLD_BASE 0xE8100000 +#define FSAMPLE_CPLD_SIZE SZ_4K +#define FSAMPLE_CPLD_START 0x05080000 + +#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00) +#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02) +#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02) +#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04) +#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06) +#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06) + +#define FSAMPLE_CPLD_BIT_BT_RESET 0 +#define FSAMPLE_CPLD_BIT_LCD_RESET 1 +#define FSAMPLE_CPLD_BIT_CAM_PWDN 2 +#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3 +#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4 +#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5 +#define FSAMPLE_CPLD_BIT_BACKLIGHT 6 +#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7 +#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8 +#define FSAMPLE_CPLD_BIT_OTG_RESET 9 + +#define fsample_cpld_set(bit) \ + fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR) + +#define fsample_cpld_clear(bit) \ + fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) static int fsample_keymap[] = { KEY(0,0,KEY_UP), diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 7d267020537..e724940e86f 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -62,7 +62,6 @@ static struct omap_uart_config generic_uart_config __initdata = { }; static struct omap_board_config_kernel generic_config[] __initdata = { - { OMAP_TAG_USB, NULL }, { OMAP_TAG_UART, &generic_uart_config }, }; @@ -70,12 +69,12 @@ static void __init omap_generic_init(void) { #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap15xx()) { - generic_config[0].data = &generic1510_usb_config; + omap_usb_init(&generic1510_usb_config); } #endif #if defined(CONFIG_ARCH_OMAP16XX) if (!cpu_is_omap1510()) { - generic_config[0].data = &generic1610_usb_config; + omap_usb_init(&generic1610_usb_config); } #endif diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c index 409fa56d0a8..44d4a966bed 100644 --- a/arch/arm/mach-omap1/board-h2-mmc.c +++ b/arch/arm/mach-omap1/board-h2-mmc.c @@ -19,6 +19,8 @@ #include <mach/mmc.h> #include <mach/gpio.h> +#include "board-h2.h" + #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) static int mmc_set_power(struct device *dev, int slot, int power_on, diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 0d784a79509..f695aa053ac 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -46,6 +46,11 @@ #include <mach/keypad.h> #include <mach/common.h> +#include "board-h2.h" + +/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ +#define OMAP1610_ETHR_START 0x04000300 + static int h2_keymap[] = { KEY(0, 0, KEY_LEFT), KEY(0, 1, KEY_RIGHT), @@ -364,7 +369,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = { }; static struct omap_board_config_kernel h2_config[] __initdata = { - { OMAP_TAG_USB, &h2_usb_config }, { OMAP_TAG_UART, &h2_uart_config }, { OMAP_TAG_LCD, &h2_lcd_config }, }; @@ -413,6 +417,7 @@ static void __init h2_init(void) omap_serial_init(); omap_register_i2c_bus(1, 100, h2_i2c_board_info, ARRAY_SIZE(h2_i2c_board_info)); + omap_usb_init(&h2_usb_config); h2_mmc_init(); } diff --git a/arch/arm/mach-omap1/board-h2.h b/arch/arm/mach-omap1/board-h2.h new file mode 100644 index 00000000000..315e2662547 --- /dev/null +++ b/arch/arm/mach-omap1/board-h2.h @@ -0,0 +1,38 @@ +/* + * arch/arm/mach-omap1/board-h2.h + * + * Hardware definitions for TI OMAP1610 H2 board. + * + * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OMAP_H2_H +#define __ASM_ARCH_OMAP_H2_H + +#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) +# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3) + +extern void h2_mmc_init(void); + +#endif /* __ASM_ARCH_OMAP_H2_H */ + diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c index fdfe793d56f..0d8a3c195e2 100644 --- a/arch/arm/mach-omap1/board-h3-mmc.c +++ b/arch/arm/mach-omap1/board-h3-mmc.c @@ -19,6 +19,8 @@ #include <mach/mmc.h> #include <mach/gpio.h> +#include "board-h3.h" + #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) static int mmc_set_power(struct device *dev, int slot, int power_on, diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index bf08b6ad22e..4695965114c 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -50,6 +50,11 @@ #include <mach/dma.h> #include <mach/common.h> +#include "board-h3.h" + +/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ +#define OMAP1710_ETHR_START 0x04000300 + #define H3_TS_GPIO 48 static int h3_keymap[] = { @@ -418,7 +423,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = { }; static struct omap_board_config_kernel h3_config[] __initdata = { - { OMAP_TAG_USB, &h3_usb_config }, { OMAP_TAG_UART, &h3_uart_config }, { OMAP_TAG_LCD, &h3_lcd_config }, }; @@ -472,6 +476,7 @@ static void __init h3_init(void) omap_serial_init(); omap_register_i2c_bus(1, 100, h3_i2c_board_info, ARRAY_SIZE(h3_i2c_board_info)); + omap_usb_init(&h3_usb_config); h3_mmc_init(); } diff --git a/arch/arm/mach-omap1/board-h3.h b/arch/arm/mach-omap1/board-h3.h new file mode 100644 index 00000000000..78de535be3c --- /dev/null +++ b/arch/arm/mach-omap1/board-h3.h @@ -0,0 +1,35 @@ +/* + * arch/arm/mach-omap1/board-h3.h + * + * Copyright (C) 2001 RidgeRun, Inc. + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef __ASM_ARCH_OMAP_H3_H +#define __ASM_ARCH_OMAP_H3_H + +#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) +# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4) + +extern void h3_mmc_init(void); + +#endif /* __ASM_ARCH_OMAP_H3_H */ diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 071cd02a734..2fd98260ea4 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -39,6 +39,9 @@ #include <mach/common.h> #include <mach/mmc.h> +/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ +#define INNOVATOR1610_ETHR_START 0x04000300 + static int innovator_keymap[] = { KEY(0, 0, KEY_F1), KEY(0, 3, KEY_DOWN), @@ -370,7 +373,6 @@ static struct omap_uart_config innovator_uart_config __initdata = { }; static struct omap_board_config_kernel innovator_config[] = { - { OMAP_TAG_USB, NULL }, { OMAP_TAG_LCD, NULL }, { OMAP_TAG_UART, &innovator_uart_config }, }; @@ -392,13 +394,13 @@ static void __init innovator_init(void) #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { - innovator_config[0].data = &innovator1510_usb_config; + omap_usb_init(&innovator1510_usb_config); innovator_config[1].data = &innovator1510_lcd_config; } #endif #ifdef CONFIG_ARCH_OMAP16XX if (cpu_is_omap1610()) { - innovator_config[0].data = &h2_usb_config; + omap_usb_init(&h2_usb_config); innovator_config[1].data = &innovator1610_lcd_config; } #endif diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index af51e0b180f..7bc7a3cb9c5 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -233,10 +233,6 @@ static inline void nokia770_mmc_init(void) } #endif -static struct omap_board_config_kernel nokia770_config[] __initdata = { - { OMAP_TAG_USB, NULL }, -}; - #if defined(CONFIG_OMAP_DSP) /* * audio power control @@ -371,19 +367,16 @@ static __init int omap_dsp_init(void) static void __init omap_nokia770_init(void) { - nokia770_config[0].data = &nokia770_usb_config; - platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); spi_register_board_info(nokia770_spi_board_info, ARRAY_SIZE(nokia770_spi_board_info)); - omap_board_config = nokia770_config; - omap_board_config_size = ARRAY_SIZE(nokia770_config); omap_gpio_init(); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); omap_dsp_init(); ads7846_dev_init(); mipid_dev_init(); + omap_usb_init(&nokia770_usb_config); nokia770_mmc_init(); } diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 1a16ecb2ccc..cf3247b15f8 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -52,6 +52,20 @@ #include <mach/tc.h> #include <mach/common.h> +/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ +#define OMAP_OSK_ETHR_START 0x04800300 + +/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with + * alternate pin configurations for hardware-controlled blinking. + */ +#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) +# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0) +# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1) +# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2) +# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3) +# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4) +# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5) + static struct mtd_partition osk_partitions[] = { /* bootloader (U-Boot, etc) in first sector */ { @@ -290,7 +304,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = { #endif static struct omap_board_config_kernel osk_config[] __initdata = { - { OMAP_TAG_USB, &osk_usb_config }, { OMAP_TAG_UART, &osk_uart_config }, #ifdef CONFIG_OMAP_OSK_MISTRAL { OMAP_TAG_LCD, &osk_lcd_config }, @@ -541,6 +554,8 @@ static void __init osk_init(void) l |= (3 << 1); omap_writel(l, USB_TRANSCEIVER_CTRL); + omap_usb_init(&osk_usb_config); + /* irq for tps65010 chip */ /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ if (gpio_request(OMAP_MPUIO(1), "tps65010") == 0) diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 99f2b43f254..886b4c0569b 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -43,6 +43,21 @@ #include <mach/keypad.h> #include <mach/common.h> +#define PALMTE_USBDETECT_GPIO 0 +#define PALMTE_USB_OR_DC_GPIO 1 +#define PALMTE_TSC_GPIO 4 +#define PALMTE_PINTDAV_GPIO 6 +#define PALMTE_MMC_WP_GPIO 8 +#define PALMTE_MMC_POWER_GPIO 9 +#define PALMTE_HDQ_GPIO 11 +#define PALMTE_HEADPHONES_GPIO 14 +#define PALMTE_SPEAKER_GPIO 15 +#define PALMTE_DC_GPIO OMAP_MPUIO(2) +#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4) +#define PALMTE_MMC1_GPIO OMAP_MPUIO(6) +#define PALMTE_MMC2_GPIO OMAP_MPUIO(7) +#define PALMTE_MMC3_GPIO OMAP_MPUIO(11) + static void __init omap_palmte_init_irq(void) { omap1_init_common_hw(); @@ -286,7 +301,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery) #endif static struct omap_board_config_kernel palmte_config[] __initdata = { - { OMAP_TAG_USB, &palmte_usb_config }, { OMAP_TAG_LCD, &palmte_lcd_config }, { OMAP_TAG_UART, &palmte_uart_config }, }; @@ -341,6 +355,7 @@ static void __init omap_palmte_init(void) spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); palmte_misc_gpio_setup(); omap_serial_init(); + omap_usb_init(&palmte_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); } diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 1cbc1275c95..4f1b44831d3 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -43,6 +43,13 @@ #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> +#define PALMTT_USBDETECT_GPIO 0 +#define PALMTT_CABLE_GPIO 1 +#define PALMTT_LED_GPIO 3 +#define PALMTT_PENIRQ_GPIO 6 +#define PALMTT_MMC_WP_GPIO 8 +#define PALMTT_HDQ_GPIO 11 + static int palmtt_keymap[] = { KEY(0, 0, KEY_ESC), KEY(0, 1, KEY_SPACE), @@ -272,7 +279,6 @@ static struct omap_uart_config palmtt_uart_config __initdata = { }; static struct omap_board_config_kernel palmtt_config[] __initdata = { - { OMAP_TAG_USB, &palmtt_usb_config }, { OMAP_TAG_LCD, &palmtt_lcd_config }, { OMAP_TAG_UART, &palmtt_uart_config }, }; @@ -297,6 +303,7 @@ static void __init omap_palmtt_init(void) spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); omap_serial_init(); + omap_usb_init(&palmtt_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); } diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index baf5efbfe3e..9a55c3c5821 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -46,6 +46,16 @@ #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> +#define PALMZ71_USBDETECT_GPIO 0 +#define PALMZ71_PENIRQ_GPIO 6 +#define PALMZ71_MMC_WP_GPIO 8 +#define PALMZ71_HDQ_GPIO 11 + +#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1) +#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2) +#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3) +#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4) + static void __init omap_palmz71_init_irq(void) { @@ -239,7 +249,6 @@ static struct omap_uart_config palmz71_uart_config __initdata = { }; static struct omap_board_config_kernel palmz71_config[] __initdata = { - {OMAP_TAG_USB, &palmz71_usb_config}, {OMAP_TAG_LCD, &palmz71_lcd_config}, {OMAP_TAG_UART, &palmz71_uart_config}, }; @@ -313,6 +322,7 @@ omap_palmz71_init(void) spi_register_board_info(palmz71_boardinfo, ARRAY_SIZE(palmz71_boardinfo)); + omap_usb_init(&palmz71_usb_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); palmz71_gpio_setup(0); diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c index 66a4d7d5255..58a46e4e45c 100644 --- a/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/arch/arm/mach-omap1/board-sx1-mmc.c @@ -17,6 +17,7 @@ #include <mach/hardware.h> #include <mach/mmc.h> #include <mach/gpio.h> +#include <mach/board-sx1.h> #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 28c76a1e71c..c096577695f 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -41,6 +41,7 @@ #include <mach/board.h> #include <mach/common.h> #include <mach/keypad.h> +#include <mach/board-sx1.h> /* Write to I2C device */ int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) @@ -373,7 +374,6 @@ static struct omap_uart_config sx1_uart_config __initdata = { }; static struct omap_board_config_kernel sx1_config[] __initdata = { - { OMAP_TAG_USB, &sx1_usb_config }, { OMAP_TAG_LCD, &sx1_lcd_config }, { OMAP_TAG_UART, &sx1_uart_config }, }; @@ -388,6 +388,7 @@ static void __init omap_sx1_init(void) omap_board_config_size = ARRAY_SIZE(sx1_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); + omap_usb_init(&sx1_usb_config); sx1_mmc_init(); /* turn on USB power */ diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index a7653542a2b..98275e03dad 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -145,7 +145,6 @@ static struct omap_uart_config voiceblue_uart_config __initdata = { }; static struct omap_board_config_kernel voiceblue_config[] = { - { OMAP_TAG_USB, &voiceblue_usb_config }, { OMAP_TAG_UART, &voiceblue_uart_config }, }; @@ -185,6 +184,7 @@ static void __init voiceblue_init(void) omap_board_config = voiceblue_config; omap_board_config_size = ARRAY_SIZE(voiceblue_config); omap_serial_init(); + omap_usb_init(&voiceblue_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); /* There is a good chance board is going up, so enable power LED diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 5fba2073171..dafe4f71d15 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -20,41 +20,161 @@ #include <linux/io.h> #include <asm/mach-types.h> +#include <asm/clkdev.h> #include <mach/cpu.h> #include <mach/usb.h> #include <mach/clock.h> #include <mach/sram.h> +static const struct clkops clkops_generic; +static const struct clkops clkops_uart; +static const struct clkops clkops_dspck; + #include "clock.h" +static int clk_omap1_dummy_enable(struct clk *clk) +{ + return 0; +} + +static void clk_omap1_dummy_disable(struct clk *clk) +{ +} + +static const struct clkops clkops_dummy = { + .enable = clk_omap1_dummy_enable, + .disable = clk_omap1_dummy_disable, +}; + +static struct clk dummy_ck = { + .name = "dummy", + .ops = &clkops_dummy, + .flags = RATE_FIXED, +}; + +struct omap_clk { + u32 cpu; + struct clk_lookup lk; +}; + +#define CLK(dev, con, ck, cp) \ + { \ + .cpu = cp, \ + .lk = { \ + .dev_id = dev, \ + .con_id = con, \ + .clk = ck, \ + }, \ + } + +#define CK_310 (1 << 0) +#define CK_730 (1 << 1) +#define CK_1510 (1 << 2) +#define CK_16XX (1 << 3) + +static struct omap_clk omap_clks[] = { + /* non-ULPD clocks */ + CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), + /* CK_GEN1 clocks */ + CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), + CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), + CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), + CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), + CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX), + /* CK_GEN2 clocks */ + CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), + /* CK_GEN3 clocks */ + CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730), + CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), + CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX), + CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), + CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), + CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), + CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), + CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), + CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), + CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730), + CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), + /* ULPD clocks */ + CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), + CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), + CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), + CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), + CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), + CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), + CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), + CLK(NULL, "mclk", &mclk_16xx, CK_16XX), + CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), + CLK(NULL, "bclk", &bclk_16xx, CK_16XX), + CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), + CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), + CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), + /* Virtual clocks */ + CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), + CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310), + CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), + CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), + CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX), + CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX), + CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), +}; + +static int omap1_clk_enable_generic(struct clk * clk); +static int omap1_clk_enable(struct clk *clk); +static void omap1_clk_disable_generic(struct clk * clk); +static void omap1_clk_disable(struct clk *clk); + __u32 arm_idlect1_mask; /*------------------------------------------------------------------------- * Omap1 specific clock functions *-------------------------------------------------------------------------*/ -static void omap1_watchdog_recalc(struct clk * clk) +static unsigned long omap1_watchdog_recalc(struct clk *clk) { - clk->rate = clk->parent->rate / 14; + return clk->parent->rate / 14; } -static void omap1_uart_recalc(struct clk * clk) +static unsigned long omap1_uart_recalc(struct clk *clk) { - unsigned int val = omap_readl(clk->enable_reg); - if (val & clk->enable_bit) - clk->rate = 48000000; - else - clk->rate = 12000000; + unsigned int val = __raw_readl(clk->enable_reg); + return val & clk->enable_bit ? 48000000 : 12000000; } -static void omap1_sossi_recalc(struct clk *clk) +static unsigned long omap1_sossi_recalc(struct clk *clk) { u32 div = omap_readl(MOD_CONF_CTRL_1); div = (div >> 17) & 0x7; div++; - clk->rate = clk->parent->rate / div; + + return clk->parent->rate / div; } static int omap1_clk_enable_dsp_domain(struct clk *clk) @@ -78,6 +198,11 @@ static void omap1_clk_disable_dsp_domain(struct clk *clk) } } +static const struct clkops clkops_dspck = { + .enable = &omap1_clk_enable_dsp_domain, + .disable = &omap1_clk_disable_dsp_domain, +}; + static int omap1_clk_enable_uart_functional(struct clk *clk) { int ret; @@ -105,6 +230,11 @@ static void omap1_clk_disable_uart_functional(struct clk *clk) omap1_clk_disable_generic(clk); } +static const struct clkops clkops_uart = { + .enable = &omap1_clk_enable_uart_functional, + .disable = &omap1_clk_disable_uart_functional, +}; + static void omap1_clk_allow_idle(struct clk *clk) { struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; @@ -197,9 +327,6 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) struct clk * parent; unsigned dsor_exp; - if (unlikely(!(clk->flags & RATE_CKCTL))) - return -EINVAL; - parent = clk->parent; if (unlikely(parent == NULL)) return -EIO; @@ -215,22 +342,15 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -static void omap1_ckctl_recalc(struct clk * clk) +static unsigned long omap1_ckctl_recalc(struct clk *clk) { - int dsor; - /* Calculate divisor encoded as 2-bit exponent */ - dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); + int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); - if (unlikely(clk->rate == clk->parent->rate / dsor)) - return; /* No change, quick exit */ - clk->rate = clk->parent->rate / dsor; - - if (unlikely(clk->flags & RATE_PROPAGATES)) - propagate_rate(clk); + return clk->parent->rate / dsor; } -static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) { int dsor; @@ -245,12 +365,7 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); omap1_clk_disable(&api_ck.clk); - if (unlikely(clk->rate == clk->parent->rate / dsor)) - return; /* No change, quick exit */ - clk->rate = clk->parent->rate / dsor; - - if (unlikely(clk->flags & RATE_PROPAGATES)) - propagate_rate(clk); + return clk->parent->rate / dsor; } /* MPU virtual clock functions */ @@ -289,35 +404,57 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate) omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); ck_dpll1.rate = ptr->pll_rate; - propagate_rate(&ck_dpll1); return 0; } static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) { - int ret = -EINVAL; - int dsor_exp; - __u16 regval; - - if (clk->flags & RATE_CKCTL) { - dsor_exp = calc_dsor_exp(clk, rate); - if (dsor_exp > 3) - dsor_exp = -EINVAL; - if (dsor_exp < 0) - return dsor_exp; - - regval = __raw_readw(DSP_CKCTL); - regval &= ~(3 << clk->rate_offset); - regval |= dsor_exp << clk->rate_offset; - __raw_writew(regval, DSP_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); - ret = 0; - } + int dsor_exp; + u16 regval; - if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) - propagate_rate(clk); + dsor_exp = calc_dsor_exp(clk, rate); + if (dsor_exp > 3) + dsor_exp = -EINVAL; + if (dsor_exp < 0) + return dsor_exp; - return ret; + regval = __raw_readw(DSP_CKCTL); + regval &= ~(3 << clk->rate_offset); + regval |= dsor_exp << clk->rate_offset; + __raw_writew(regval, DSP_CKCTL); + clk->rate = clk->parent->rate / (1 << dsor_exp); + + return 0; +} + +static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) +{ + int dsor_exp = calc_dsor_exp(clk, rate); + if (dsor_exp < 0) + return dsor_exp; + if (dsor_exp > 3) + dsor_exp = 3; + return clk->parent->rate / (1 << dsor_exp); +} + +static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) +{ + int dsor_exp; + u16 regval; + + dsor_exp = calc_dsor_exp(clk, rate); + if (dsor_exp > 3) + dsor_exp = -EINVAL; + if (dsor_exp < 0) + return dsor_exp; + + regval = omap_readw(ARM_CKCTL); + regval &= ~(3 << clk->rate_offset); + regval |= dsor_exp << clk->rate_offset; + regval = verify_ckctl_value(regval); + omap_writew(regval, ARM_CKCTL); + clk->rate = clk->parent->rate / (1 << dsor_exp); + return 0; } static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate) @@ -372,14 +509,14 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate) { unsigned int val; - val = omap_readl(clk->enable_reg); + val = __raw_readl(clk->enable_reg); if (rate == 12000000) val &= ~(1 << clk->enable_bit); else if (rate == 48000000) val |= (1 << clk->enable_bit); else return -EINVAL; - omap_writel(val, clk->enable_reg); + __raw_writel(val, clk->enable_reg); clk->rate = rate; return 0; @@ -398,8 +535,8 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate) else ratio_bits = (dsor - 2) << 2; - ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd; - omap_writew(ratio_bits, clk->enable_reg); + ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd; + __raw_writew(ratio_bits, clk->enable_reg); return 0; } @@ -423,8 +560,6 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) omap_writel(l, MOD_CONF_CTRL_1); clk->rate = p_rate / (div + 1); - if (unlikely(clk->flags & RATE_PROPAGATES)) - propagate_rate(clk); return 0; } @@ -440,8 +575,8 @@ static void omap1_init_ext_clk(struct clk * clk) __u16 ratio_bits; /* Determine current rate and ensure clock is based on 96MHz APLL */ - ratio_bits = omap_readw(clk->enable_reg) & ~1; - omap_writew(ratio_bits, clk->enable_reg); + ratio_bits = __raw_readw(clk->enable_reg) & ~1; + __raw_writew(ratio_bits, clk->enable_reg); ratio_bits = (ratio_bits & 0xfc) >> 2; if (ratio_bits > 6) @@ -468,7 +603,7 @@ static int omap1_clk_enable(struct clk *clk) omap1_clk_deny_idle(clk->parent); } - ret = clk->enable(clk); + ret = clk->ops->enable(clk); if (unlikely(ret != 0) && clk->parent) { omap1_clk_disable(clk->parent); @@ -482,7 +617,7 @@ static int omap1_clk_enable(struct clk *clk) static void omap1_clk_disable(struct clk *clk) { if (clk->usecount > 0 && !(--clk->usecount)) { - clk->disable(clk); + clk->ops->disable(clk); if (likely(clk->parent)) { omap1_clk_disable(clk->parent); if (clk->flags & CLOCK_NO_IDLE_PARENT) @@ -496,9 +631,6 @@ static int omap1_clk_enable_generic(struct clk *clk) __u16 regval16; __u32 regval32; - if (clk->flags & ALWAYS_ENABLED) - return 0; - if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", clk->name); @@ -506,25 +638,13 @@ static int omap1_clk_enable_generic(struct clk *clk) } if (clk->flags & ENABLE_REG_32BIT) { - if (clk->flags & VIRTUAL_IO_ADDRESS) { - regval32 = __raw_readl(clk->enable_reg); - regval32 |= (1 << clk->enable_bit); - __raw_writel(regval32, clk->enable_reg); - } else { - regval32 = omap_readl(clk->enable_reg); - regval32 |= (1 << clk->enable_bit); - omap_writel(regval32, clk->enable_reg); - } + regval32 = __raw_readl(clk->enable_reg); + regval32 |= (1 << clk->enable_bit); + __raw_writel(regval32, clk->enable_reg); } else { - if (clk->flags & VIRTUAL_IO_ADDRESS) { - regval16 = __raw_readw(clk->enable_reg); - regval16 |= (1 << clk->enable_bit); - __raw_writew(regval16, clk->enable_reg); - } else { - regval16 = omap_readw(clk->enable_reg); - regval16 |= (1 << clk->enable_bit); - omap_writew(regval16, clk->enable_reg); - } + regval16 = __raw_readw(clk->enable_reg); + regval16 |= (1 << clk->enable_bit); + __raw_writew(regval16, clk->enable_reg); } return 0; @@ -539,44 +659,26 @@ static void omap1_clk_disable_generic(struct clk *clk) return; if (clk->flags & ENABLE_REG_32BIT) { - if (clk->flags & VIRTUAL_IO_ADDRESS) { - regval32 = __raw_readl(clk->enable_reg); - regval32 &= ~(1 << clk->enable_bit); - __raw_writel(regval32, clk->enable_reg); - } else { - regval32 = omap_readl(clk->enable_reg); - regval32 &= ~(1 << clk->enable_bit); - omap_writel(regval32, clk->enable_reg); - } + regval32 = __raw_readl(clk->enable_reg); + regval32 &= ~(1 << clk->enable_bit); + __raw_writel(regval32, clk->enable_reg); } else { - if (clk->flags & VIRTUAL_IO_ADDRESS) { - regval16 = __raw_readw(clk->enable_reg); - regval16 &= ~(1 << clk->enable_bit); - __raw_writew(regval16, clk->enable_reg); - } else { - regval16 = omap_readw(clk->enable_reg); - regval16 &= ~(1 << clk->enable_bit); - omap_writew(regval16, clk->enable_reg); - } + regval16 = __raw_readw(clk->enable_reg); + regval16 &= ~(1 << clk->enable_bit); + __raw_writew(regval16, clk->enable_reg); } } +static const struct clkops clkops_generic = { + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, +}; + static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) { - int dsor_exp; - if (clk->flags & RATE_FIXED) return clk->rate; - if (clk->flags & RATE_CKCTL) { - dsor_exp = calc_dsor_exp(clk, rate); - if (dsor_exp < 0) - return dsor_exp; - if (dsor_exp > 3) - dsor_exp = 3; - return clk->parent->rate / (1 << dsor_exp); - } - if (clk->round_rate != NULL) return clk->round_rate(clk, rate); @@ -586,30 +688,9 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) { int ret = -EINVAL; - int dsor_exp; - __u16 regval; if (clk->set_rate) ret = clk->set_rate(clk, rate); - else if (clk->flags & RATE_CKCTL) { - dsor_exp = calc_dsor_exp(clk, rate); - if (dsor_exp > 3) - dsor_exp = -EINVAL; - if (dsor_exp < 0) - return dsor_exp; - - regval = omap_readw(ARM_CKCTL); - regval &= ~(3 << clk->rate_offset); - regval |= dsor_exp << clk->rate_offset; - regval = verify_ckctl_value(regval); - omap_writew(regval, ARM_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); - ret = 0; - } - - if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) - propagate_rate(clk); - return ret; } @@ -632,17 +713,10 @@ static void __init omap1_clk_disable_unused(struct clk *clk) } /* Is the clock already disabled? */ - if (clk->flags & ENABLE_REG_32BIT) { - if (clk->flags & VIRTUAL_IO_ADDRESS) - regval32 = __raw_readl(clk->enable_reg); - else - regval32 = omap_readl(clk->enable_reg); - } else { - if (clk->flags & VIRTUAL_IO_ADDRESS) - regval32 = __raw_readw(clk->enable_reg); - else - regval32 = omap_readw(clk->enable_reg); - } + if (clk->flags & ENABLE_REG_32BIT) + regval32 = __raw_readl(clk->enable_reg); + else + regval32 = __raw_readw(clk->enable_reg); if ((regval32 & (1 << clk->enable_bit)) == 0) return; @@ -659,7 +733,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk) } printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->disable(clk); + clk->ops->disable(clk); printk(" done\n"); } @@ -677,10 +751,10 @@ static struct clk_functions omap1_clk_functions = { int __init omap1_clk_init(void) { - struct clk ** clkp; + struct omap_clk *c; const struct omap_clock_config *info; int crystal_type = 0; /* Default 12 MHz */ - u32 reg; + u32 reg, cpu_mask; #ifdef CONFIG_DEBUG_LL /* Resets some clocks that may be left on from bootloader, @@ -700,27 +774,24 @@ int __init omap1_clk_init(void) /* By default all idlect1 clocks are allowed to idle */ arm_idlect1_mask = ~0; - for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) { - if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) { - clk_register(*clkp); - continue; - } - - if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) { - clk_register(*clkp); - continue; - } - - if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) { - clk_register(*clkp); - continue; - } + for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) + clk_init_one(c->lk.clk); - if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) { - clk_register(*clkp); - continue; + cpu_mask = 0; + if (cpu_is_omap16xx()) + cpu_mask |= CK_16XX; + if (cpu_is_omap1510()) + cpu_mask |= CK_1510; + if (cpu_is_omap730()) + cpu_mask |= CK_730; + if (cpu_is_omap310()) + cpu_mask |= CK_310; + + for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) + if (c->cpu & cpu_mask) { + clkdev_add(&c->lk); + clk_register(c->lk.clk); } - } info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); if (info != NULL) { @@ -769,7 +840,6 @@ int __init omap1_clk_init(void) } } } - propagate_rate(&ck_dpll1); #else /* Find the highest supported frequency and enable it */ if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { @@ -778,9 +848,9 @@ int __init omap1_clk_init(void) omap_writew(0x2290, DPLL_CTL); omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL); ck_dpll1.rate = 60000000; - propagate_rate(&ck_dpll1); } #endif + propagate_rate(&ck_dpll1); /* Cache rates for clocks connected to ck_ref (not dpll1) */ propagate_rate(&ck_ref); printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " @@ -832,4 +902,3 @@ int __init omap1_clk_init(void) return 0; } - diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index c1dcdf18d8d..17f87427125 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -13,27 +13,22 @@ #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H #define __ARCH_ARM_MACH_OMAP1_CLOCK_H -static int omap1_clk_enable_generic(struct clk * clk); -static void omap1_clk_disable_generic(struct clk * clk); -static void omap1_ckctl_recalc(struct clk * clk); -static void omap1_watchdog_recalc(struct clk * clk); +static unsigned long omap1_ckctl_recalc(struct clk *clk); +static unsigned long omap1_watchdog_recalc(struct clk *clk); static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); -static void omap1_sossi_recalc(struct clk *clk); -static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); -static int omap1_clk_enable_dsp_domain(struct clk * clk); +static unsigned long omap1_sossi_recalc(struct clk *clk); +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); -static void omap1_clk_disable_dsp_domain(struct clk * clk); static int omap1_set_uart_rate(struct clk * clk, unsigned long rate); -static void omap1_uart_recalc(struct clk * clk); -static int omap1_clk_enable_uart_functional(struct clk * clk); -static void omap1_clk_disable_uart_functional(struct clk * clk); +static unsigned long omap1_uart_recalc(struct clk *clk); static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate); static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate); static void omap1_init_ext_clk(struct clk * clk); static int omap1_select_table_rate(struct clk * clk, unsigned long rate); static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate); -static int omap1_clk_enable(struct clk *clk); -static void omap1_clk_disable(struct clk *clk); + +static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); +static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); struct mpu_rate { unsigned long rate; @@ -152,101 +147,84 @@ static struct mpu_rate rate_table[] = { static struct clk ck_ref = { .name = "ck_ref", + .ops = &clkops_null, .rate = 12000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | ALWAYS_ENABLED, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk ck_dpll1 = { .name = "ck_dpll1", + .ops = &clkops_null, .parent = &ck_ref, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk ck_dpll1out = { .clk = { .name = "ck_dpll1out", + .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL | - ENABLE_REG_32BIT | RATE_PROPAGATES, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }, .idlect_shift = 12, }; static struct clk sossi_ck = { .name = "ck_sossi", + .ops = &clkops_generic, .parent = &ck_dpll1out.clk, - .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT | - ENABLE_REG_32BIT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_1, + .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), .enable_bit = 16, .recalc = &omap1_sossi_recalc, .set_rate = &omap1_set_sossi_rate, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk arm_ck = { .name = "arm_ck", + .ops = &clkops_null, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES | - ALWAYS_ENABLED, .rate_offset = CKCTL_ARMDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct arm_idlect1_clk armper_ck = { .clk = { .name = "armper_ck", + .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | RATE_CKCTL | - CLOCK_IDLE_CONTROL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = 2, }; static struct clk arm_gpio_ck = { .name = "arm_gpio_ck", + .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk armxor_ck = { .clk = { .name = "armxor_ck", + .ops = &clkops_generic, .parent = &ck_ref, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_XORPCK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }, .idlect_shift = 1, }; @@ -254,14 +232,12 @@ static struct arm_idlect1_clk armxor_ck = { static struct arm_idlect1_clk armtim_ck = { .clk = { .name = "armtim_ck", + .ops = &clkops_generic, .parent = &ck_ref, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_TIMCK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }, .idlect_shift = 9, }; @@ -269,201 +245,166 @@ static struct arm_idlect1_clk armtim_ck = { static struct arm_idlect1_clk armwdt_ck = { .clk = { .name = "armwdt_ck", + .ops = &clkops_generic, .parent = &ck_ref, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_WDTCK, .recalc = &omap1_watchdog_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }, .idlect_shift = 0, }; static struct clk arminth_ck16xx = { .name = "arminth_ck", + .ops = &clkops_null, .parent = &arm_ck, - .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, /* Note: On 16xx the frequency can be divided by 2 by programming * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 * * 1510 version is in TC clocks. */ - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk dsp_ck = { .name = "dsp_ck", + .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - RATE_CKCTL, - .enable_reg = (void __iomem *)ARM_CKCTL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), .enable_bit = EN_DSPCK, .rate_offset = CKCTL_DSPDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct clk dspmmu_ck = { .name = "dspmmu_ck", + .ops = &clkops_null, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - RATE_CKCTL | ALWAYS_ENABLED, .rate_offset = CKCTL_DSPMMUDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct clk dspper_ck = { .name = "dspper_ck", + .ops = &clkops_dspck, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - RATE_CKCTL | VIRTUAL_IO_ADDRESS, .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, .recalc = &omap1_ckctl_recalc_dsp_domain, + .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = &omap1_clk_set_rate_dsp_domain, - .enable = &omap1_clk_enable_dsp_domain, - .disable = &omap1_clk_disable_dsp_domain, }; static struct clk dspxor_ck = { .name = "dspxor_ck", + .ops = &clkops_dspck, .parent = &ck_ref, - .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - VIRTUAL_IO_ADDRESS, .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_dsp_domain, - .disable = &omap1_clk_disable_dsp_domain, }; static struct clk dsptim_ck = { .name = "dsptim_ck", + .ops = &clkops_dspck, .parent = &ck_ref, - .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - VIRTUAL_IO_ADDRESS, .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_dsp_domain, - .disable = &omap1_clk_disable_dsp_domain, }; /* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */ static struct arm_idlect1_clk tc_ck = { .clk = { .name = "tc_ck", + .ops = &clkops_null, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 | - RATE_CKCTL | RATE_PROPAGATES | - ALWAYS_ENABLED | CLOCK_IDLE_CONTROL, + .flags = CLOCK_IDLE_CONTROL, .rate_offset = CKCTL_TCDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = 6, }; static struct clk arminth_ck1510 = { .name = "arminth_ck", + .ops = &clkops_null, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | - ALWAYS_ENABLED, .recalc = &followparent_recalc, /* Note: On 1510 the frequency follows TC_CK * * 16xx version is in MPU clocks. */ - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk tipb_ck = { /* No-idle controlled by "tc_ck" */ .name = "tipb_ck", + .ops = &clkops_null, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | - ALWAYS_ENABLED, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ .name = "l3_ocpi_ck", + .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP16XX, - .enable_reg = (void __iomem *)ARM_IDLECT3, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_OCPI_CK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk tc1_ck = { .name = "tc1_ck", + .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP16XX, - .enable_reg = (void __iomem *)ARM_IDLECT3, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC1_CK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk tc2_ck = { .name = "tc2_ck", + .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP16XX, - .enable_reg = (void __iomem *)ARM_IDLECT3, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk dma_ck = { /* No-idle controlled by "tc_ck" */ .name = "dma_ck", + .ops = &clkops_null, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | ALWAYS_ENABLED, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk dma_lcdfree_ck = { .name = "dma_lcdfree_ck", + .ops = &clkops_null, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk api_ck = { .clk = { .name = "api_ck", + .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_APICK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }, .idlect_shift = 8, }; @@ -471,276 +412,238 @@ static struct arm_idlect1_clk api_ck = { static struct arm_idlect1_clk lb_ck = { .clk = { .name = "lb_ck", + .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | - CLOCK_IDLE_CONTROL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LBCK, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }, .idlect_shift = 4, }; static struct clk rhea1_ck = { .name = "rhea1_ck", + .ops = &clkops_null, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk rhea2_ck = { .name = "rhea2_ck", + .ops = &clkops_null, .parent = &tc_ck.clk, - .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk lcd_ck_16xx = { .name = "lcd_ck", + .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 | RATE_CKCTL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct arm_idlect1_clk lcd_ck_1510 = { .clk = { .name = "lcd_ck", + .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | - RATE_CKCTL | CLOCK_IDLE_CONTROL, - .enable_reg = (void __iomem *)ARM_IDLECT2, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = 3, }; static struct clk uart1_1510 = { .name = "uart1_ck", + .ops = &clkops_null, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | - ENABLE_REG_32BIT | ALWAYS_ENABLED | - CLOCK_NO_IDLE_PARENT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct uart_clk uart1_16xx = { .clk = { .name = "uart1_ck", + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | - ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = RATE_FIXED | ENABLE_REG_32BIT | + CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 29, - .enable = &omap1_clk_enable_uart_functional, - .disable = &omap1_clk_disable_uart_functional, }, .sysc_addr = 0xfffb0054, }; static struct clk uart2_ck = { .name = "uart2_ck", + .ops = &clkops_null, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | ENABLE_REG_32BIT | - ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk uart3_1510 = { .name = "uart3_ck", + .ops = &clkops_null, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | - ENABLE_REG_32BIT | ALWAYS_ENABLED | - CLOCK_NO_IDLE_PARENT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct uart_clk uart3_16xx = { .clk = { .name = "uart3_ck", + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | - ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = RATE_FIXED | ENABLE_REG_32BIT | + CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 31, - .enable = &omap1_clk_enable_uart_functional, - .disable = &omap1_clk_disable_uart_functional, }, .sysc_addr = 0xfffb9854, }; static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ .name = "usb_clko", + .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 6000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, + .flags = RATE_FIXED | ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), .enable_bit = USB_MCLK_EN_BIT, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk usb_hhc_ck1510 = { .name = "usb_hhc_ck", + .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | - RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = RATE_FIXED | ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = USB_HOST_HHC_UHOST_EN, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk usb_hhc_ck16xx = { .name = "usb_hhc_ck", + .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 48000000, /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ - .flags = CLOCK_IN_OMAP16XX | - RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */, + .flags = RATE_FIXED | ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ .enable_bit = 8 /* UHOST_EN */, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk usb_dc_ck = { .name = "usb_dc_ck", + .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 48000000, - .flags = CLOCK_IN_OMAP16XX | RATE_FIXED, - .enable_reg = (void __iomem *)SOFT_REQ_REG, + .flags = RATE_FIXED, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = 4, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk mclk_1510 = { .name = "mclk", + .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .rate = 12000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, - .enable_reg = (void __iomem *)SOFT_REQ_REG, - .enable_bit = 6, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .flags = RATE_FIXED, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 6, }; static struct clk mclk_16xx = { .name = "mclk", + .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .flags = CLOCK_IN_OMAP16XX, - .enable_reg = (void __iomem *)COM_CLK_DIV_CTRL_SEL, + .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), .enable_bit = COM_ULPD_PLL_CLK_REQ, .set_rate = &omap1_set_ext_clk_rate, .round_rate = &omap1_round_ext_clk_rate, .init = &omap1_init_ext_clk, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk bclk_1510 = { .name = "bclk", + .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .rate = 12000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, + .flags = RATE_FIXED, }; static struct clk bclk_16xx = { .name = "bclk", + .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .flags = CLOCK_IN_OMAP16XX, - .enable_reg = (void __iomem *)SWD_CLK_DIV_CTRL_SEL, + .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), .enable_bit = SWD_ULPD_PLL_CLK_REQ, .set_rate = &omap1_set_ext_clk_rate, .round_rate = &omap1_round_ext_clk_rate, .init = &omap1_init_ext_clk, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk mmc1_ck = { .name = "mmc_ck", + .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT | - CLOCK_NO_IDLE_PARENT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 23, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk mmc2_ck = { .name = "mmc_ck", .id = 1, + .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = CLOCK_IN_OMAP16XX | - RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, + .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 20, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk virtual_ck_mpu = { .name = "mpu", - .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - CLOCK_IN_OMAP310 | VIRTUAL_CLOCK | ALWAYS_ENABLED, + .ops = &clkops_null, .parent = &arm_ck, /* Is smarter alias for */ .recalc = &followparent_recalc, .set_rate = &omap1_select_table_rate, .round_rate = &omap1_round_to_table_rate, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK @@ -748,78 +651,19 @@ remains active during MPU idle whenever this is enabled */ static struct clk i2c_fck = { .name = "i2c_fck", .id = 1, - .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | - VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | - ALWAYS_ENABLED, + .ops = &clkops_null, + .flags = CLOCK_NO_IDLE_PARENT, .parent = &armxor_ck.clk, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, }; static struct clk i2c_ick = { .name = "i2c_ick", .id = 1, - .flags = CLOCK_IN_OMAP16XX | - VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | - ALWAYS_ENABLED, + .ops = &clkops_null, + .flags = CLOCK_NO_IDLE_PARENT, .parent = &armper_ck.clk, .recalc = &followparent_recalc, - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, -}; - -static struct clk * onchip_clks[] = { - /* non-ULPD clocks */ - &ck_ref, - &ck_dpll1, - /* CK_GEN1 clocks */ - &ck_dpll1out.clk, - &sossi_ck, - &arm_ck, - &armper_ck.clk, - &arm_gpio_ck, - &armxor_ck.clk, - &armtim_ck.clk, - &armwdt_ck.clk, - &arminth_ck1510, &arminth_ck16xx, - /* CK_GEN2 clocks */ - &dsp_ck, - &dspmmu_ck, - &dspper_ck, - &dspxor_ck, - &dsptim_ck, - /* CK_GEN3 clocks */ - &tc_ck.clk, - &tipb_ck, - &l3_ocpi_ck, - &tc1_ck, - &tc2_ck, - &dma_ck, - &dma_lcdfree_ck, - &api_ck.clk, - &lb_ck.clk, - &rhea1_ck, - &rhea2_ck, - &lcd_ck_16xx, - &lcd_ck_1510.clk, - /* ULPD clocks */ - &uart1_1510, - &uart1_16xx.clk, - &uart2_ck, - &uart3_1510, - &uart3_16xx.clk, - &usb_clko, - &usb_hhc_ck1510, &usb_hhc_ck16xx, - &usb_dc_ck, - &mclk_1510, &mclk_16xx, - &bclk_1510, &bclk_16xx, - &mmc1_ck, - &mmc2_ck, - /* Virtual clocks */ - &virtual_ck_mpu, - &i2c_fck, - &i2c_ick, }; #endif diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index ba5d7c08dc1..bbbaeb0abcd 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -86,7 +86,7 @@ static struct resource mbox_resources[] = { }; static struct platform_device mbox_device = { - .name = "mailbox", + .name = "omap1-mailbox", .id = -1, .num_resources = ARRAY_SIZE(mbox_resources), .resource = mbox_resources, diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index 89bb8756f45..4ef26faf083 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -38,6 +38,7 @@ static struct omap_id omap_ids[] __initdata = { { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000}, { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100}, { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300}, + { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320500, .type = 0x08500000}, { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000}, { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000}, { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000}, @@ -77,7 +78,7 @@ static u16 __init omap_get_jtag_id(void) prod_id = omap_readl(OMAP_PRODUCTION_ID_1); omap_id = omap_readl(OMAP32_ID_1); - /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */ + /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730/850 */ if (((prod_id >> 20) == 0) || (prod_id == omap_id)) prod_id = 0; else @@ -178,6 +179,7 @@ void __init omap_check_revision(void) switch (cpu_type) { case 0x07: + case 0x08: omap_revision |= 0x07; break; case 0x03: diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 4c3e582f3d3..3afe540149f 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -52,6 +52,22 @@ static struct map_desc omap730_io_desc[] __initdata = { }; #endif +#ifdef CONFIG_ARCH_OMAP850 +static struct map_desc omap850_io_desc[] __initdata = { + { + .virtual = OMAP850_DSP_BASE, + .pfn = __phys_to_pfn(OMAP850_DSP_START), + .length = OMAP850_DSP_SIZE, + .type = MT_DEVICE + }, { + .virtual = OMAP850_DSPREG_BASE, + .pfn = __phys_to_pfn(OMAP850_DSPREG_START), + .length = OMAP850_DSPREG_SIZE, + .type = MT_DEVICE + } +}; +#endif + #ifdef CONFIG_ARCH_OMAP15XX static struct map_desc omap1510_io_desc[] __initdata = { { @@ -109,6 +125,13 @@ void __init omap1_map_common_io(void) iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); } #endif + +#ifdef CONFIG_ARCH_OMAP850 + if (cpu_is_omap850()) { + iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc)); + } +#endif + #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap15xx()) { iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 9ad5197075f..de03c844899 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -145,6 +145,14 @@ static struct omap_irq_bank omap730_irq_banks[] = { }; #endif +#ifdef CONFIG_ARCH_OMAP850 +static struct omap_irq_bank omap850_irq_banks[] = { + { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, + { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, + { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, +}; +#endif + #ifdef CONFIG_ARCH_OMAP15XX static struct omap_irq_bank omap1510_irq_banks[] = { { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, @@ -184,6 +192,12 @@ void __init omap_init_irq(void) irq_bank_count = ARRAY_SIZE(omap730_irq_banks); } #endif +#ifdef CONFIG_ARCH_OMAP850 + if (cpu_is_omap850()) { + irq_banks = omap850_irq_banks; + irq_bank_count = ARRAY_SIZE(omap850_irq_banks); + } +#endif #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap1510()) { irq_banks = omap1510_irq_banks; @@ -214,9 +228,8 @@ void __init omap_init_irq(void) irq_bank_writel(0x03, 1, IRQ_CONTROL_REG_OFFSET); /* Enable interrupts in global mask */ - if (cpu_is_omap730()) { + if (cpu_is_omap7xx()) irq_bank_writel(0x0, 0, IRQ_GMR_REG_OFFSET); - } /* Install the interrupt handlers for each bank */ for (i = 0; i < irq_bank_count; i++) { @@ -236,6 +249,8 @@ void __init omap_init_irq(void) if (cpu_is_omap730()) omap_unmask_irq(INT_730_IH2_IRQ); + else if (cpu_is_omap850()) + omap_unmask_irq(INT_850_IH2_IRQ); else if (cpu_is_omap15xx()) omap_unmask_irq(INT_1510_IH2_IRQ); else if (cpu_is_omap16xx()) diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index 59abbf331a9..0af4d6c85b4 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c @@ -1,7 +1,7 @@ /* * Mailbox reservation modules for DSP * - * Copyright (C) 2006 Nokia Corporation + * Copyright (C) 2006-2009 Nokia Corporation * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> * * This file is subject to the terms and conditions of the GNU General Public @@ -27,7 +27,7 @@ #define MAILBOX_DSP2ARM1_Flag 0x1c #define MAILBOX_DSP2ARM2_Flag 0x20 -unsigned long mbox_base; +static void __iomem *mbox_base; struct omap_mbox1_fifo { unsigned long cmd; @@ -40,14 +40,14 @@ struct omap_mbox1_priv { struct omap_mbox1_fifo rx_fifo; }; -static inline int mbox_read_reg(unsigned int reg) +static inline int mbox_read_reg(size_t ofs) { - return __raw_readw(mbox_base + reg); + return __raw_readw(mbox_base + ofs); } -static inline void mbox_write_reg(unsigned int val, unsigned int reg) +static inline void mbox_write_reg(u32 val, size_t ofs) { - __raw_writew(val, mbox_base + reg); + __raw_writew(val, mbox_base + ofs); } /* msg */ @@ -143,7 +143,7 @@ struct omap_mbox mbox_dsp_info = { }; EXPORT_SYMBOL(mbox_dsp_info); -static int __init omap1_mbox_probe(struct platform_device *pdev) +static int __devinit omap1_mbox_probe(struct platform_device *pdev) { struct resource *res; int ret = 0; @@ -170,12 +170,10 @@ static int __init omap1_mbox_probe(struct platform_device *pdev) } mbox_dsp_info.irq = res->start; - ret = omap_mbox_register(&mbox_dsp_info); - - return ret; + return omap_mbox_register(&pdev->dev, &mbox_dsp_info); } -static int omap1_mbox_remove(struct platform_device *pdev) +static int __devexit omap1_mbox_remove(struct platform_device *pdev) { omap_mbox_unregister(&mbox_dsp_info); @@ -184,9 +182,9 @@ static int omap1_mbox_remove(struct platform_device *pdev) static struct platform_driver omap1_mbox_driver = { .probe = omap1_mbox_probe, - .remove = omap1_mbox_remove, + .remove = __devexit_p(omap1_mbox_remove), .driver = { - .name = "mailbox", + .name = "omap1-mailbox", }, }; @@ -203,4 +201,7 @@ static void __exit omap1_mbox_exit(void) module_init(omap1_mbox_init); module_exit(omap1_mbox_exit); -MODULE_LICENSE("GPL"); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions"); +MODULE_AUTHOR("Hiroshi DOYU" <Hiroshi.DOYU@nokia.com>); +MODULE_ALIAS("platform:omap1-mailbox"); diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 575ba31295c..d040c3f1027 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -28,9 +28,9 @@ #define DPS_RSTCT2_PER_EN (1 << 0) #define DSP_RSTCT2_WD_PER_EN (1 << 1) -#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) -const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" }; -#endif +static int dsp_use; +static struct clk *api_clk; +static struct clk *dsp_clk; static void omap1_mcbsp_request(unsigned int id) { @@ -39,20 +39,40 @@ static void omap1_mcbsp_request(unsigned int id) * are DSP public peripherals. */ if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { - omap_dsp_request_mem(); - /* - * DSP external peripheral reset - * FIXME: This should be moved to dsp code - */ - __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | - DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2); + if (dsp_use++ == 0) { + api_clk = clk_get(NULL, "api_clk"); + dsp_clk = clk_get(NULL, "dsp_clk"); + if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) { + clk_enable(api_clk); + clk_enable(dsp_clk); + + omap_dsp_request_mem(); + /* + * DSP external peripheral reset + * FIXME: This should be moved to dsp code + */ + __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | + DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2); + } + } } } static void omap1_mcbsp_free(unsigned int id) { - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) - omap_dsp_release_mem(); + if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { + if (--dsp_use == 0) { + omap_dsp_release_mem(); + if (!IS_ERR(api_clk)) { + clk_disable(api_clk); + clk_put(api_clk); + } + if (!IS_ERR(dsp_clk)) { + clk_disable(dsp_clk); + clk_put(dsp_clk); + } + } + } } static struct omap_mcbsp_ops omap1_mcbsp_ops = { @@ -94,8 +114,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP1RX, .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, - .clk_names = clk_names, - .num_clks = 3, }, { .phys_base = OMAP1510_MCBSP2_BASE, @@ -112,8 +130,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP3RX, .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, - .clk_names = clk_names, - .num_clks = 3, }, }; #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) @@ -131,8 +147,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP1RX, .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, - .clk_names = clk_names, - .num_clks = 3, }, { .phys_base = OMAP1610_MCBSP2_BASE, @@ -149,8 +163,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP3RX, .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, - .clk_names = clk_names, - .num_clks = 3, }, }; #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 062c905c2ba..721e0d9d8b1 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -58,6 +58,25 @@ MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0) #define OMAP730_PINS_SZ 0 #endif /* CONFIG_ARCH_OMAP730 */ +#ifdef CONFIG_ARCH_OMAP850 +struct pin_config __initdata_or_module omap850_pins[] = { +MUX_CFG_850("E2_850_KBR0", 12, 21, 0, 20, 1, 0) +MUX_CFG_850("J7_850_KBR1", 12, 25, 0, 24, 1, 0) +MUX_CFG_850("E1_850_KBR2", 12, 29, 0, 28, 1, 0) +MUX_CFG_850("F3_850_KBR3", 13, 1, 0, 0, 1, 0) +MUX_CFG_850("D2_850_KBR4", 13, 5, 0, 4, 1, 0) +MUX_CFG_850("C2_850_KBC0", 13, 9, 0, 8, 1, 0) +MUX_CFG_850("D3_850_KBC1", 13, 13, 0, 12, 1, 0) +MUX_CFG_850("E4_850_KBC2", 13, 17, 0, 16, 1, 0) +MUX_CFG_850("F4_850_KBC3", 13, 21, 0, 20, 1, 0) +MUX_CFG_850("E3_850_KBC4", 13, 25, 0, 24, 1, 0) + +MUX_CFG_850("AA17_850_USB_DM", 2, 21, 0, 20, 0, 0) +MUX_CFG_850("W16_850_USB_PU_EN", 2, 25, 0, 24, 0, 0) +MUX_CFG_850("W17_850_USB_VBUSI", 2, 29, 0, 28, 0, 0) +}; +#endif + #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) static struct pin_config __initdata_or_module omap1xxx_pins[] = { /* @@ -419,6 +438,11 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", cfg->pull_name, cfg->pull_reg, pull_orig, pull); } + +#ifdef CONFIG_ARCH_OMAP850 + omap_mux_register(omap850_pins, ARRAY_SIZE(omap850_pins)); +#endif + #endif #ifdef CONFIG_OMAP_MUX_ERRORS diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 0002084e065..842090b148f 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -121,6 +121,13 @@ void __init omap_serial_init(void) serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; } + if (cpu_is_omap850()) { + serial_platform_data[0].regshift = 0; + serial_platform_data[1].regshift = 0; + serial_platform_data[0].irq = INT_850_UART_MODEM_1; + serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2; + } + if (cpu_is_omap15xx()) { serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; |