diff options
Diffstat (limited to 'arch/arm/mach-omap2/prm44xx.c')
-rw-r--r-- | arch/arm/mach-omap2/prm44xx.c | 81 |
1 files changed, 80 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index a1ff918d9be..a2a04bfa962 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -15,12 +15,13 @@ #include <linux/delay.h> #include <linux/errno.h> #include <linux/err.h> +#include <linux/io.h> #include <plat/common.h> #include <plat/cpu.h> #include <plat/prcm.h> -#include "prm.h" +#include "prm44xx.h" #include "prm-regbits-44xx.h" /* @@ -29,6 +30,70 @@ */ #define OMAP4_RST_CTRL_ST_OFFSET 4 +/* PRM low-level functions */ + +/* Read a register in a CM/PRM instance in the PRM module */ +u32 omap4_prm_read_inst_reg(s16 inst, u16 reg) +{ + return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg)); +} + +/* Write into a register in a CM/PRM instance in the PRM module */ +void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg) +{ + __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg)); +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) +{ + u32 v; + + v = omap4_prm_read_inst_reg(inst, reg); + v &= ~mask; + v |= bits; + omap4_prm_write_inst_reg(v, inst, reg); + + return v; +} + +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +/* XXX deprecated */ +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) +{ + u32 v; + + v = __raw_readl(reg); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +/* XXX deprecated */ +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) +{ + u32 v; + + v = __raw_readl(reg); + v &= ~mask; + v |= bits; + __raw_writel(v, reg); + + return v; +} + +u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg) +{ + return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg); +} + +u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) +{ + return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); +} + /** * omap4_prm_is_hardreset_asserted - read the HW reset line state of * submodules contained in the hwmod module @@ -114,3 +179,17 @@ int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift) return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } +void omap4_prm_global_warm_sw_reset(void) +{ + u32 v; + + v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, + OMAP4_RM_RSTCTRL); + v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; + omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST, + OMAP4_RM_RSTCTRL); + + /* OCP barrier */ + v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, + OMAP4_RM_RSTCTRL); +} |