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-rw-r--r--arch/arm/mach-omap2/Kconfig11
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c218
-rw-r--r--arch/arm/mach-omap2/board-apollon.c99
-rw-r--r--arch/arm/mach-omap2/board-h4.c46
-rw-r--r--arch/arm/mach-omap2/devices.c6
-rw-r--r--arch/arm/mach-omap2/gpmc.c47
-rw-r--r--arch/arm/mach-omap2/id.c6
-rw-r--r--arch/arm/mach-omap2/io.c22
-rw-r--r--arch/arm/mach-omap2/irq.c19
-rw-r--r--arch/arm/mach-omap2/memory.c18
-rw-r--r--arch/arm/mach-omap2/mux.c38
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c349
13 files changed, 787 insertions, 93 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 7393109f5c3..7069c9d536f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -11,6 +11,10 @@ config ARCH_OMAP2420
select OMAP_DM_TIMER
select ARCH_OMAP_OTG
+config ARCH_OMAP2430
+ bool "OMAP2430 support"
+ depends on ARCH_OMAP24XX
+
comment "OMAP Board Type"
depends on ARCH_OMAP2
@@ -21,8 +25,13 @@ config MACH_OMAP_GENERIC
config MACH_OMAP_H4
bool "OMAP 2420 H4 board"
depends on ARCH_OMAP2 && ARCH_OMAP24XX
- select OMAP_DEBUG_LEDS if LEDS || LEDS_OMAP_DEBUG
+ select OMAP_DEBUG_DEVICES
config MACH_OMAP_APOLLON
bool "OMAP 2420 Apollon board"
depends on ARCH_OMAP2 && ARCH_OMAP24XX
+
+config MACH_OMAP_2430SDP
+ bool "OMAP 2430 SDP board"
+ depends on ARCH_OMAP2 && ARCH_OMAP24XX
+
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 266d88e77bd..b05b738d31e 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -14,5 +14,6 @@ obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o
# Specific board support
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
+obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o
obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
new file mode 100644
index 00000000000..7e76fbf19b5
--- /dev/null
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -0,0 +1,218 @@
+/*
+ * linux/arch/arm/mach-omap2/board-2430sdp.c
+ *
+ * Copyright (C) 2006 Texas Instruments
+ *
+ * Modified from mach-omap2/board-generic.c
+ *
+ * Initial Code : Based on a patch from Komal Shah and Richard Woodruff
+ * Updated the Code for 2430 SDP : Syed Mohammed Khasim
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/board.h>
+#include <asm/arch/common.h>
+#include <asm/arch/gpmc.h>
+#include "prcm-regs.h"
+
+#include <asm/io.h>
+
+
+#define SDP2430_FLASH_CS 0
+#define SDP2430_SMC91X_CS 5
+
+static struct mtd_partition sdp2430_partitions[] = {
+ /* bootloader (U-Boot, etc) in first sector */
+ {
+ .name = "bootloader",
+ .offset = 0,
+ .size = SZ_256K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ /* bootloader params in the next sector */
+ {
+ .name = "params",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_128K,
+ .mask_flags = 0,
+ },
+ /* kernel */
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_2M,
+ .mask_flags = 0
+ },
+ /* file system */
+ {
+ .name = "filesystem",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ .mask_flags = 0
+ }
+};
+
+static struct flash_platform_data sdp2430_flash_data = {
+ .map_name = "cfi_probe",
+ .width = 2,
+ .parts = sdp2430_partitions,
+ .nr_parts = ARRAY_SIZE(sdp2430_partitions),
+};
+
+static struct resource sdp2430_flash_resource = {
+ .start = SDP2430_CS0_BASE,
+ .end = SDP2430_CS0_BASE + SZ_64M - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device sdp2430_flash_device = {
+ .name = "omapflash",
+ .id = 0,
+ .dev = {
+ .platform_data = &sdp2430_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &sdp2430_flash_resource,
+};
+
+static struct resource sdp2430_smc91x_resources[] = {
+ [0] = {
+ .start = SDP2430_CS0_BASE,
+ .end = SDP2430_CS0_BASE + SZ_64M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
+ .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device sdp2430_smc91x_device = {
+ .name = "smc91x",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(sdp2430_smc91x_resources),
+ .resource = sdp2430_smc91x_resources,
+};
+
+static struct platform_device *sdp2430_devices[] __initdata = {
+ &sdp2430_smc91x_device,
+ &sdp2430_flash_device,
+};
+
+static inline void __init sdp2430_init_smc91x(void)
+{
+ int eth_cs;
+ unsigned long cs_mem_base;
+ unsigned int rate;
+ struct clk *l3ck;
+
+ eth_cs = SDP2430_SMC91X_CS;
+
+ l3ck = clk_get(NULL, "core_l3_ck");
+ if (IS_ERR(l3ck))
+ rate = 100000000;
+ else
+ rate = clk_get_rate(l3ck);
+
+ /* Make sure CS1 timings are correct, for 2430 always muxed */
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
+
+ if (rate >= 160000000) {
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
+ } else if (rate >= 130000000) {
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
+ } else { /* rate = 100000000 */
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
+ gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
+ }
+
+ if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
+ printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
+ return;
+ }
+
+ sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300;
+ sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
+ udelay(100);
+
+ if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) {
+ printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
+ OMAP24XX_ETHR_GPIO_IRQ);
+ gpmc_cs_free(eth_cs);
+ return;
+ }
+ omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1);
+
+}
+
+static void __init omap_2430sdp_init_irq(void)
+{
+ omap2_init_common_hw();
+ omap_init_irq();
+ omap_gpio_init();
+ sdp2430_init_smc91x();
+}
+
+static struct omap_uart_config sdp2430_uart_config __initdata = {
+ .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
+static struct omap_board_config_kernel sdp2430_config[] = {
+ {OMAP_TAG_UART, &sdp2430_uart_config},
+};
+
+static void __init omap_2430sdp_init(void)
+{
+ platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
+ omap_board_config = sdp2430_config;
+ omap_board_config_size = ARRAY_SIZE(sdp2430_config);
+ omap_serial_init();
+}
+
+static void __init omap_2430sdp_map_io(void)
+{
+ omap2_map_common_io();
+}
+
+MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
+ /* Maintainer: Syed Khasim - Texas Instruments Inc */
+ .phys_io = 0x48000000,
+ .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
+ .boot_params = 0x80000100,
+ .map_io = omap_2430sdp_map_io,
+ .init_irq = omap_2430sdp_init_irq,
+ .init_machine = omap_2430sdp_init,
+ .timer = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 878ff9181d0..3bb49c17c85 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -25,6 +25,8 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
+#include <linux/leds.h>
+#include <linux/irq.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
@@ -32,10 +34,12 @@
#include <asm/mach/flash.h>
#include <asm/arch/gpio.h>
+#include <asm/arch/led.h>
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include <asm/arch/board.h>
#include <asm/arch/common.h>
+#include <asm/arch/gpmc.h>
#include "prcm-regs.h"
/* LED & Switch macros */
@@ -46,6 +50,9 @@
#define SW_UP_GPIO17 17
#define SW_DOWN_GPIO58 58
+#define APOLLON_FLASH_CS 0
+#define APOLLON_ETH_CS 1
+
static struct mtd_partition apollon_partitions[] = {
{
.name = "X-Loader + U-Boot",
@@ -85,10 +92,10 @@ static struct flash_platform_data apollon_flash_data = {
.nr_parts = ARRAY_SIZE(apollon_partitions),
};
-static struct resource apollon_flash_resource = {
- .start = APOLLON_CS0_BASE,
- .end = APOLLON_CS0_BASE + SZ_128K,
- .flags = IORESOURCE_MEM,
+static struct resource apollon_flash_resource[] = {
+ [0] = {
+ .flags = IORESOURCE_MEM,
+ },
};
static struct platform_device apollon_onenand_device = {
@@ -97,14 +104,24 @@ static struct platform_device apollon_onenand_device = {
.dev = {
.platform_data = &apollon_flash_data,
},
- .num_resources = ARRAY_SIZE(&apollon_flash_resource),
- .resource = &apollon_flash_resource,
+ .num_resources = ARRAY_SIZE(apollon_flash_resource),
+ .resource = apollon_flash_resource,
};
+static void __init apollon_flash_init(void)
+{
+ unsigned long base;
+
+ if (gpmc_cs_request(APOLLON_FLASH_CS, SZ_128K, &base) < 0) {
+ printk(KERN_ERR "Cannot request OneNAND GPMC CS\n");
+ return;
+ }
+ apollon_flash_resource[0].start = base;
+ apollon_flash_resource[0].end = base + SZ_128K - 1;
+}
+
static struct resource apollon_smc91x_resources[] = {
[0] = {
- .start = APOLLON_ETHR_START, /* Physical */
- .end = APOLLON_ETHR_START + 0xf,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -126,14 +143,51 @@ static struct platform_device apollon_lcd_device = {
.id = -1,
};
+static struct omap_led_config apollon_led_config[] = {
+ {
+ .cdev = {
+ .name = "apollon:led0",
+ },
+ .gpio = LED0_GPIO13,
+ },
+ {
+ .cdev = {
+ .name = "apollon:led1",
+ },
+ .gpio = LED1_GPIO14,
+ },
+ {
+ .cdev = {
+ .name = "apollon:led2",
+ },
+ .gpio = LED2_GPIO15,
+ },
+};
+
+static struct omap_led_platform_data apollon_led_data = {
+ .nr_leds = ARRAY_SIZE(apollon_led_config),
+ .leds = apollon_led_config,
+};
+
+static struct platform_device apollon_led_device = {
+ .name = "omap-led",
+ .id = -1,
+ .dev = {
+ .platform_data = &apollon_led_data,
+ },
+};
+
static struct platform_device *apollon_devices[] __initdata = {
&apollon_onenand_device,
&apollon_smc91x_device,
&apollon_lcd_device,
+ &apollon_led_device,
};
static inline void __init apollon_init_smc91x(void)
{
+ unsigned long base;
+
/* Make sure CS1 timings are correct */
GPMC_CONFIG1_1 = 0x00011203;
GPMC_CONFIG2_1 = 0x001f1f01;
@@ -141,13 +195,20 @@ static inline void __init apollon_init_smc91x(void)
GPMC_CONFIG4_1 = 0x1c091c09;
GPMC_CONFIG5_1 = 0x041f1f1f;
GPMC_CONFIG6_1 = 0x000004c4;
- GPMC_CONFIG7_1 = 0x00000f40 | (APOLLON_CS1_BASE >> 24);
+
+ if (gpmc_cs_request(APOLLON_ETH_CS, SZ_16M, &base) < 0) {
+ printk(KERN_ERR "Failed to request GPMC CS for smc91x\n");
+ return;
+ }
+ apollon_smc91x_resources[0].start = base + 0x300;
+ apollon_smc91x_resources[0].end = base + 0x30f;
udelay(100);
omap_cfg_reg(W4__24XX_GPIO74);
if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) {
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
APOLLON_ETHR_GPIO_IRQ);
+ gpmc_cs_free(APOLLON_ETH_CS);
return;
}
omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1);
@@ -175,6 +236,13 @@ static struct omap_mmc_config apollon_mmc_config __initdata = {
},
};
+static struct omap_usb_config apollon_usb_config __initdata = {
+ .register_dev = 1,
+ .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */
+
+ .pins[0] = 6,
+};
+
static struct omap_lcd_config apollon_lcd_config __initdata = {
.ctrl_name = "internal",
};
@@ -182,6 +250,7 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {
static struct omap_board_config_kernel apollon_config[] = {
{ OMAP_TAG_UART, &apollon_uart_config },
{ OMAP_TAG_MMC, &apollon_mmc_config },
+ { OMAP_TAG_USB, &apollon_usb_config },
{ OMAP_TAG_LCD, &apollon_lcd_config },
};
@@ -250,10 +319,22 @@ static void __init apollon_sw_init(void)
return;
}
+static void __init apollon_usb_init(void)
+{
+ /* USB device */
+ /* DEVICE_SUSPEND */
+ omap_cfg_reg(P21_242X_GPIO12);
+ omap_request_gpio(12);
+ omap_set_gpio_direction(12, 0); /* OUT */
+ omap_set_gpio_dataout(12, 0);
+}
+
static void __init omap_apollon_init(void)
{
apollon_led_init();
apollon_sw_init();
+ apollon_flash_init();
+ apollon_usb_init();
/* REVISIT: where's the correct place */
omap_cfg_reg(W19_24XX_SYS_NIRQ);
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 452193f0153..f125f432cc3 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -131,26 +131,6 @@ static struct platform_device h4_flash_device = {
.resource = &h4_flash_resource,
};
-static struct resource h4_smc91x_resources[] = {
- [0] = {
- .start = OMAP24XX_ETHR_START, /* Physical */
- .end = OMAP24XX_ETHR_START + 0xf,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
- .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device h4_smc91x_device = {
- .name = "smc91x",
- .id = -1,
- .num_resources = ARRAY_SIZE(h4_smc91x_resources),
- .resource = h4_smc91x_resources,
-};
-
/* Select between the IrDA and aGPS module
*/
static int h4_select_irda(struct device *dev, int state)
@@ -266,29 +246,14 @@ static struct platform_device h4_lcd_device = {
.id = -1,
};
-static struct resource h4_led_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device h4_led_device = {
- .name = "omap_dbg_led",
- .id = -1,
- .num_resources = ARRAY_SIZE(h4_led_resources),
- .resource = h4_led_resources,
-};
-
static struct platform_device *h4_devices[] __initdata = {
- &h4_smc91x_device,
&h4_flash_device,
&h4_irda_device,
&h4_kp_device,
&h4_lcd_device,
- &h4_led_device,
};
-static inline void __init h4_init_smc91x(void)
+static inline void __init h4_init_debug(void)
{
/* Make sure CS1 timings are correct */
GPMC_CONFIG1_1 = 0x00011200;
@@ -301,12 +266,8 @@ static inline void __init h4_init_smc91x(void)
udelay(100);
omap_cfg_reg(M15_24XX_GPIO92);
- if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) {
- printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
- OMAP24XX_ETHR_GPIO_IRQ);
- return;
- }
- omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1);
+ if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0)
+ gpmc_cs_free(eth_cs);
}
static void __init omap_h4_init_irq(void)
@@ -314,7 +275,6 @@ static void __init omap_h4_init_irq(void)
omap2_init_common_hw();
omap_init_irq();
omap_gpio_init();
- h4_init_smc91x();
}
static struct omap_uart_config h4_uart_config __initdata = {
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 52ec2f2d636..b603bc5f8e5 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -55,8 +55,10 @@ static void omap_init_i2c(void)
if (machine_is_omap_h4())
return;
- omap_cfg_reg(J15_24XX_I2C2_SCL);
- omap_cfg_reg(H19_24XX_I2C2_SDA);
+ if (!cpu_is_omap2430()) {
+ omap_cfg_reg(J15_24XX_I2C2_SCL);
+ omap_cfg_reg(H19_24XX_I2C2_SDA);
+ }
(void) platform_device_register(&omap_i2c_device2);
}
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index e290b989aa9..5a4cc2076a7 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -22,7 +22,14 @@
#undef DEBUG
+#ifdef CONFIG_ARCH_OMAP2420
#define GPMC_BASE 0x6800a000
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2430
+#define GPMC_BASE 0x6E000000
+#endif
+
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
#define GPMC_SYSSTATUS 0x14
@@ -88,7 +95,7 @@ u32 gpmc_cs_read_reg(int cs, int idx)
}
/* TODO: Add support for gpmc_fck to clock framework and use it */
-static unsigned long gpmc_get_fclk_period(void)
+unsigned long gpmc_get_fclk_period(void)
{
/* In picoseconds */
return 1000000000 / ((clk_get_rate(gpmc_l3_clk)) / 1000);
@@ -104,6 +111,13 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
return (time_ns * 1000 + tick_ps - 1) / tick_ps;
}
+unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns)
+{
+ unsigned long ticks = gpmc_ns_to_ticks(time_ns);
+
+ return ticks * gpmc_get_fclk_period() / 1000;
+}
+
#ifdef DEBUG
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time, const char *name)
@@ -120,15 +134,21 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
else
ticks = gpmc_ns_to_ticks(time);
nr_bits = end_bit - st_bit + 1;
- if (ticks >= 1 << nr_bits)
+ if (ticks >= 1 << nr_bits) {
+#ifdef DEBUG
+ printk(KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n",
+ cs, name, time, ticks, 1 << nr_bits);
+#endif
return -1;
+ }
mask = (1 << nr_bits) - 1;
l = gpmc_cs_read_reg(cs, reg);
#ifdef DEBUG
- printk(KERN_INFO "GPMC CS%d: %-10s: %d ticks, %3lu ns (was %i ticks)\n",
+ printk(KERN_INFO
+ "GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n",
cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000,
- (l >> st_bit) & mask);
+ (l >> st_bit) & mask, time);
#endif
l &= ~(mask << st_bit);
l |= ticks << st_bit;
@@ -157,7 +177,7 @@ int gpmc_cs_calc_divider(int cs, unsigned int sync_clk)
div = l / gpmc_get_fclk_period();
if (div > 4)
return -1;
- if (div < 0)
+ if (div <= 0)
div = 1;
return div;
@@ -191,14 +211,19 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access);
+ /* caller is expected to have initialized CONFIG1 to cover
+ * at least sync vs async
+ */
+ l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+ if (l & (GPMC_CONFIG1_READTYPE_SYNC | GPMC_CONFIG1_WRITETYPE_SYNC)) {
#ifdef DEBUG
- printk(KERN_INFO "GPMC CS%d CLK period is %lu (div %d)\n",
- cs, gpmc_get_fclk_period(), div);
+ printk(KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n",
+ cs, (div * gpmc_get_fclk_period()) / 1000, div);
#endif
-
- l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
- l &= ~0x03;
- l |= (div - 1);
+ l &= ~0x03;
+ l |= (div - 1);
+ gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l);
+ }
return 0;
}
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 871ace4fccb..4dfd878d796 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -17,7 +17,13 @@
#include <asm/io.h>
+#if defined(CONFIG_ARCH_OMAP2420)
#define OMAP24XX_TAP_BASE io_p2v(0x48014000)
+#endif
+
+#if defined(CONFIG_ARCH_OMAP2430)
+#define OMAP24XX_TAP_BASE io_p2v(0x4900A000)
+#endif
#define OMAP_TAP_IDCODE 0x0204
#define OMAP_TAP_PROD_ID 0x0208
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 82dc70f6b77..5a4091f582e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -5,6 +5,7 @@
*
* Copyright (C) 2005 Nokia Corporation
* Author: Juha Yrjölä <juha.yrjola@nokia.com>
+ * Updated map desc to add 2430 support : <x0khasim@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -26,6 +27,7 @@
extern void omap_sram_init(void);
extern int omap2_clk_init(void);
extern void omap2_check_revision(void);
+extern void omap2_init_memory(void);
extern void gpmc_init(void);
extern void omapfb_reserve_sdram(void);
@@ -40,6 +42,20 @@ static struct map_desc omap2_io_desc[] __initdata = {
.length = L3_24XX_SIZE,
.type = MT_DEVICE
},
+#ifdef CONFIG_ARCH_OMAP2430
+ {
+ .virtual = L4_WK_243X_VIRT,
+ .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
+ .length = L4_WK_243X_SIZE,
+ .type = MT_DEVICE
+ },
+ {
+ .virtual = OMAP243X_GPMC_VIRT,
+ .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
+ .length = OMAP243X_GPMC_SIZE,
+ .type = MT_DEVICE
+ },
+#endif
{
.virtual = DSP_MEM_24XX_VIRT,
.pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
@@ -80,5 +96,11 @@ void __init omap2_init_common_hw(void)
{
omap2_mux_init();
omap2_clk_init();
+/*
+ * Need to Fix this for 2430
+ */
+#ifndef CONFIG_ARCH_OMAP2430
+ omap2_init_memory();
+#endif
gpmc_init();
}
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index a39d3068030..f064f725e72 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -37,7 +37,7 @@ static struct omap_irq_bank {
} __attribute__ ((aligned(4))) irq_banks[] = {
{
/* MPU INTC */
- .base_reg = OMAP24XX_IC_BASE,
+ .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE),
.nr_irqs = 96,
}, {
/* XXX: DSP INTC */
@@ -47,7 +47,7 @@ static struct omap_irq_bank {
/* XXX: FIQ and additional INTC support (only MPU at the moment) */
static void omap_ack_irq(unsigned int irq)
{
- omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
+ __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
}
static void omap_mask_irq(unsigned int irq)
@@ -60,7 +60,7 @@ static void omap_mask_irq(unsigned int irq)
irq %= 32;
}
- omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
+ __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
}
static void omap_unmask_irq(unsigned int irq)
@@ -73,7 +73,7 @@ static void omap_unmask_irq(unsigned int irq)
irq %= 32;
}
- omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
+ __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
}
static void omap_mask_ack_irq(unsigned int irq)
@@ -93,17 +93,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
{
unsigned long tmp;
- tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff;
+ tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff;
printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx "
"(revision %ld.%ld) with %d interrupts\n",
bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
- tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG);
+ tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG);
tmp |= 1 << 1; /* soft reset */
- omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
+ __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
- while (!(omap_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1))
+ while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1))
/* Wait for reset to complete */;
+
+ /* Enable autoidle */
+ __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG);
}
void __init omap_init_irq(void)
diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c
index 85cbc2a2e66..3e5d8cd4ea4 100644
--- a/arch/arm/mach-omap2/memory.c
+++ b/arch/arm/mach-omap2/memory.c
@@ -30,6 +30,7 @@
#include "prcm-regs.h"
#include "memory.h"
+
static struct memory_timings mem_timings;
u32 omap2_memory_get_slow_dll_ctrl(void)
@@ -99,3 +100,20 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode)
/* 90 degree phase for anything below 133Mhz + disable DLL filter */
mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8));
}
+
+/* turn on smart idle modes for SDRAM scheduler and controller */
+void __init omap2_init_memory(void)
+{
+ u32 l;
+
+ l = SMS_SYSCONFIG;
+ l &= ~(0x3 << 3);
+ l |= (0x2 << 3);
+ SMS_SYSCONFIG = l;
+
+ l = SDRC_SYSCONFIG;
+ l &= ~(0x3 << 3);
+ l |= (0x2 << 3);
+ SDRC_SYSCONFIG = l;
+
+}
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 0439906d5da..05750975d74 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -53,8 +53,8 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
/* 24xx GPMC chipselects, wait pin monitoring */
-MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1)
-MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1)
+MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1)
+MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1)
MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
@@ -67,18 +67,18 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
/* 24xx GPIO */
-MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
-MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1)
-MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
-MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
-MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
-MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
-MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
-MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
+MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
+MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1)
+MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
+MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
+MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
+MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
+MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
+MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
-MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
+MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
-MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
+MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1)
@@ -95,17 +95,17 @@ MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
/* 24xx external DMA requests */
-MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
-MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
-MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
-MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
-MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
-MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
+MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
+MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
+MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
+MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
+MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
+MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
/* TSC IRQ */
MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
-/* UART3 */
+/* UART3 */
MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
new file mode 100644
index 00000000000..80bb42eb508
--- /dev/null
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -0,0 +1,349 @@
+/*
+ * linux/arch/arm/mach-omap2/usb-tusb6010.c
+ *
+ * Copyright (C) 2006 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <linux/usb/musb.h>
+
+#include <asm/arch/gpmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+
+
+static u8 async_cs, sync_cs;
+static unsigned refclk_psec;
+
+
+/* t2_ps, when quantized to fclk units, must happen no earlier than
+ * the clock after after t1_NS.
+ *
+ * Return a possibly updated value of t2_ps, converted to nsec.
+ */
+static unsigned
+next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps)
+{
+ unsigned t1_ps = t1_NS * 1000;
+ unsigned t1_f, t2_f;
+
+ if ((t1_ps + fclk_ps) < t2_ps)
+ return t2_ps / 1000;
+
+ t1_f = (t1_ps + fclk_ps - 1) / fclk_ps;
+ t2_f = (t2_ps + fclk_ps - 1) / fclk_ps;
+
+ if (t1_f >= t2_f)
+ t2_f = t1_f + 1;
+
+ return (t2_f * fclk_ps) / 1000;
+}
+
+/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */
+
+static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)
+{
+ struct gpmc_timings t;
+ unsigned t_acsnh_advnh = sysclk_ps + 3000;
+ unsigned tmp;
+
+ memset(&t, 0, sizeof(t));
+
+ /* CS_ON = t_acsnh_acsnl */
+ t.cs_on = 8;
+ /* ADV_ON = t_acsnh_advnh - t_advn */
+ t.adv_on = next_clk(t.cs_on, t_acsnh_advnh - 7000, fclk_ps);
+
+ /*
+ * READ ... from omap2420 TRM fig 12-13
+ */
+
+ /* ADV_RD_OFF = t_acsnh_advnh */
+ t.adv_rd_off = next_clk(t.adv_on, t_acsnh_advnh, fclk_ps);
+
+ /* OE_ON = t_acsnh_advnh + t_advn_oen (then wait for nRDY) */
+ t.oe_on = next_clk(t.adv_on, t_acsnh_advnh + 1000, fclk_ps);
+
+ /* ACCESS = counters continue only after nRDY */
+ tmp = t.oe_on * 1000 + 300;
+ t.access = next_clk(t.oe_on, tmp, fclk_ps);
+
+ /* OE_OFF = after data gets sampled */
+ tmp = t.access * 1000;
+ t.oe_off = next_clk(t.access, tmp, fclk_ps);
+
+ t.cs_rd_off = t.oe_off;
+
+ tmp = t.cs_rd_off * 1000 + 7000 /* t_acsn_rdy_z */;
+ t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);
+
+ /*
+ * WRITE ... from omap2420 TRM fig 12-15
+ */
+
+ /* ADV_WR_OFF = t_acsnh_advnh */
+ t.adv_wr_off = t.adv_rd_off;
+
+ /* WE_ON = t_acsnh_advnh + t_advn_wen (then wait for nRDY) */
+ t.we_on = next_clk(t.adv_wr_off, t_acsnh_advnh + 1000, fclk_ps);
+
+ /* WE_OFF = after data gets sampled */
+ tmp = t.we_on * 1000 + 300;
+ t.we_off = next_clk(t.we_on, tmp, fclk_ps);
+
+ t.cs_wr_off = t.we_off;
+
+ tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */;
+ t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
+
+ return gpmc_cs_set_timings(async_cs, &t);
+}
+
+static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps)
+{
+ struct gpmc_timings t;
+ unsigned t_scsnh_advnh = sysclk_ps + 3000;
+ unsigned tmp;
+
+ memset(&t, 0, sizeof(t));
+ t.cs_on = 8;
+
+ /* ADV_ON = t_acsnh_advnh - t_advn */
+ t.adv_on = next_clk(t.cs_on, t_scsnh_advnh - 7000, fclk_ps);
+
+ /* GPMC_CLK rate = fclk rate / div */
+ t.sync_clk = 12 /* 11.1 nsec */;
+ tmp = (t.sync_clk * 1000 + fclk_ps - 1) / fclk_ps;
+ if (tmp > 4)
+ return -ERANGE;
+ if (tmp <= 0)
+ tmp = 1;
+ t.page_burst_access = (fclk_ps * tmp) / 1000;
+
+ /*
+ * READ ... based on omap2420 TRM fig 12-19, 12-20
+ */
+
+ /* ADV_RD_OFF = t_scsnh_advnh */
+ t.adv_rd_off = next_clk(t.adv_on, t_scsnh_advnh, fclk_ps);
+
+ /* OE_ON = t_scsnh_advnh + t_advn_oen * fclk_ps (then wait for nRDY) */
+ tmp = (t.adv_rd_off * 1000) + (3 * fclk_ps);
+ t.oe_on = next_clk(t.adv_on, tmp, fclk_ps);
+
+ /* ACCESS = number of clock cycles after t_adv_eon */
+ tmp = (t.oe_on * 1000) + (5 * fclk_ps);
+ t.access = next_clk(t.oe_on, tmp, fclk_ps);
+
+ /* OE_OFF = after data gets sampled */
+ tmp = (t.access * 1000) + (1 * fclk_ps);
+ t.oe_off = next_clk(t.access, tmp, fclk_ps);
+
+ t.cs_rd_off = t.oe_off;
+
+ tmp = t.cs_rd_off * 1000 + 7000 /* t_scsn_rdy_z */;
+ t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);
+
+ /*
+ * WRITE ... based on omap2420 TRM fig 12-21
+ */
+
+ /* ADV_WR_OFF = t_scsnh_advnh */
+ t.adv_wr_off = t.adv_rd_off;
+
+ /* WE_ON = t_scsnh_advnh + t_advn_wen * fclk_ps (then wait for nRDY) */
+ tmp = (t.adv_wr_off * 1000) + (3 * fclk_ps);
+ t.we_on = next_clk(t.adv_wr_off, tmp, fclk_ps);
+
+ /* WE_OFF = number of clock cycles after t_adv_wen */
+ tmp = (t.we_on * 1000) + (6 * fclk_ps);
+ t.we_off = next_clk(t.we_on, tmp, fclk_ps);
+
+ t.cs_wr_off = t.we_off;
+
+ tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */;
+ t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
+
+ return gpmc_cs_set_timings(sync_cs, &t);
+}
+
+extern unsigned long gpmc_get_fclk_period(void);
+
+/* tusb driver calls this when it changes the chip's clocking */
+int tusb6010_platform_retime(unsigned is_refclk)
+{
+ static const char error[] =
+ KERN_ERR "tusb6010 %s retime error %d\n";
+
+ unsigned fclk_ps = gpmc_get_fclk_period();
+ unsigned sysclk_ps;
+ int status;
+
+ if (!refclk_psec)
+ return -ENODEV;
+
+ sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
+
+ status = tusb_set_async_mode(sysclk_ps, fclk_ps);
+ if (status < 0) {
+ printk(error, "async", status);
+ goto done;
+ }
+ status = tusb_set_sync_mode(sysclk_ps, fclk_ps);
+ if (status < 0)
+ printk(error, "sync", status);
+done:
+ return status;
+}
+EXPORT_SYMBOL_GPL(tusb6010_platform_retime);
+
+static struct resource tusb_resources[] = {
+ /* Order is significant! The start/end fields
+ * are updated during setup..
+ */
+ { /* Asynchronous access */
+ .flags = IORESOURCE_MEM,
+ },
+ { /* Synchronous access */
+ .flags = IORESOURCE_MEM,
+ },
+ { /* IRQ */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 tusb_dmamask = ~(u32)0;
+
+static struct platform_device tusb_device = {
+ .name = "musb_hdrc",
+ .id = -1,
+ .dev = {
+ .dma_mask = &tusb_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(tusb_resources),
+ .resource = tusb_resources,
+};
+
+
+/* this may be called only from board-*.c setup code */
+int __init
+tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
+ unsigned ps_refclk, unsigned waitpin,
+ unsigned async, unsigned sync,
+ unsigned irq, unsigned dmachan)
+{
+ int status;
+ static char error[] __initdata =
+ KERN_ERR "tusb6010 init error %d, %d\n";
+
+ /* ASYNC region, primarily for PIO */
+ status = gpmc_cs_request(async, SZ_16M, (unsigned long *)
+ &tusb_resources[0].start);
+ if (status < 0) {
+ printk(error, 1, status);
+ return status;
+ }
+ tusb_resources[0].end = tusb_resources[0].start + 0x9ff;
+ async_cs = async;
+ gpmc_cs_write_reg(async, GPMC_CS_CONFIG1,
+ GPMC_CONFIG1_PAGE_LEN(2)
+ | GPMC_CONFIG1_WAIT_READ_MON
+ | GPMC_CONFIG1_WAIT_WRITE_MON
+ | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
+ | GPMC_CONFIG1_READTYPE_ASYNC
+ | GPMC_CONFIG1_WRITETYPE_ASYNC
+ | GPMC_CONFIG1_DEVICESIZE_16
+ | GPMC_CONFIG1_DEVICETYPE_NOR
+ | GPMC_CONFIG1_MUXADDDATA);
+
+
+ /* SYNC region, primarily for DMA */
+ status = gpmc_cs_request(sync, SZ_16M, (unsigned long *)
+ &tusb_resources[1].start);
+ if (status < 0) {
+ printk(error, 2, status);
+ return status;
+ }
+ tusb_resources[1].end = tusb_resources[1].start + 0x9ff;
+ sync_cs = sync;
+ gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1,
+ GPMC_CONFIG1_READMULTIPLE_SUPP
+ | GPMC_CONFIG1_READTYPE_SYNC
+ | GPMC_CONFIG1_WRITEMULTIPLE_SUPP
+ | GPMC_CONFIG1_WRITETYPE_SYNC
+ | GPMC_CONFIG1_CLKACTIVATIONTIME(1)
+ | GPMC_CONFIG1_PAGE_LEN(2)
+ | GPMC_CONFIG1_WAIT_READ_MON
+ | GPMC_CONFIG1_WAIT_WRITE_MON
+ | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
+ | GPMC_CONFIG1_DEVICESIZE_16
+ | GPMC_CONFIG1_DEVICETYPE_NOR
+ | GPMC_CONFIG1_MUXADDDATA
+ /* fclk divider gets set later */
+ );
+
+ /* IRQ */
+ status = omap_request_gpio(irq);
+ if (status < 0) {
+ printk(error, 3, status);
+ return status;
+ }
+ omap_set_gpio_direction(irq, 1);
+ tusb_resources[2].start = irq + IH_GPIO_BASE;
+
+ /* set up memory timings ... can speed them up later */
+ if (!ps_refclk) {
+ printk(error, 4, status);
+ return -ENODEV;
+ }
+ refclk_psec = ps_refclk;
+ status = tusb6010_platform_retime(1);
+ if (status < 0) {
+ printk(error, 5, status);
+ return status;
+ }
+
+ /* finish device setup ... */
+ if (!data) {
+ printk(error, 6, status);
+ return -ENODEV;
+ }
+ data->multipoint = 1;
+ tusb_device.dev.platform_data = data;
+
+ /* REVISIT let the driver know what DMA channels work */
+ if (!dmachan)
+ tusb_device.dev.dma_mask = NULL;
+ else {
+ /* assume OMAP 2420 ES2.0 and later */
+ if (dmachan & (1 << 0))
+ omap_cfg_reg(AA10_242X_DMAREQ0);
+ if (dmachan & (1 << 1))
+ omap_cfg_reg(AA6_242X_DMAREQ1);
+ if (dmachan & (1 << 2))
+ omap_cfg_reg(E4_242X_DMAREQ2);
+ if (dmachan & (1 << 3))
+ omap_cfg_reg(G4_242X_DMAREQ3);
+ if (dmachan & (1 << 4))
+ omap_cfg_reg(D3_242X_DMAREQ4);
+ if (dmachan & (1 << 5))
+ omap_cfg_reg(E3_242X_DMAREQ5);
+ }
+
+ /* so far so good ... register the device */
+ status = platform_device_register(&tusb_device);
+ if (status < 0) {
+ printk(error, 7, status);
+ return status;
+ }
+ return 0;
+}
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-12-03 09:24:45 +0000