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-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/gpmc.c12
-rw-r--r--arch/arm/mach-omap2/mailbox.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c6
-rw-r--r--arch/arm/mach-omap2/prm2xxx.c88
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c22
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c28
-rw-r--r--arch/arm/mach-omap2/prm44xx.c6
-rw-r--r--arch/arm/mach-omap2/prm44xx.h4
-rw-r--r--arch/arm/mach-omap2/timer.c13
10 files changed, 132 insertions, 55 deletions
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index bdf39481fbd..6ef87580c33 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = {
.recalc_rate = &omap2_clksel_recalc,
.get_parent = &omap2_clksel_find_parent_index,
.set_parent = &omap2_clksel_set_parent,
+ .enable = &omap2_clkops_enable_clkdm,
+ .disable = &omap2_clkops_disable_clkdm,
};
static struct clk emu_src_ck;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 65468f6d7f0..8033cb747c8 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -744,7 +744,7 @@ static int gpmc_setup_irq(void)
return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
}
-static __devexit int gpmc_free_irq(void)
+static int gpmc_free_irq(void)
{
int i;
@@ -762,7 +762,7 @@ static __devexit int gpmc_free_irq(void)
return 0;
}
-static void __devexit gpmc_mem_exit(void)
+static void gpmc_mem_exit(void)
{
int cs;
@@ -774,7 +774,7 @@ static void __devexit gpmc_mem_exit(void)
}
-static int __devinit gpmc_mem_init(void)
+static int gpmc_mem_init(void)
{
int cs, rc;
unsigned long boot_rom_space = 0;
@@ -1121,7 +1121,7 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
return 0;
}
-static __devinit int gpmc_probe(struct platform_device *pdev)
+static int gpmc_probe(struct platform_device *pdev)
{
int rc;
u32 l;
@@ -1177,7 +1177,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
return 0;
}
-static __devexit int gpmc_remove(struct platform_device *pdev)
+static int gpmc_remove(struct platform_device *pdev)
{
gpmc_free_irq();
gpmc_mem_exit();
@@ -1187,7 +1187,7 @@ static __devexit int gpmc_remove(struct platform_device *pdev)
static struct platform_driver gpmc_driver = {
.probe = gpmc_probe,
- .remove = __devexit_p(gpmc_remove),
+ .remove = gpmc_remove,
.driver = {
.name = DEVICE_NAME,
.owner = THIS_MODULE,
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 0d974565f8c..0b080267b7f 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -342,7 +342,7 @@ struct omap_mbox mbox_2_info = {
struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL };
#endif
-static int __devinit omap2_mbox_probe(struct platform_device *pdev)
+static int omap2_mbox_probe(struct platform_device *pdev)
{
struct resource *mem;
int ret;
@@ -395,7 +395,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
return 0;
}
-static int __devexit omap2_mbox_remove(struct platform_device *pdev)
+static int omap2_mbox_remove(struct platform_device *pdev)
{
omap_mbox_unregister();
iounmap(mbox_base);
@@ -404,7 +404,7 @@ static int __devexit omap2_mbox_remove(struct platform_device *pdev)
static struct platform_driver omap2_mbox_driver = {
.probe = omap2_mbox_probe,
- .remove = __devexit_p(omap2_mbox_remove),
+ .remove = omap2_mbox_remove,
.driver = {
.name = "omap-mailbox",
},
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 081c71edddf..646c14d9fdb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = {
{ .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, },
{ .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, },
{ .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, },
- { .irq = -1 + OMAP_INTC_START, },
+ { .irq = -1, },
};
static struct omap_hwmod am33xx_usbss_hwmod = {
@@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
.user = OCP_USER_MPU,
};
-struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
+static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
{
.pa_start = 0x4A101000,
.pa_end = 0x4A101000 + SZ_256 - 1,
@@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
{ }
};
-struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
+static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
.master = &am33xx_cpgmac0_hwmod,
.slave = &am33xx_mdio_hwmod,
.addr = am33xx_mdio_addr_space,
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index cc0e71430af..418de9c3b31 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -28,6 +28,14 @@
#include "prm-regbits-24xx.h"
/*
+ * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
+ * these are reversed from the bits used on OMAP3+
+ */
+#define OMAP24XX_PWRDM_POWER_ON 0x0
+#define OMAP24XX_PWRDM_POWER_RET 0x1
+#define OMAP24XX_PWRDM_POWER_OFF 0x3
+
+/*
* omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
* hardware register (which are specific to the OMAP2xxx SoCs) to
* reset source ID bit shifts (which is an OMAP SoC-independent
@@ -68,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
}
/**
+ * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
+ * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
+ *
+ * Return the common power state bits corresponding to the OMAP2xxx
+ * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
+ */
+static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
+{
+ u8 pwrst;
+
+ switch (omap2xxx_pwrst) {
+ case OMAP24XX_PWRDM_POWER_OFF:
+ pwrst = PWRDM_POWER_OFF;
+ break;
+ case OMAP24XX_PWRDM_POWER_RET:
+ pwrst = PWRDM_POWER_RET;
+ break;
+ case OMAP24XX_PWRDM_POWER_ON:
+ pwrst = PWRDM_POWER_ON;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return pwrst;
+}
+
+/**
* omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
*
* Set the DPLL reset bit, which should reboot the SoC. This is the
@@ -97,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
return 0;
}
+static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+{
+ u8 omap24xx_pwrst;
+
+ switch (pwrst) {
+ case PWRDM_POWER_OFF:
+ omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
+ break;
+ case PWRDM_POWER_RET:
+ omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
+ break;
+ case PWRDM_POWER_ON:
+ omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+ (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
+ pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+ return 0;
+}
+
+static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+{
+ u8 omap2xxx_pwrst;
+
+ omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL,
+ OMAP_POWERSTATE_MASK);
+
+ return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
+}
+
+static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+{
+ u8 omap2xxx_pwrst;
+
+ omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTST,
+ OMAP_POWERSTATEST_MASK);
+
+ return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
+}
+
struct pwrdm_ops omap2_pwrdm_operations = {
- .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
- .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
- .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
+ .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
+ .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
+ .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
.pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
.pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 30517f5af70..a3e121f94a8 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
/* Powerdomain low-level functions */
/* Common functions across OMAP2 and OMAP3 */
-int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
-{
- omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
- (pwrst << OMAP_POWERSTATE_SHIFT),
- pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
- return 0;
-}
-
-int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
-{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP2_PM_PWSTCTRL,
- OMAP_POWERSTATE_MASK);
-}
-
-int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
-{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP2_PM_PWSTST,
- OMAP_POWERSTATEST_MASK);
-}
-
int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
u8 pwrst)
{
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 39822aabcff..e648bd55b07 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -277,6 +277,28 @@ static u32 omap3xxx_prm_read_reset_sources(void)
/* Powerdomain low-level functions */
+static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+{
+ omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+ (pwrst << OMAP_POWERSTATE_SHIFT),
+ pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+ return 0;
+}
+
+static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+{
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL,
+ OMAP_POWERSTATE_MASK);
+}
+
+static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+{
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTST,
+ OMAP_POWERSTATEST_MASK);
+}
+
/* Applicable only for OMAP3. Not supported on OMAP2 */
static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
@@ -355,9 +377,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
}
struct pwrdm_ops omap3_pwrdm_operations = {
- .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
- .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
- .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
+ .pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst,
+ .pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst,
+ .pwrdm_read_pwrst = omap3_pwrdm_read_pwrst,
.pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
.pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 7498bc77fe8..c05a343d465 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
* enumeration)
*/
static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
- { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT,
+ { OMAP4430_GLOBAL_WARM_SW_RST_SHIFT,
OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
- { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT,
+ { OMAP4430_GLOBAL_COLD_RST_SHIFT,
OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
{ OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT,
OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
@@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void)
u32 r = 0;
u32 v;
- v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
+ v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
OMAP4_RM_RSTST);
p = omap44xx_prm_reset_src_map;
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 22b0979206c..8ee1fbdec56 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -62,8 +62,8 @@
/* OMAP4 specific register offsets */
#define OMAP4_RM_RSTCTRL 0x0000
-#define OMAP4_RM_RSTTIME 0x0004
-#define OMAP4_RM_RSTST 0x0008
+#define OMAP4_RM_RSTST 0x0004
+#define OMAP4_RM_RSTTIME 0x0008
#define OMAP4_PM_PWSTCTRL 0x0000
#define OMAP4_PM_PWSTST 0x0004
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 5975a42e16d..57b1ee39fe5 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
static struct clock_event_device clockevent_gpt = {
.name = "gp_timer",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.rating = 300,
.set_next_event = omap2_gp_timer_set_next_event,
.set_mode = omap2_gp_timer_set_mode,
@@ -340,17 +339,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
__omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
- clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
- clockevent_gpt.shift);
- clockevent_gpt.max_delta_ns =
- clockevent_delta2ns(0xffffffff, &clockevent_gpt);
- clockevent_gpt.min_delta_ns =
- clockevent_delta2ns(3, &clockevent_gpt);
- /* Timer internal resynch latency. */
-
clockevent_gpt.cpumask = cpu_possible_mask;
clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
- clockevents_register_device(&clockevent_gpt);
+ clockevents_config_and_register(&clockevent_gpt, clkev.rate,
+ 3, /* Timer internal resynch latency */
+ 0xffffffff);
pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
gptimer_id, clkev.rate);
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-12-22 10:25:23 +0000