diff options
Diffstat (limited to 'arch/arm/mach-pxa')
42 files changed, 264 insertions, 210 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index cd19309fd3b..61d3c72ded8 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -2,6 +2,27 @@ if ARCH_PXA menu "Intel PXA2xx/PXA3xx Implementations" +config ARCH_PXA_V7 + bool "ARMv7 (PXA95x) based systems" + +if ARCH_PXA_V7 +comment "Marvell Dev Platforms (sorted by hardware release time)" +config MACH_TAVOREVB3 + bool "PXA95x Development Platform (aka TavorEVB III)" + select CPU_PXA955 + +config MACH_SAARB + bool "PXA955 Handheld Platform (aka SAARB)" + select CPU_PXA955 +endif + +config PXA_V7_MACH_AUTO + def_bool y + depends on ARCH_PXA_V7 + depends on !MACH_SAARB + select MACH_TAVOREVB3 + +if !ARCH_PXA_V7 comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" config ARCH_LUBBOCK @@ -41,19 +62,11 @@ config MACH_TAVOREVB select PXA3xx select CPU_PXA930 -config MACH_TAVOREVB3 - bool "PXA95x Development Platform (aka TavorEVB III)" - select CPU_PXA950 - config MACH_SAAR bool "PXA930 Handheld Platform (aka SAAR)" select PXA3xx select CPU_PXA930 -config MACH_SAARB - bool "PXA955 Handheld Platform (aka SAARB)" - select CPU_PXA955 - comment "Third Party Dev Platforms (sorted by vendor name)" config ARCH_PXA_IDP @@ -414,6 +427,7 @@ config MACH_CENTRO bool "Palm Centro 685 (GSM)" default y depends on ARCH_PXA_PALM + select MACH_PALM27X select PXA27x select IWMMXT select PALM_TREO @@ -425,6 +439,7 @@ config MACH_TREO680 bool "Palm Treo 680" default y depends on ARCH_PXA_PALM + select MACH_PALM27X select PXA27x select IWMMXT select PALM_TREO @@ -436,15 +451,18 @@ config MACH_RAUMFELD_RC bool "Raumfeld Controller" select PXA3xx select CPU_PXA300 + select POWER_SUPPLY select HAVE_PWM config MACH_RAUMFELD_CONNECTOR bool "Raumfeld Connector" + select POWER_SUPPLY select PXA3xx select CPU_PXA300 config MACH_RAUMFELD_SPEAKER bool "Raumfeld Speaker" + select POWER_SUPPLY select PXA3xx select CPU_PXA300 @@ -598,7 +616,7 @@ config MACH_ZIPIT2 bool "Zipit Z2 Handheld" select PXA27x select HAVE_PWM - +endif endmenu config PXA25x @@ -688,6 +706,8 @@ config SHARPSL_PM config SHARPSL_PM_MAX1111 bool select HWMON + select SPI + select SPI_MASTER select SENSORS_MAX1111 config PXA_HAVE_ISA_IRQS diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index cc39d17b2e0..be0f7df8685 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -19,7 +19,7 @@ endif obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o -obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o +obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o obj-$(CONFIG_CPU_PXA300) += pxa300.o obj-$(CONFIG_CPU_PXA320) += pxa320.o obj-$(CONFIG_CPU_PXA930) += pxa930.o diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 7765d677adb..fc0b8544e17 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -591,7 +591,7 @@ static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ct BALLOON3_NAND_CONTROL_REG); if (balloon3_ctl_set) __raw_writel(balloon3_ctl_set, - BALLOON3_NAND_CONTROL_REG | + BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR); } @@ -608,7 +608,7 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip) __raw_writew( BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3, - BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); + BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR); /* Deassert correct nCE line */ __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, @@ -626,7 +626,7 @@ static int balloon3_nand_probe(struct platform_device *pdev) int ret; __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, - BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR); + BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR); ver = __raw_readw(BALLOON3_FPGA_VER); if (ver < 0x4f08) @@ -649,7 +649,7 @@ static int balloon3_nand_probe(struct platform_device *pdev) BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | BALLOON3_NAND_CONTROL_FLWP, - BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); + BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR); return 0; err2: @@ -807,7 +807,7 @@ static void __init balloon3_init(void) static struct map_desc balloon3_io_desc[] __initdata = { { /* CPLD/FPGA */ - .virtual = BALLOON3_FPGA_VIRT, + .virtual = (unsigned long)BALLOON3_FPGA_VIRT, .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS), .length = BALLOON3_FPGA_LENGTH, .type = MT_DEVICE, diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c index 93f59f877fc..be751470d37 100644 --- a/arch/arm/mach-pxa/cm-x255.c +++ b/arch/arm/mach-pxa/cm-x255.c @@ -11,7 +11,6 @@ #include <linux/platform_device.h> #include <linux/irq.h> -#include <linux/gpio.h> #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> #include <linux/mtd/nand-gpio.h> diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index 6bf479d9b5a..ebd9259f5ac 100644 --- a/arch/arm/mach-pxa/cm-x2xx-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c @@ -26,7 +26,7 @@ #include <asm/hardware/it8152.h> -unsigned long it8152_base_address; +void __iomem *it8152_base_address; static int cmx2xx_it8152_irq_gpio; static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index 349896c53ab..f2e4190080c 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -39,7 +39,7 @@ extern void cmx270_init(void); #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40) /* virtual addresses for statically mapped regions */ -#define CMX2XX_VIRT_BASE (0xe8000000) +#define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000) #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) /* physical address if local-bus attached devices */ @@ -482,7 +482,7 @@ static void __init cmx2xx_init_irq(void) /* Map PCI companion statically */ static struct map_desc cmx2xx_io_desc[] __initdata = { [0] = { /* PCI bridge */ - .virtual = CMX2XX_IT8152_VIRT, + .virtual = (unsigned long)CMX2XX_IT8152_VIRT, .pfn = __phys_to_pfn(PXA_CS4_PHYS), .length = SZ_64M, .type = MT_DEVICE diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 9ac0225cd51..e40dc47cf2f 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -775,7 +775,6 @@ static struct gpio cm_x300_wi2wi_gpios[] __initdata = { static void __init cm_x300_init_wi2wi(void) { - int bt_reset, wlan_en; int err; if (system_rev < 130) { @@ -791,12 +790,11 @@ static void __init cm_x300_init_wi2wi(void) } udelay(10); - gpio_set_value(bt_reset, 0); + gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0); udelay(10); - gpio_set_value(bt_reset, 1); + gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1); - gpio_free(wlan_en); - gpio_free(bt_reset); + gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); } /* MFP */ diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index f5d91efc296..5432ecb15de 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -16,6 +16,7 @@ * initialization stuff for PXA machines which can be overridden later if * need be. */ +#include <linux/gpio.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -26,7 +27,6 @@ #include <asm/mach-types.h> #include <mach/reset.h> -#include <mach/gpio.h> #include <mach/smemc.h> #include <mach/pxa3xx-regs.h> diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h index f4c03659168..bbf9df37ad4 100644 --- a/arch/arm/mach-pxa/include/mach/addr-map.h +++ b/arch/arm/mach-pxa/include/mach/addr-map.h @@ -20,7 +20,7 @@ * Peripheral Bus */ #define PERIPH_PHYS 0x40000000 -#define PERIPH_VIRT 0xf2000000 +#define PERIPH_VIRT IOMEM(0xf2000000) #define PERIPH_SIZE 0x02000000 /* @@ -28,21 +28,21 @@ */ #define PXA2XX_SMEMC_PHYS 0x48000000 #define PXA3XX_SMEMC_PHYS 0x4a000000 -#define SMEMC_VIRT 0xf6000000 +#define SMEMC_VIRT IOMEM(0xf6000000) #define SMEMC_SIZE 0x00100000 /* * Dynamic Memory Controller (only on PXA3xx) */ #define DMEMC_PHYS 0x48100000 -#define DMEMC_VIRT 0xf6100000 +#define DMEMC_VIRT IOMEM(0xf6100000) #define DMEMC_SIZE 0x00100000 /* * Internal Memory Controller (PXA27x and later) */ #define IMEMC_PHYS 0x58000000 -#define IMEMC_VIRT 0xfe000000 +#define IMEMC_VIRT IOMEM(0xfe000000) #define IMEMC_SIZE 0x00100000 #endif /* __ASM_MACH_ADDR_MAP_H */ diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h index 7074e76146c..6d7eab3d086 100644 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/arch/arm/mach-pxa/include/mach/balloon3.h @@ -23,7 +23,7 @@ enum balloon3_features { }; #define BALLOON3_FPGA_PHYS PXA_CS4_PHYS -#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ +#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ #define BALLOON3_FPGA_LENGTH 0x01000000 #define BALLOON3_FPGA_SETnCLR (0x1000) diff --git a/arch/arm/mach-pxa/include/mach/debug-macro.S b/arch/arm/mach-pxa/include/mach/debug-macro.S index 7d5c75125d6..70b112e8ef6 100644 --- a/arch/arm/mach-pxa/include/mach/debug-macro.S +++ b/arch/arm/mach-pxa/include/mach/debug-macro.S @@ -13,7 +13,7 @@ #include "hardware.h" - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00100000 orr \rv, \rp, #io_p2v(0x40000000) @ virtual orr \rp, \rp, #0x40000000 @ physical diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h new file mode 100644 index 00000000000..576868f8b8c --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h @@ -0,0 +1,133 @@ +/* + * Written by Philipp Zabel <philipp.zabel@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ +#ifndef __MACH_PXA_GPIO_PXA_H +#define __MACH_PXA_GPIO_PXA_H + +#include <mach/irqs.h> +#include <mach/hardware.h> + +#define GPIO_REGS_VIRT io_p2v(0x40E00000) + +#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) +#define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) + +/* GPIO Pin Level Registers */ +#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) +#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00) +#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00) +#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00) + +/* GPIO Pin Direction Registers */ +#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c) +#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c) +#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c) +#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c) + +/* GPIO Pin Output Set Registers */ +#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18) +#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18) +#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18) +#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18) + +/* GPIO Pin Output Clear Registers */ +#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24) +#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24) +#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24) +#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24) + +/* GPIO Rising Edge Detect Registers */ +#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30) +#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30) +#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30) +#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30) + +/* GPIO Falling Edge Detect Registers */ +#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c) +#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c) +#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c) +#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c) + +/* GPIO Edge Detect Status Registers */ +#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48) +#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48) +#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48) +#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48) + +/* GPIO Alternate Function Select Registers */ +#define GAFR0_L GPIO_REG(0x0054) +#define GAFR0_U GPIO_REG(0x0058) +#define GAFR1_L GPIO_REG(0x005C) +#define GAFR1_U GPIO_REG(0x0060) +#define GAFR2_L GPIO_REG(0x0064) +#define GAFR2_U GPIO_REG(0x0068) +#define GAFR3_L GPIO_REG(0x006C) +#define GAFR3_U GPIO_REG(0x0070) + +/* More handy macros. The argument is a literal GPIO number. */ + +#define GPIO_bit(x) (1 << ((x) & 0x1f)) + +#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00) +#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) +#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18) +#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24) +#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30) +#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c) +#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48) +#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) + + +#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM + +#define gpio_to_bank(gpio) ((gpio) >> 5) + +#ifdef CONFIG_CPU_PXA26x +/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, + * as well as their Alternate Function value being '1' for GPIO in GAFRx. + */ +static inline int __gpio_is_inverted(unsigned gpio) +{ + return cpu_is_pxa25x() && gpio > 85; +} +#else +static inline int __gpio_is_inverted(unsigned gpio) { return 0; } +#endif + +/* + * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate + * function of a GPIO, and GPDRx cannot be altered once configured. It + * is attributed as "occupied" here (I know this terminology isn't + * accurate, you are welcome to propose a better one :-) + */ +static inline int __gpio_is_occupied(unsigned gpio) +{ + if (cpu_is_pxa27x() || cpu_is_pxa25x()) { + int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3; + int dir = GPDR(gpio) & GPIO_bit(gpio); + + if (__gpio_is_inverted(gpio)) + return af != 1 || dir == 0; + else + return af != 0 || dir != 0; + } else + return GPDR(gpio) & GPIO_bit(gpio); +} + +#include <plat/gpio-pxa.h> +#endif /* __MACH_PXA_GPIO_PXA_H */ diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h index c4639502efc..004cade7bb1 100644 --- a/arch/arm/mach-pxa/include/mach/gpio.h +++ b/arch/arm/mach-pxa/include/mach/gpio.h @@ -24,84 +24,10 @@ #ifndef __ASM_ARCH_PXA_GPIO_H #define __ASM_ARCH_PXA_GPIO_H -#include <mach/irqs.h> -#include <mach/hardware.h> #include <asm-generic/gpio.h> +/* The defines for the driver are needed for the accelerated accessors */ +#include "gpio-pxa.h" -#define GPIO_REGS_VIRT io_p2v(0x40E00000) - -#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) - -/* GPIO Pin Level Registers */ -#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) -#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00) -#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00) -#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00) - -/* GPIO Pin Direction Registers */ -#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c) -#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c) -#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c) -#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c) - -/* GPIO Pin Output Set Registers */ -#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18) -#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18) -#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18) -#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18) - -/* GPIO Pin Output Clear Registers */ -#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24) -#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24) -#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24) -#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24) - -/* GPIO Rising Edge Detect Registers */ -#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30) -#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30) -#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30) -#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30) - -/* GPIO Falling Edge Detect Registers */ -#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c) -#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c) -#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c) -#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c) - -/* GPIO Edge Detect Status Registers */ -#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48) -#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48) -#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48) -#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48) - -/* GPIO Alternate Function Select Registers */ -#define GAFR0_L GPIO_REG(0x0054) -#define GAFR0_U GPIO_REG(0x0058) -#define GAFR1_L GPIO_REG(0x005C) -#define GAFR1_U GPIO_REG(0x0060) -#define GAFR2_L GPIO_REG(0x0064) -#define GAFR2_U GPIO_REG(0x0068) -#define GAFR3_L GPIO_REG(0x006C) -#define GAFR3_U GPIO_REG(0x0070) - -/* More handy macros. The argument is a literal GPIO number. */ - -#define GPIO_bit(x) (1 << ((x) & 0x1f)) - -#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00) -#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) -#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18) -#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24) -#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30) -#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c) -#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48) -#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) - - -#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM - -#define gpio_to_bank(gpio) ((gpio) >> 5) #define gpio_to_irq(gpio) IRQ_GPIO(gpio) static inline int irq_to_gpio(unsigned int irq) @@ -118,37 +44,5 @@ static inline int irq_to_gpio(unsigned int irq) return -1; } -#ifdef CONFIG_CPU_PXA26x -/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, - * as well as their Alternate Function value being '1' for GPIO in GAFRx. - */ -static inline int __gpio_is_inverted(unsigned gpio) -{ - return cpu_is_pxa25x() && gpio > 85; -} -#else -static inline int __gpio_is_inverted(unsigned gpio) { return 0; } -#endif - -/* - * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate - * function of a GPIO, and GPDRx cannot be altered once configured. It - * is attributed as "occupied" here (I know this terminology isn't - * accurate, you are welcome to propose a better one :-) - */ -static inline int __gpio_is_occupied(unsigned gpio) -{ - if (cpu_is_pxa27x() || cpu_is_pxa25x()) { - int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3; - int dir = GPDR(gpio) & GPIO_bit(gpio); - - if (__gpio_is_inverted(gpio)) - return af != 1 || dir == 0; - else - return af != 0 || dir != 0; - } else - return GPDR(gpio) & GPIO_bit(gpio); -} - #include <plat/gpio.h> #endif diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index de63ca3016b..8184669dde2 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -36,22 +36,23 @@ * Note that not all PXA2xx chips implement all those addresses, and the * kernel only maps the minimum needed range of this mapping. */ -#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) +#define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) #ifndef __ASSEMBLY__ - -# define __REG(x) (*((volatile u32 *)io_p2v(x))) +# define IOMEM(x) ((void __iomem *)(x)) +# define __REG(x) (*((volatile u32 __iomem *)io_p2v(x))) /* With indexed regs we don't want to feed the index through io_p2v() especially if it is a variable, otherwise horrible code will result. */ # define __REG2(x,y) \ - (*(volatile u32 *)((u32)&__REG(x) + (y))) + (*(volatile u32 __iomem*)((u32)&__REG(x) + (y))) # define __PREG(x) (io_v2p((u32)&(x))) #else +# define IOMEM(x) x # define __REG(x) io_p2v(x) # define __PREG(x) io_v2p(x) diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h index 2a5726c15e0..b6238cbd8ae 100644 --- a/arch/arm/mach-pxa/include/mach/littleton.h +++ b/arch/arm/mach-pxa/include/mach/littleton.h @@ -1,7 +1,7 @@ #ifndef __ASM_ARCH_LITTLETON_H #define __ASM_ARCH_LITTLETON_H -#include <mach/gpio.h> +#include <mach/gpio-pxa.h> #define LITTLETON_ETH_PHYS 0x30000000 diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h index cd070092b6e..4edc712a2de 100644 --- a/arch/arm/mach-pxa/include/mach/lpd270.h +++ b/arch/arm/mach-pxa/include/mach/lpd270.h @@ -13,13 +13,13 @@ #define __ASM_ARCH_LPD270_H #define LPD270_CPLD_PHYS PXA_CS2_PHYS -#define LPD270_CPLD_VIRT 0xf0000000 +#define LPD270_CPLD_VIRT IOMEM(0xf0000000) #define LPD270_CPLD_SIZE 0x00100000 #define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) /* CPLD registers */ -#define LPD270_CPLD_REG(x) ((unsigned long)(LPD270_CPLD_VIRT + (x))) +#define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x)) #define LPD270_CONTROL LPD270_CPLD_REG(0x00) #define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) #define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h deleted file mode 100644 index d05a59727d6..00000000000 --- a/arch/arm/mach-pxa/include/mach/memory.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/memory.h - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0xa0000000) - -#endif diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h index 297387ec361..990d2bf2fb4 100644 --- a/arch/arm/mach-pxa/include/mach/mtd-xip.h +++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h @@ -16,7 +16,6 @@ #define __ARCH_PXA_MTD_XIP_H__ #include <mach/regs-ost.h> -#include <mach/regs-intc.h> #define xip_irqpending() (ICIP & ICMR) diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h index 0a5e5eadebf..f80bbe246af 100644 --- a/arch/arm/mach-pxa/include/mach/palm27x.h +++ b/arch/arm/mach-pxa/include/mach/palm27x.h @@ -34,7 +34,7 @@ extern struct pxafb_mode_info palm_320x320_new_lcd_mode; extern void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode); #else -static inline void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {} +#define palm27x_lcd_init(power, mode) do {} while (0) #endif #if defined(CONFIG_USB_GADGET_PXA27X) || \ diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h index 10abc4f2e8e..7074a6ed46c 100644 --- a/arch/arm/mach-pxa/include/mach/palmtx.h +++ b/arch/arm/mach-pxa/include/mach/palmtx.h @@ -71,7 +71,7 @@ /* Various addresses */ #define PALMTX_PCMCIA_PHYS 0x28000000 -#define PALMTX_PCMCIA_VIRT 0xf0000000 +#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) #define PALMTX_PCMCIA_SIZE 0x100000 #define PALMTX_PHYS_RAM_START 0xa0000000 @@ -84,8 +84,8 @@ #define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) #define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) -#define PALMTX_NAND_ALE_VIRT 0xff100000 -#define PALMTX_NAND_CLE_VIRT 0xff200000 +#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) +#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) /* TOUCHSCREEN */ #define AC97_LINK_FRAME 21 diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index b9b1bdc4bac..7cff640582b 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h @@ -1,6 +1,7 @@ #ifndef __MACH_PXA27x_H #define __MACH_PXA27x_H +#include <linux/suspend.h> #include <mach/hardware.h> #include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa27x.h> @@ -21,6 +22,7 @@ extern void __init pxa27x_map_io(void); extern void __init pxa27x_init_irq(void); extern int __init pxa27x_set_pwrmode(unsigned int mode); +extern void pxa27x_cpu_pm_enter(suspend_state_t state); #define pxa27x_handle_irq ichp_handle_irq diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h new file mode 100644 index 00000000000..cbb097c4cb1 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa95x.h @@ -0,0 +1,7 @@ +#ifndef __MACH_PXA95X_H +#define __MACH_PXA95X_H + +#include <mach/pxa3xx.h> +#include <mach/mfp-pxa930.h> + +#endif /* __MACH_PXA95X_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h index 01a45ac4811..486b4c519ae 100644 --- a/arch/arm/mach-pxa/include/mach/pxafb.h +++ b/arch/arm/mach-pxa/include/mach/pxafb.h @@ -158,5 +158,18 @@ struct pxafb_mach_info { void pxa_set_fb_info(struct device *, struct pxafb_mach_info *); unsigned long pxafb_get_hsync_time(struct device *dev); +#ifdef CONFIG_FB_PXA_SMARTPANEL extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); extern int pxafb_smart_flush(struct fb_info *info); +#else +static inline int pxafb_smart_queue(struct fb_info *info, + uint16_t *cmds, int n) +{ + return 0; +} + +static inline int pxafb_smart_flush(struct fb_info *info) +{ + return 0; +} +#endif diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h index 654adc90c9a..b7de471b273 100644 --- a/arch/arm/mach-pxa/include/mach/smemc.h +++ b/arch/arm/mach-pxa/include/mach/smemc.h @@ -13,7 +13,7 @@ #define PXA2XX_SMEMC_BASE 0x48000000 #define PXA3XX_SMEMC_BASE 0x4a000000 -#define SMEMC_VIRT 0xf6000000 +#define SMEMC_VIRT IOMEM(0xf6000000) #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */ #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */ diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h index 0641f31a56b..56024f81d57 100644 --- a/arch/arm/mach-pxa/include/mach/zeus.h +++ b/arch/arm/mach-pxa/include/mach/zeus.h @@ -68,7 +68,7 @@ * Be gentle, and remap that over 32kB... */ -#define ZEUS_CPLD (0xf0000000) +#define ZEUS_CPLD IOMEM(0xf0000000) #define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) #define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) #define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) @@ -76,7 +76,7 @@ /* CPLD register bits */ #define ZEUS_CPLD_CONTROL_CF_RST 0x01 -#define ZEUS_PC104IO (0xf1000000) +#define ZEUS_PC104IO IOMEM(0xf1000000) #define ZEUS_SRAM_SIZE (256 * 1024) diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h index ea24998b923..ecca976f03d 100644 --- a/arch/arm/mach-pxa/include/mach/zylonite.h +++ b/arch/arm/mach-pxa/include/mach/zylonite.h @@ -19,7 +19,7 @@ extern int wm9713_irq; extern int lcd_id; extern int lcd_orientation; -#ifdef CONFIG_CPU_PXA300 +#ifdef CONFIG_MACH_ZYLONITE300 extern void zylonite_pxa300_init(void); #else static inline void zylonite_pxa300_init(void) @@ -29,7 +29,7 @@ static inline void zylonite_pxa300_init(void) } #endif -#ifdef CONFIG_CPU_PXA320 +#ifdef CONFIG_MACH_ZYLONITE320 extern void zylonite_pxa320_init(void); #else static inline void zylonite_pxa320_init(void) diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index b09e848eb6c..25f29adf511 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -11,7 +11,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - #include <linux/init.h> #include <linux/module.h> #include <linux/interrupt.h> @@ -21,11 +20,11 @@ #include <mach/hardware.h> #include <mach/irqs.h> -#include <mach/gpio.h> +#include <mach/gpio-pxa.h> #include "generic.h" -#define IRQ_BASE (void __iomem *)io_p2v(0x40d00000) +#define IRQ_BASE io_p2v(0x40d00000) #define ICIP (0x000) #define ICMR (0x004) @@ -63,7 +62,7 @@ static inline void __iomem *irq_base(int i) 0x40d00130, }; - return (void __iomem *)io_p2v(phys_base[i]); + return io_p2v(phys_base[i]); } void pxa_mask_irq(struct irq_data *d) diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 16df0fc0879..1dd530279e0 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -12,7 +12,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - +#include <linux/gpio.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/syscore_ops.h> @@ -39,7 +39,6 @@ #include <asm/mach/flash.h> #include <mach/pxa27x.h> -#include <mach/gpio.h> #include <mach/lpd270.h> #include <mach/audio.h> #include <mach/pxafb.h> @@ -480,7 +479,7 @@ static void __init lpd270_init(void) static struct map_desc lpd270_io_desc[] __initdata = { { - .virtual = LPD270_CPLD_VIRT, + .virtual = (unsigned long)LPD270_CPLD_VIRT, .pfn = __phys_to_pfn(LPD270_CPLD_PHYS), .length = LPD270_CPLD_SIZE, .type = MT_DEVICE, diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index a8c696bfc13..c48ce6da918 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -11,6 +11,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include <linux/gpio.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -42,7 +43,6 @@ #include <asm/hardware/sa1111.h> #include <mach/pxa25x.h> -#include <mach/gpio.h> #include <mach/audio.h> #include <mach/lubbock.h> #include <mach/udc.h> diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index cc6e14f6d11..0567d3965fd 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -12,7 +12,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - +#include <linux/gpio.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/syscore_ops.h> @@ -43,7 +43,6 @@ #include <asm/mach/flash.h> #include <mach/pxa27x.h> -#include <mach/gpio.h> #include <mach/mainstone.h> #include <mach/audio.h> #include <mach/pxafb.h> diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index b27544bcafc..43a5f6861ca 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c @@ -12,15 +12,15 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - +#include <linux/gpio.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/syscore_ops.h> -#include <mach/gpio.h> #include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa2xx.h> +#include <mach/gpio-pxa.h> #include "generic.h" diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 7346fbfa810..94e9708b349 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c @@ -423,6 +423,7 @@ static void __init palmphone_common_init(void) palmtreo_leds_init(); } +#ifdef CONFIG_MACH_TREO680 static void __init treo680_init(void) { pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); @@ -430,7 +431,9 @@ static void __init treo680_init(void) palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY, GPIO_NR_TREO680_SD_POWER, 0); } +#endif +#ifdef CONFIG_MACH_CENTRO static void __init centro_init(void) { pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); @@ -438,7 +441,9 @@ static void __init centro_init(void) palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1, GPIO_NR_CENTRO_SD_POWER, 1); } +#endif +#ifdef CONFIG_MACH_TREO680 MACHINE_START(TREO680, "Palm Treo 680") .atag_offset = 0x100, .map_io = pxa27x_map_io, @@ -448,7 +453,9 @@ MACHINE_START(TREO680, "Palm Treo 680") .timer = &pxa_timer, .init_machine = treo680_init, MACHINE_END +#endif +#ifdef CONFIG_MACH_CENTRO MACHINE_START(CENTRO, "Palm Centro 685") .atag_offset = 0x100, .map_io = pxa27x_map_io, @@ -458,3 +465,4 @@ MACHINE_START(CENTRO, "Palm Centro 685") .timer = &pxa_timer, .init_machine = centro_init, MACHINE_END +#endif diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 2b9e76fc2c9..4e3e45927e9 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -247,7 +247,7 @@ static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = mtd->priv; - unsigned long nandaddr = (unsigned long)this->IO_ADDR_W; + char __iomem *nandaddr = this->IO_ADDR_W; if (cmd == NAND_CMD_NONE) return; @@ -315,17 +315,17 @@ static inline void palmtx_nand_init(void) {} ******************************************************************************/ static struct map_desc palmtx_io_desc[] __initdata = { { - .virtual = PALMTX_PCMCIA_VIRT, + .virtual = (unsigned long)PALMTX_PCMCIA_VIRT, .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS), .length = PALMTX_PCMCIA_SIZE, .type = MT_DEVICE, }, { - .virtual = PALMTX_NAND_ALE_VIRT, + .virtual = (unsigned long)PALMTX_NAND_ALE_VIRT, .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS), .length = SZ_1M, .type = MT_DEVICE, }, { - .virtual = PALMTX_NAND_CLE_VIRT, + .virtual = (unsigned long)PALMTX_NAND_CLE_VIRT, .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS), .length = SZ_1M, .type = MT_DEVICE, diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 6d5b7e06212..9a9c539f6c0 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -19,7 +19,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - +#include <linux/gpio.h> #include <linux/irq.h> #include <linux/platform_device.h> #include <linux/i2c.h> @@ -28,7 +28,6 @@ #include <media/soc_camera.h> -#include <asm/gpio.h> #include <mach/camera.h> #include <asm/mach/map.h> #include <mach/pxa27x.h> diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 9c434d21a27..f05f9486b0c 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -16,6 +16,7 @@ * initialization stuff for PXA machines which can be overridden later if * need be. */ +#include <linux/gpio.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -23,12 +24,12 @@ #include <linux/suspend.h> #include <linux/syscore_ops.h> #include <linux/irq.h> +#include <linux/gpio.h> #include <asm/mach/map.h> #include <asm/suspend.h> #include <mach/hardware.h> #include <mach/irqs.h> -#include <mach/gpio.h> #include <mach/pxa25x.h> #include <mach/reset.h> #include <mach/pm.h> @@ -324,7 +325,7 @@ void __init pxa26x_init_irq(void) static struct map_desc pxa25x_io_desc[] __initdata = { { /* Mem Ctl */ - .virtual = SMEMC_VIRT, + .virtual = (unsigned long)SMEMC_VIRT, .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), .length = 0x00200000, .type = MT_DEVICE diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 9d2400b5f50..bc5a98ebaa7 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -11,6 +11,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include <linux/gpio.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -20,13 +21,13 @@ #include <linux/io.h> #include <linux/irq.h> #include <linux/i2c/pxa-i2c.h> +#include <linux/gpio.h> #include <asm/mach/map.h> #include <mach/hardware.h> #include <asm/irq.h> #include <asm/suspend.h> #include <mach/irqs.h> -#include <mach/gpio.h> #include <mach/pxa27x.h> #include <mach/reset.h> #include <mach/ohci.h> @@ -390,7 +391,7 @@ void __init pxa27x_init_irq(void) static struct map_desc pxa27x_io_desc[] __initdata = { { /* Mem Ctl */ - .virtual = SMEMC_VIRT, + .virtual = (unsigned long)SMEMC_VIRT, .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), .length = 0x00200000, .type = MT_DEVICE diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c index ce7168b233e..e28dfb88827 100644 --- a/arch/arm/mach-pxa/pxa3xx-ulpi.c +++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c @@ -265,6 +265,7 @@ int pxa3xx_u2d_start_hc(struct usb_bus *host) return err; } +EXPORT_SYMBOL_GPL(pxa3xx_u2d_start_hc); void pxa3xx_u2d_stop_hc(struct usb_bus *host) { @@ -277,6 +278,7 @@ void pxa3xx_u2d_stop_hc(struct usb_bus *host) clk_disable(u2d->clk); } +EXPORT_SYMBOL_GPL(pxa3xx_u2d_stop_hc); static int pxa3xx_u2d_probe(struct platform_device *pdev) { diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index b5cd9e5aba3..0737c59b88a 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -12,7 +12,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -26,7 +25,7 @@ #include <asm/mach/map.h> #include <asm/suspend.h> #include <mach/hardware.h> -#include <mach/gpio.h> +#include <mach/gpio-pxa.h> #include <mach/pxa3xx-regs.h> #include <mach/reset.h> #include <mach/ohci.h> @@ -394,7 +393,7 @@ void __init pxa3xx_init_irq(void) static struct map_desc pxa3xx_io_desc[] __initdata = { { /* Mem Ctl */ - .virtual = SMEMC_VIRT, + .virtual = (unsigned long)SMEMC_VIRT, .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE), .length = 0x00200000, .type = MT_DEVICE diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index 0ee166b61f8..51371b39d2a 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c @@ -9,7 +9,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> @@ -21,7 +20,7 @@ #include <linux/syscore_ops.h> #include <mach/hardware.h> -#include <mach/gpio.h> +#include <mach/gpio-pxa.h> #include <mach/pxa3xx-regs.h> #include <mach/pxa930.h> #include <mach/reset.h> diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index 5ce340320ab..3e999e308a2 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c @@ -9,12 +9,13 @@ * it under the terms of the GNU General Public License version 2 as * publishhed by the Free Software Foundation. */ - +#include <linux/gpio.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/i2c.h> #include <linux/i2c/pxa-i2c.h> #include <linux/mfd/88pm860x.h> +#include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -23,7 +24,7 @@ #include <mach/hardware.h> #include <mach/mfp.h> #include <mach/mfp-pxa930.h> -#include <mach/gpio.h> +#include <mach/pxa95x.h> #include "generic.h" diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index 65fed3753fa..ead32c90fec 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -686,7 +686,8 @@ static void z2_power_off(void) */ PSPR = 0x0; local_irq_disable(); - pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); + pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP); + pxa27x_cpu_pm_enter(PM_SUSPEND_MEM); } #else #define z2_power_off NULL diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index c424e7d85ce..498b83b089f 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -860,25 +860,25 @@ static void __init zeus_init(void) static struct map_desc zeus_io_desc[] __initdata = { { - .virtual = ZEUS_CPLD_VERSION, + .virtual = (unsigned long)ZEUS_CPLD_VERSION, .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS), .length = 0x1000, .type = MT_DEVICE, }, { - .virtual = ZEUS_CPLD_ISA_IRQ, + .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ, .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS), .length = 0x1000, .type = MT_DEVICE, }, { - .virtual = ZEUS_CPLD_CONTROL, + .virtual = (unsigned long)ZEUS_CPLD_CONTROL, .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS), .length = 0x1000, .type = MT_DEVICE, }, { - .virtual = ZEUS_PC104IO, + .virtual = (unsigned long)ZEUS_PC104IO, .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), .length = 0x00800000, .type = MT_DEVICE, |