diff options
Diffstat (limited to 'arch/arm/mach-s3c2412/s3c2412.c')
| -rw-r--r-- | arch/arm/mach-s3c2412/s3c2412.c | 27 |
1 files changed, 21 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 313759c3da6..5b5aba69ec3 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -16,6 +16,7 @@ #include <linux/list.h> #include <linux/timer.h> #include <linux/init.h> +#include <linux/clk.h> #include <linux/delay.h> #include <linux/sysdev.h> #include <linux/serial_core.h> @@ -33,13 +34,15 @@ #include <mach/reset.h> #include <mach/idle.h> +#include <plat/cpu-freq.h> + #include <mach/regs-clock.h> #include <plat/regs-serial.h> #include <mach/regs-power.h> #include <mach/regs-gpio.h> #include <mach/regs-gpioj.h> #include <mach/regs-dsc.h> -#include <asm/plat-s3c24xx/regs-spi.h> +#include <plat/regs-spi.h> #include <mach/regs-s3c2412.h> #include <plat/s3c2412.h> @@ -47,6 +50,7 @@ #include <plat/devs.h> #include <plat/clock.h> #include <plat/pm.h> +#include <plat/pll.h> #ifndef CONFIG_CPU_S3C2412_ONLY void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; @@ -136,7 +140,7 @@ static void s3c2412_hard_reset(void) * machine specific initialisation. */ -void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) +void __init s3c2412_map_io(void) { /* move base of IO */ @@ -153,20 +157,25 @@ void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) /* register our io-tables */ iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); - iotable_init(mach_desc, mach_size); } -void __init s3c2412_init_clocks(int xtal) +void __init_or_cpufreq s3c2412_setup_clocks(void) { + struct clk *xtal_clk; unsigned long tmp; + unsigned long xtal; unsigned long fclk; unsigned long hclk; unsigned long pclk; + xtal_clk = clk_get(NULL, "xtal"); + xtal = clk_get_rate(xtal_clk); + clk_put(xtal_clk); + /* now we've got our machine bits initialised, work out what * clocks we've got */ - fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); + fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2); clk_mpll.rate = fclk; @@ -183,11 +192,17 @@ void __init s3c2412_init_clocks(int xtal) printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); + s3c24xx_setup_clocks(fclk, hclk, pclk); +} + +void __init s3c2412_init_clocks(int xtal) +{ /* initialise the clocks here, to allow other things like the * console to use them */ - s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); + s3c24xx_register_baseclocks(xtal); + s3c2412_setup_clocks(); s3c2412_baseclk_add(); } |