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Diffstat (limited to 'arch/arm/mach-s5pc100')
-rw-r--r--arch/arm/mach-s5pc100/gpiolib.c31
1 files changed, 8 insertions, 23 deletions
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index 5811578ad4e..def4ff83e05 100644
--- a/arch/arm/mach-s5pc100/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -61,25 +61,6 @@
* L3 8 4Bit None
*/
-static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
-{
- int base;
-
- base = chip->base - S5PC100_GPH0(0);
- if (base == 0)
- return IRQ_EINT(offset);
- base = chip->base - S5PC100_GPH1(0);
- if (base == 0)
- return IRQ_EINT(8 + offset);
- base = chip->base - S5PC100_GPH2(0);
- if (base == 0)
- return IRQ_EINT(16 + offset);
- base = chip->base - S5PC100_GPH3(0);
- if (base == 0)
- return IRQ_EINT(24 + offset);
- return -EINVAL;
-}
-
static struct s3c_gpio_cfg gpio_cfg = {
.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
.set_pull = s3c_gpio_setpull_updown,
@@ -223,38 +204,42 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
}, {
.base = S5PC100_GPH0_BASE,
.config = &gpio_cfg_eint,
+ .irq_base = IRQ_EINT(0),
.chip = {
.base = S5PC100_GPH0(0),
.ngpio = S5PC100_GPIO_H0_NR,
.label = "GPH0",
- .to_irq = s5pc100_gpiolib_to_eint,
+ .to_irq = samsung_gpiolib_to_irq,
},
}, {
.base = S5PC100_GPH1_BASE,
.config = &gpio_cfg_eint,
+ .irq_base = IRQ_EINT(8),
.chip = {
.base = S5PC100_GPH1(0),
.ngpio = S5PC100_GPIO_H1_NR,
.label = "GPH1",
- .to_irq = s5pc100_gpiolib_to_eint,
+ .to_irq = samsung_gpiolib_to_irq,
},
}, {
.base = S5PC100_GPH2_BASE,
.config = &gpio_cfg_eint,
+ .irq_base = IRQ_EINT(16),
.chip = {
.base = S5PC100_GPH2(0),
.ngpio = S5PC100_GPIO_H2_NR,
.label = "GPH2",
- .to_irq = s5pc100_gpiolib_to_eint,
+ .to_irq = samsung_gpiolib_to_irq,
},
}, {
.base = S5PC100_GPH3_BASE,
.config = &gpio_cfg_eint,
+ .irq_base = IRQ_EINT(24),
.chip = {
.base = S5PC100_GPH3(0),
.ngpio = S5PC100_GPIO_H3_NR,
.label = "GPH3",
- .to_irq = s5pc100_gpiolib_to_eint,
+ .to_irq = samsung_gpiolib_to_irq,
},
}, {
.base = S5PC100_GPI_BASE,