diff options
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r-- | arch/arm/mach-s5pv210/Kconfig | 7 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/cpufreq.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/gpiolib.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/gpio.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/irqs.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/map.h | 168 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/memory.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/mach-aquila.c | 71 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/mach-goni.c | 130 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/mach-smdkc110.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/mach-smdkv210.c | 46 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/mach-torbreck.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/setup-fimc.c | 43 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/setup-sdhci-gpio.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/setup-sdhci.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/sleep.S | 105 |
18 files changed, 308 insertions, 296 deletions
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 53aabef1e9c..37b5a97594a 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -13,6 +13,7 @@ config CPU_S5PV210 bool select S3C_PL330_DMA select S5P_EXT_INT + select S5P_HRT select S5PV210_PM if PM help Enable S5PV210 CPU support @@ -53,6 +54,11 @@ config S5PV210_SETUP_SDHCI_GPIO help Common setup code for SDHCI gpio. +config S5PV210_SETUP_FIMC + bool + help + Common setup code for the camera interfaces. + menu "S5PC110 Machines" config MACH_AQUILA @@ -130,6 +136,7 @@ config MACH_SMDKV210 select SAMSUNG_DEV_ADC select SAMSUNG_DEV_IDE select SAMSUNG_DEV_KEYPAD + select SAMSUNG_DEV_PWM select SAMSUNG_DEV_TS select S5PV210_SETUP_FB_24BPP select S5PV210_SETUP_I2C1 diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index ff1a0db57a2..11f17907b4e 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -31,6 +31,7 @@ obj-y += dev-audio.o obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o +obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o diff --git a/arch/arm/mach-s5pv210/cpufreq.c b/arch/arm/mach-s5pv210/cpufreq.c index a6f22920a2c..22046e2f53c 100644 --- a/arch/arm/mach-s5pv210/cpufreq.c +++ b/arch/arm/mach-s5pv210/cpufreq.c @@ -390,8 +390,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, } #ifdef CONFIG_PM -static int s5pv210_cpufreq_suspend(struct cpufreq_policy *policy, - pm_message_t pmsg) +static int s5pv210_cpufreq_suspend(struct cpufreq_policy *policy) { return 0; } diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c index ab673effd76..1ba20a703e0 100644 --- a/arch/arm/mach-s5pv210/gpiolib.c +++ b/arch/arm/mach-s5pv210/gpiolib.c @@ -281,6 +281,7 @@ static __init int s5pv210_gpiolib_init(void) } samsung_gpiolib_add_4bit_chips(s5pv210_gpio_4bit, nr_chips); + s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR); return 0; } diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h index 1f4b595534c..a5a1e331f8e 100644 --- a/arch/arm/mach-s5pv210/include/mach/gpio.h +++ b/arch/arm/mach-s5pv210/include/mach/gpio.h @@ -18,7 +18,7 @@ #define gpio_cansleep __gpio_cansleep #define gpio_to_irq __gpio_to_irq -/* Practically, GPIO banks upto MP03 are the configurable gpio banks */ +/* Practically, GPIO banks up to MP03 are the configurable gpio banks */ /* GPIO bank sizes */ #define S5PV210_GPIO_A0_NR (8) diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 26710b35ef8..b9f9ec33384 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h @@ -99,9 +99,9 @@ #define IRQ_TC IRQ_PENDN #define IRQ_KEYPAD S5P_IRQ_VIC2(25) #define IRQ_CG S5P_IRQ_VIC2(26) -#define IRQ_SEC S5P_IRQ_VIC2(27) -#define IRQ_SECRX S5P_IRQ_VIC2(28) -#define IRQ_SECTX S5P_IRQ_VIC2(29) +#define IRQ_SSS_INT S5P_IRQ_VIC2(27) +#define IRQ_SSS_HASH S5P_IRQ_VIC2(28) +#define IRQ_PCM2 S5P_IRQ_VIC2(29) #define IRQ_SDMIRQ S5P_IRQ_VIC2(30) #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 3611492ad68..1dd58836fd4 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h @@ -1,6 +1,6 @@ /* linux/arch/arm/mach-s5pv210/include/mach/map.h * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * * S5PV210 - Memory map definitions @@ -16,122 +16,120 @@ #include <plat/map-base.h> #include <plat/map-s5p.h> -#define S5PV210_PA_SROM_BANK5 (0xA8000000) +#define S5PV210_PA_SDRAM 0x20000000 -#define S5PC110_PA_ONENAND (0xB0000000) -#define S5P_PA_ONENAND S5PC110_PA_ONENAND +#define S5PV210_PA_SROM_BANK5 0xA8000000 -#define S5PC110_PA_ONENAND_DMA (0xB0600000) -#define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA +#define S5PC110_PA_ONENAND 0xB0000000 +#define S5PC110_PA_ONENAND_DMA 0xB0600000 -#define S5PV210_PA_CHIPID (0xE0000000) -#define S5P_PA_CHIPID S5PV210_PA_CHIPID +#define S5PV210_PA_CHIPID 0xE0000000 -#define S5PV210_PA_SYSCON (0xE0100000) -#define S5P_PA_SYSCON S5PV210_PA_SYSCON +#define S5PV210_PA_SYSCON 0xE0100000 -#define S5PV210_PA_GPIO (0xE0200000) +#define S5PV210_PA_GPIO 0xE0200000 -/* SPI */ -#define S5PV210_PA_SPI0 0xE1300000 -#define S5PV210_PA_SPI1 0xE1400000 +#define S5PV210_PA_SPDIF 0xE1100000 -#define S5PV210_PA_KEYPAD (0xE1600000) +#define S5PV210_PA_SPI0 0xE1300000 +#define S5PV210_PA_SPI1 0xE1400000 -#define S5PV210_PA_IIC0 (0xE1800000) -#define S5PV210_PA_IIC1 (0xFAB00000) -#define S5PV210_PA_IIC2 (0xE1A00000) +#define S5PV210_PA_KEYPAD 0xE1600000 -#define S5PV210_PA_TIMER (0xE2500000) -#define S5P_PA_TIMER S5PV210_PA_TIMER +#define S5PV210_PA_ADC 0xE1700000 -#define S5PV210_PA_SYSTIMER (0xE2600000) +#define S5PV210_PA_IIC0 0xE1800000 +#define S5PV210_PA_IIC1 0xFAB00000 +#define S5PV210_PA_IIC2 0xE1A00000 -#define S5PV210_PA_WATCHDOG (0xE2700000) +#define S5PV210_PA_AC97 0xE2200000 -#define S5PV210_PA_RTC (0xE2800000) -#define S5PV210_PA_UART (0xE2900000) +#define S5PV210_PA_PCM0 0xE2300000 +#define S5PV210_PA_PCM1 0xE1200000 +#define S5PV210_PA_PCM2 0xE2B00000 -#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) -#define S5P_PA_UART1 (S5PV210_PA_UART + 0x400) -#define S5P_PA_UART2 (S5PV210_PA_UART + 0x800) -#define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00) +#define S5PV210_PA_TIMER 0xE2500000 +#define S5PV210_PA_SYSTIMER 0xE2600000 +#define S5PV210_PA_WATCHDOG 0xE2700000 +#define S5PV210_PA_RTC 0xE2800000 -#define S5P_SZ_UART SZ_256 +#define S5PV210_PA_UART 0xE2900000 -#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) +#define S5PV210_PA_SROMC 0xE8000000 -#define S5PV210_PA_SROMC (0xE8000000) -#define S5P_PA_SROMC S5PV210_PA_SROMC +#define S5PV210_PA_CFCON 0xE8200000 -#define S5PV210_PA_CFCON (0xE8200000) +#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) -#define S5PV210_PA_MDMA 0xFA200000 -#define S5PV210_PA_PDMA0 0xE0900000 -#define S5PV210_PA_PDMA1 0xE0A00000 +#define S5PV210_PA_HSOTG 0xEC000000 +#define S5PV210_PA_HSPHY 0xEC100000 -#define S5PV210_PA_FB (0xF8000000) +#define S5PV210_PA_IIS0 0xEEE30000 +#define S5PV210_PA_IIS1 0xE2100000 +#define S5PV210_PA_IIS2 0xE2A00000 -#define S5PV210_PA_FIMC0 (0xFB200000) -#define S5PV210_PA_FIMC1 (0xFB300000) -#define S5PV210_PA_FIMC2 (0xFB400000) +#define S5PV210_PA_DMC0 0xF0000000 +#define S5PV210_PA_DMC1 0xF1400000 -#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) +#define S5PV210_PA_VIC0 0xF2000000 +#define S5PV210_PA_VIC1 0xF2100000 +#define S5PV210_PA_VIC2 0xF2200000 +#define S5PV210_PA_VIC3 0xF2300000 -#define S5PV210_PA_HSOTG (0xEC000000) -#define S5PV210_PA_HSPHY (0xEC100000) +#define S5PV210_PA_FB 0xF8000000 -#define S5PV210_PA_VIC0 (0xF2000000) -#define S5PV210_PA_VIC1 (0xF2100000) -#define S5PV210_PA_VIC2 (0xF2200000) -#define S5PV210_PA_VIC3 (0xF2300000) +#define S5PV210_PA_MDMA 0xFA200000 +#define S5PV210_PA_PDMA0 0xE0900000 +#define S5PV210_PA_PDMA1 0xE0A00000 -#define S5PV210_PA_SDRAM (0x20000000) -#define S5P_PA_SDRAM S5PV210_PA_SDRAM +#define S5PV210_PA_MIPI_CSIS 0xFA600000 -/* S/PDIF */ -#define S5PV210_PA_SPDIF 0xE1100000 +#define S5PV210_PA_FIMC0 0xFB200000 +#define S5PV210_PA_FIMC1 0xFB300000 +#define S5PV210_PA_FIMC2 0xFB400000 -/* I2S */ -#define S5PV210_PA_IIS0 0xEEE30000 -#define S5PV210_PA_IIS1 0xE2100000 -#define S5PV210_PA_IIS2 0xE2A00000 +/* Compatibiltiy Defines */ -/* PCM */ -#define S5PV210_PA_PCM0 0xE2300000 -#define S5PV210_PA_PCM1 0xE1200000 -#define S5PV210_PA_PCM2 0xE2B00000 +#define S3C_PA_FB S5PV210_PA_FB +#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) +#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) +#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) +#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) +#define S3C_PA_IIC S5PV210_PA_IIC0 +#define S3C_PA_IIC1 S5PV210_PA_IIC1 +#define S3C_PA_IIC2 S5PV210_PA_IIC2 +#define S3C_PA_RTC S5PV210_PA_RTC +#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG +#define S3C_PA_WDT S5PV210_PA_WATCHDOG -/* AC97 */ -#define S5PV210_PA_AC97 0xE2200000 +#define S5P_PA_CHIPID S5PV210_PA_CHIPID +#define S5P_PA_FIMC0 S5PV210_PA_FIMC0 +#define S5P_PA_FIMC1 S5PV210_PA_FIMC1 +#define S5P_PA_FIMC2 S5PV210_PA_FIMC2 +#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS +#define S5P_PA_ONENAND S5PC110_PA_ONENAND +#define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA +#define S5P_PA_SDRAM S5PV210_PA_SDRAM +#define S5P_PA_SROMC S5PV210_PA_SROMC +#define S5P_PA_SYSCON S5PV210_PA_SYSCON +#define S5P_PA_TIMER S5PV210_PA_TIMER -#define S5PV210_PA_ADC (0xE1700000) +#define SAMSUNG_PA_ADC S5PV210_PA_ADC +#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON +#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD -#define S5PV210_PA_DMC0 (0xF0000000) -#define S5PV210_PA_DMC1 (0xF1400000) +/* UART */ -#define S5PV210_PA_MIPI_CSIS 0xFA600000 +#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) -/* compatibiltiy defines. */ -#define S3C_PA_UART S5PV210_PA_UART -#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) -#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) -#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) -#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) -#define S3C_PA_IIC S5PV210_PA_IIC0 -#define S3C_PA_IIC1 S5PV210_PA_IIC1 -#define S3C_PA_IIC2 S5PV210_PA_IIC2 -#define S3C_PA_FB S5PV210_PA_FB -#define S3C_PA_RTC S5PV210_PA_RTC -#define S3C_PA_WDT S5PV210_PA_WATCHDOG -#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG -#define S5P_PA_FIMC0 S5PV210_PA_FIMC0 -#define S5P_PA_FIMC1 S5PV210_PA_FIMC1 -#define S5P_PA_FIMC2 S5PV210_PA_FIMC2 -#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS +#define S3C_PA_UART S5PV210_PA_UART -#define SAMSUNG_PA_ADC S5PV210_PA_ADC -#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON -#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD +#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) +#define S5P_PA_UART0 S5P_PA_UART(0) +#define S5P_PA_UART1 S5P_PA_UART(1) +#define S5P_PA_UART2 S5P_PA_UART(2) +#define S5P_PA_UART3 S5P_PA_UART(3) + +#define S5P_SZ_UART SZ_256 #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h index d503e0c4ce4..7b5fcf0da0c 100644 --- a/arch/arm/mach-s5pv210/include/mach/memory.h +++ b/arch/arm/mach-s5pv210/include/mach/memory.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#define PHYS_OFFSET UL(0x20000000) +#define PLAT_PHYS_OFFSET UL(0x20000000) #define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) /* diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index 4c45b74def5..78925c51634 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -146,6 +146,10 @@ #define S5P_OM_STAT S5P_CLKREG(0xE100) #define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) #define S5P_DAC_CONTROL S5P_CLKREG(0xE810) +#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814) +#define S5P_MIPI_DPHY_ENABLE (1 << 0) +#define S5P_MIPI_DPHY_SRESETN (1 << 1) +#define S5P_MIPI_DPHY_MRESETN (1 << 2) #define S5P_INFORM0 S5P_CLKREG(0xF000) #define S5P_INFORM1 S5P_CLKREG(0xF004) @@ -161,7 +165,6 @@ #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) -#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814) #define S5P_IDLE_CFG_TL_MASK (3 << 30) #define S5P_IDLE_CFG_TM_MASK (3 << 28) diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 461aa035afc..4e1d8ff5ae5 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c @@ -39,6 +39,7 @@ #include <plat/fb.h> #include <plat/fimc-core.h> #include <plat/sdhci.h> +#include <plat/s5p-time.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -149,7 +150,7 @@ static struct regulator_init_data aquila_ldo2_data = { static struct regulator_init_data aquila_ldo3_data = { .constraints = { - .name = "VUSB/MIPI_1.1V", + .name = "VUSB+MIPI_1.1V", .min_uV = 1100000, .max_uV = 1100000, .apply_uV = 1, @@ -197,7 +198,7 @@ static struct regulator_init_data aquila_ldo7_data = { static struct regulator_init_data aquila_ldo8_data = { .constraints = { - .name = "VUSB/VADC_3.3V", + .name = "VUSB+VADC_3.3V", .min_uV = 3300000, .max_uV = 3300000, .apply_uV = 1, @@ -207,7 +208,7 @@ static struct regulator_init_data aquila_ldo8_data = { static struct regulator_init_data aquila_ldo9_data = { .constraints = { - .name = "VCC/VCAM_2.8V", + .name = "VCC+VCAM_2.8V", .min_uV = 2800000, .max_uV = 2800000, .apply_uV = 1, @@ -296,13 +297,11 @@ static struct regulator_init_data aquila_ldo17_data = { }; /* BUCK */ -static struct regulator_consumer_supply buck1_consumer[] = { - { .supply = "vddarm", }, -}; +static struct regulator_consumer_supply buck1_consumer = + REGULATOR_SUPPLY("vddarm", NULL); -static struct regulator_consumer_supply buck2_consumer[] = { - { .supply = "vddint", }, -}; +static struct regulator_consumer_supply buck2_consumer = + REGULATOR_SUPPLY("vddint", NULL); static struct regulator_init_data aquila_buck1_data = { .constraints = { @@ -313,8 +312,8 @@ static struct regulator_init_data aquila_buck1_data = { .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = ARRAY_SIZE(buck1_consumer), - .consumer_supplies = buck1_consumer, + .num_consumer_supplies = 1, + .consumer_supplies = &buck1_consumer, }; static struct regulator_init_data aquila_buck2_data = { @@ -326,8 +325,8 @@ static struct regulator_init_data aquila_buck2_data = { .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = ARRAY_SIZE(buck2_consumer), - .consumer_supplies = buck2_consumer, + .num_consumer_supplies = 1, + .consumer_supplies = &buck2_consumer, }; static struct regulator_init_data aquila_buck3_data = { @@ -381,33 +380,24 @@ static struct max8998_platform_data aquila_max8998_pdata = { .buck1_set1 = S5PV210_GPH0(3), .buck1_set2 = S5PV210_GPH0(4), .buck2_set3 = S5PV210_GPH0(5), - .buck1_max_voltage1 = 1200000, - .buck1_max_voltage2 = 1200000, - .buck2_max_voltage = 1200000, + .buck1_voltage1 = 1200000, + .buck1_voltage2 = 1200000, + .buck1_voltage3 = 1200000, + .buck1_voltage4 = 1200000, + .buck2_voltage1 = 1200000, + .buck2_voltage2 = 1200000, }; #endif static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = { - { - .dev_name = "5-001a", - .supply = "DBVDD", - }, { - .dev_name = "5-001a", - .supply = "AVDD2", - }, { - .dev_name = "5-001a", - .supply = "CPVDD", - }, + REGULATOR_SUPPLY("DBVDD", "5-001a"), + REGULATOR_SUPPLY("AVDD2", "5-001a"), + REGULATOR_SUPPLY("CPVDD", "5-001a"), }; static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = { - { - .dev_name = "5-001a", - .supply = "SPKVDD1", - }, { - .dev_name = "5-001a", - .supply = "SPKVDD2", - }, + REGULATOR_SUPPLY("SPKVDD1", "5-001a"), + REGULATOR_SUPPLY("SPKVDD2", "5-001a"), }; static struct regulator_init_data wm8994_fixed_voltage0_init_data = { @@ -456,15 +446,11 @@ static struct platform_device wm8994_fixed_voltage1 = { }, }; -static struct regulator_consumer_supply wm8994_avdd1_supply = { - .dev_name = "5-001a", - .supply = "AVDD1", -}; +static struct regulator_consumer_supply wm8994_avdd1_supply = + REGULATOR_SUPPLY("AVDD1", "5-001a"); -static struct regulator_consumer_supply wm8994_dcvdd_supply = { - .dev_name = "5-001a", - .supply = "DCVDD", -}; +static struct regulator_consumer_supply wm8994_dcvdd_supply = + REGULATOR_SUPPLY("DCVDD", "5-001a"); static struct regulator_init_data wm8994_ldo1_data = { .constraints = { @@ -661,6 +647,7 @@ static void __init aquila_map_io(void) s5p_init_io(NULL, 0, S5P_VA_CHIPID); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); + s5p_set_timer_source(S5P_PWM3, S5P_PWM4); } static void __init aquila_machine_init(void) @@ -695,5 +682,5 @@ MACHINE_START(AQUILA, "Aquila") .init_irq = s5pv210_init_irq, .map_io = aquila_map_io, .init_machine = aquila_machine_init, - .timer = &s3c24xx_timer, + .timer = &s5p_timer, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index e22d5112fd4..31d5aa76975 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c @@ -15,7 +15,7 @@ #include <linux/fb.h> #include <linux/i2c.h> #include <linux/i2c-gpio.h> -#include <linux/i2c/qt602240_ts.h> +#include <linux/i2c/atmel_mxt_ts.h> #include <linux/mfd/max8998.h> #include <linux/mfd/wm8994/pdata.h> #include <linux/regulator/fixed.h> @@ -25,6 +25,7 @@ #include <linux/gpio_keys.h> #include <linux/input.h> #include <linux/gpio.h> +#include <linux/interrupt.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -45,6 +46,7 @@ #include <plat/keypad.h> #include <plat/sdhci.h> #include <plat/clock.h> +#include <plat/s5p-time.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -108,6 +110,8 @@ static struct s3c_fb_pd_win goni_fb_win0 = { }, .max_bpp = 32, .default_bpp = 16, + .virtual_x = 480, + .virtual_y = 2 * 800, }; static struct s3c_fb_platdata goni_lcd_pdata __initdata = { @@ -222,7 +226,7 @@ static void __init goni_radio_init(void) } /* TSP */ -static struct qt602240_platform_data qt602240_platform_data = { +static struct mxt_platform_data qt602240_platform_data = { .x_line = 17, .y_line = 11, .x_size = 800, @@ -230,7 +234,8 @@ static struct qt602240_platform_data qt602240_platform_data = { .blen = 0x21, .threshold = 0x28, .voltage = 2800000, /* 2.8V */ - .orient = QT602240_DIAGONAL, + .orient = MXT_DIAGONAL, + .irqflags = IRQF_TRIGGER_FALLING, }; static struct s3c2410_platform_i2c i2c2_data __initdata = { @@ -269,10 +274,30 @@ static void __init goni_tsp_init(void) /* MAX8998 regulators */ #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) +static struct regulator_consumer_supply goni_ldo3_consumers[] = { + REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), +}; + static struct regulator_consumer_supply goni_ldo5_consumers[] = { REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), }; +static struct regulator_consumer_supply goni_ldo8_consumers[] = { + REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), +}; + +static struct regulator_consumer_supply goni_ldo11_consumers[] = { + REGULATOR_SUPPLY("vddio", "0-0030"), /* "CAM_IO_2.8V" */ +}; + +static struct regulator_consumer_supply goni_ldo13_consumers[] = { + REGULATOR_SUPPLY("vdda", "0-0030"), /* "CAM_A_2.8V" */ +}; + +static struct regulator_consumer_supply goni_ldo14_consumers[] = { + REGULATOR_SUPPLY("vdd_core", "0-0030"), /* "CAM_CIF_1.8V" */ +}; + static struct regulator_init_data goni_ldo2_data = { .constraints = { .name = "VALIVE_1.1V", @@ -288,12 +313,14 @@ static struct regulator_init_data goni_ldo2_data = { static struct regulator_init_data goni_ldo3_data = { .constraints = { - .name = "VUSB/MIPI_1.1V", + .name = "VUSB+MIPI_1.1V", .min_uV = 1100000, .max_uV = 1100000, .apply_uV = 1, - .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, + .num_consumer_supplies = ARRAY_SIZE(goni_ldo3_consumers), + .consumer_supplies = goni_ldo3_consumers, }; static struct regulator_init_data goni_ldo4_data = { @@ -311,6 +338,7 @@ static struct regulator_init_data goni_ldo5_data = { .min_uV = 2800000, .max_uV = 2800000, .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, .num_consumer_supplies = ARRAY_SIZE(goni_ldo5_consumers), .consumer_supplies = goni_ldo5_consumers, @@ -337,21 +365,22 @@ static struct regulator_init_data goni_ldo7_data = { static struct regulator_init_data goni_ldo8_data = { .constraints = { - .name = "VUSB/VADC_3.3V", + .name = "VUSB+VADC_3.3V", .min_uV = 3300000, .max_uV = 3300000, .apply_uV = 1, - .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, + .num_consumer_supplies = ARRAY_SIZE(goni_ldo8_consumers), + .consumer_supplies = goni_ldo8_consumers, }; static struct regulator_init_data goni_ldo9_data = { .constraints = { - .name = "VCC/VCAM_2.8V", + .name = "VCC+VCAM_2.8V", .min_uV = 2800000, .max_uV = 2800000, .apply_uV = 1, - .always_on = 1, }, }; @@ -371,8 +400,10 @@ static struct regulator_init_data goni_ldo11_data = { .min_uV = 2800000, .max_uV = 2800000, .apply_uV = 1, - .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, + .num_consumer_supplies = ARRAY_SIZE(goni_ldo11_consumers), + .consumer_supplies = goni_ldo11_consumers, }; static struct regulator_init_data goni_ldo12_data = { @@ -381,7 +412,6 @@ static struct regulator_init_data goni_ldo12_data = { .min_uV = 1200000, .max_uV = 1200000, .apply_uV = 1, - .always_on = 1, }, }; @@ -391,8 +421,10 @@ static struct regulator_init_data goni_ldo13_data = { .min_uV = 2800000, .max_uV = 2800000, .apply_uV = 1, - .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, + .num_consumer_supplies = ARRAY_SIZE(goni_ldo13_consumers), + .consumer_supplies = goni_ldo13_consumers, }; static struct regulator_init_data goni_ldo14_data = { @@ -401,8 +433,10 @@ static struct regulator_init_data goni_ldo14_data = { .min_uV = 1800000, .max_uV = 1800000, .apply_uV = 1, - .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, + .num_consumer_supplies = ARRAY_SIZE(goni_ldo14_consumers), + .consumer_supplies = goni_ldo14_consumers, }; static struct regulator_init_data goni_ldo15_data = { @@ -411,7 +445,6 @@ static struct regulator_init_data goni_ldo15_data = { .min_uV = 3300000, .max_uV = 3300000, .apply_uV = 1, - .always_on = 1, }, }; @@ -421,7 +454,6 @@ static struct regulator_init_data goni_ldo16_data = { .min_uV = 1800000, .max_uV = 1800000, .apply_uV = 1, - .always_on = 1, }, }; @@ -436,13 +468,11 @@ static struct regulator_init_data goni_ldo17_data = { }; /* BUCK */ -static struct regulator_consumer_supply buck1_consumer[] = { - { .supply = "vddarm", }, -}; +static struct regulator_consumer_supply buck1_consumer = + REGULATOR_SUPPLY("vddarm", NULL); -static struct regulator_consumer_supply buck2_consumer[] = { - { .supply = "vddint", }, -}; +static struct regulator_consumer_supply buck2_consumer = + REGULATOR_SUPPLY("vddint", NULL); static struct regulator_init_data goni_buck1_data = { .constraints = { @@ -453,8 +483,8 @@ static struct regulator_init_data goni_buck1_data = { .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = ARRAY_SIZE(buck1_consumer), - .consumer_supplies = buck1_consumer, + .num_consumer_supplies = 1, + .consumer_supplies = &buck1_consumer, }; static struct regulator_init_data goni_buck2_data = { @@ -466,8 +496,8 @@ static struct regulator_init_data goni_buck2_data = { .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = ARRAY_SIZE(buck2_consumer), - .consumer_supplies = buck2_consumer, + .num_consumer_supplies = 1, + .consumer_supplies = &buck2_consumer, }; static struct regulator_init_data goni_buck3_data = { @@ -521,33 +551,24 @@ static struct max8998_platform_data goni_max8998_pdata = { .buck1_set1 = S5PV210_GPH0(3), .buck1_set2 = S5PV210_GPH0(4), .buck2_set3 = S5PV210_GPH0(5), - .buck1_max_voltage1 = 1200000, - .buck1_max_voltage2 = 1200000, - .buck2_max_voltage = 1200000, + .buck1_voltage1 = 1200000, + .buck1_voltage2 = 1200000, + .buck1_voltage3 = 1200000, + .buck1_voltage4 = 1200000, + .buck2_voltage1 = 1200000, + .buck2_voltage2 = 1200000, }; #endif static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = { - { - .dev_name = "5-001a", - .supply = "DBVDD", - }, { - .dev_name = "5-001a", - .supply = "AVDD2", - }, { - .dev_name = "5-001a", - .supply = "CPVDD", - }, + REGULATOR_SUPPLY("DBVDD", "5-001a"), + REGULATOR_SUPPLY("AVDD2", "5-001a"), + REGULATOR_SUPPLY("CPVDD", "5-001a"), }; static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = { - { - .dev_name = "5-001a", - .supply = "SPKVDD1", - }, { - .dev_name = "5-001a", - .supply = "SPKVDD2", - }, + REGULATOR_SUPPLY("SPKVDD1", "5-001a"), + REGULATOR_SUPPLY("SPKVDD2", "5-001a"), }; static struct regulator_init_data wm8994_fixed_voltage0_init_data = { @@ -596,15 +617,11 @@ static struct platform_device wm8994_fixed_voltage1 = { }, }; -static struct regulator_consumer_supply wm8994_avdd1_supply = { - .dev_name = "5-001a", - .supply = "AVDD1", -}; +static struct regulator_consumer_supply wm8994_avdd1_supply = + REGULATOR_SUPPLY("AVDD1", "5-001a"); -static struct regulator_consumer_supply wm8994_dcvdd_supply = { - .dev_name = "5-001a", - .supply = "DCVDD", -}; +static struct regulator_consumer_supply wm8994_dcvdd_supply = + REGULATOR_SUPPLY("DCVDD", "5-001a"); static struct regulator_init_data wm8994_ldo1_data = { .constraints = { @@ -791,6 +808,7 @@ static struct platform_device *goni_devices[] __initdata = { &goni_i2c_gpio5, &mmc2_fixed_voltage, &goni_device_gpiokeys, + &s3c_device_i2c0, &s5p_device_fimc0, &s5p_device_fimc1, &s5p_device_fimc2, @@ -820,6 +838,7 @@ static void __init goni_map_io(void) s5p_init_io(NULL, 0, S5P_VA_CHIPID); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); + s5p_set_timer_source(S5P_PWM3, S5P_PWM4); } static void __init goni_machine_init(void) @@ -827,6 +846,9 @@ static void __init goni_machine_init(void) /* Radio: call before I2C 1 registeration */ goni_radio_init(); + /* I2C0 */ + s3c_i2c0_set_platdata(NULL); + /* I2C1 */ s3c_i2c1_set_platdata(NULL); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); @@ -870,5 +892,5 @@ MACHINE_START(GONI, "GONI") .init_irq = s5pv210_init_irq, .map_io = goni_map_io, .init_machine = goni_machine_init, - .timer = &s3c24xx_timer, + .timer = &s5p_timer, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index ce11a02eabf..6c412c8cecc 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c @@ -30,6 +30,7 @@ #include <plat/ata.h> #include <plat/iic.h> #include <plat/pm.h> +#include <plat/s5p-time.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -111,6 +112,7 @@ static void __init smdkc110_map_io(void) s5p_init_io(NULL, 0, S5P_VA_CHIPID); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); + s5p_set_timer_source(S5P_PWM3, S5P_PWM4); } static void __init smdkc110_machine_init(void) @@ -138,5 +140,5 @@ MACHINE_START(SMDKC110, "SMDKC110") .init_irq = s5pv210_init_irq, .map_io = smdkc110_map_io, .init_machine = smdkc110_machine_init, - .timer = &s3c24xx_timer, + .timer = &s5p_timer, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index bc9fdb52a02..c6a9e86c2d5 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c @@ -18,6 +18,7 @@ #include <linux/fb.h> #include <linux/gpio.h> #include <linux/delay.h> +#include <linux/pwm_backlight.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -43,6 +44,7 @@ #include <plat/keypad.h> #include <plat/pm.h> #include <plat/fb.h> +#include <plat/s5p-time.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -208,6 +210,45 @@ static struct s3c_fb_platdata smdkv210_lcd0_pdata __initdata = { .setup_gpio = s5pv210_fb_gpio_setup_24bpp, }; +static int smdkv210_backlight_init(struct device *dev) +{ + int ret; + + ret = gpio_request(S5PV210_GPD0(3), "Backlight"); + if (ret) { + printk(KERN_ERR "failed to request GPD for PWM-OUT 3\n"); + return ret; + } + + /* Configure GPIO pin with S5PV210_GPD_0_3_TOUT_3 */ + s3c_gpio_cfgpin(S5PV210_GPD0(3), S3C_GPIO_SFN(2)); + + return 0; +} + +static void smdkv210_backlight_exit(struct device *dev) +{ + s3c_gpio_cfgpin(S5PV210_GPD0(3), S3C_GPIO_OUTPUT); + gpio_free(S5PV210_GPD0(3)); +} + +static struct platform_pwm_backlight_data smdkv210_backlight_data = { + .pwm_id = 3, + .max_brightness = 255, + .dft_brightness = 255, + .pwm_period_ns = 78770, + .init = smdkv210_backlight_init, + .exit = smdkv210_backlight_exit, +}; + +static struct platform_device smdkv210_backlight_device = { + .name = "pwm-backlight", + .dev = { + .parent = &s3c_device_timer[3].dev, + .platform_data = &smdkv210_backlight_data, + }, +}; + static struct platform_device *smdkv210_devices[] __initdata = { &s3c_device_adc, &s3c_device_cfcon, @@ -229,6 +270,8 @@ static struct platform_device *smdkv210_devices[] __initdata = { &samsung_device_keypad, &smdkv210_dm9000, &smdkv210_lcd_lte480wv, + &s3c_device_timer[3], + &smdkv210_backlight_device, }; static void __init smdkv210_dm9000_init(void) @@ -272,6 +315,7 @@ static void __init smdkv210_map_io(void) s5p_init_io(NULL, 0, S5P_VA_CHIPID); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); + s5p_set_timer_source(S5P_PWM2, S5P_PWM4); } static void __init smdkv210_machine_init(void) @@ -306,5 +350,5 @@ MACHINE_START(SMDKV210, "SMDKV210") .init_irq = s5pv210_init_irq, .map_io = smdkv210_map_io, .init_machine = smdkv210_machine_init, - .timer = &s3c24xx_timer, + .timer = &s5p_timer, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c index 043c938806b..925fc0dc625 100644 --- a/arch/arm/mach-s5pv210/mach-torbreck.c +++ b/arch/arm/mach-s5pv210/mach-torbreck.c @@ -27,6 +27,7 @@ #include <plat/devs.h> #include <plat/cpu.h> #include <plat/iic.h> +#include <plat/s5p-time.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -104,6 +105,7 @@ static void __init torbreck_map_io(void) s5p_init_io(NULL, 0, S5P_VA_CHIPID); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); + s5p_set_timer_source(S5P_PWM3, S5P_PWM4); } static void __init torbreck_machine_init(void) @@ -127,5 +129,5 @@ MACHINE_START(TORBRECK, "TORBRECK") .init_irq = s5pv210_init_irq, .map_io = torbreck_map_io, .init_machine = torbreck_machine_init, - .timer = &s3c24xx_timer, + .timer = &s5p_timer, MACHINE_END diff --git a/arch/arm/mach-s5pv210/setup-fimc.c b/arch/arm/mach-s5pv210/setup-fimc.c new file mode 100644 index 00000000000..54cc5b11be0 --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-fimc.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + * + * S5PV210 camera interface GPIO configuration. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/gpio.h> +#include <plat/gpio-cfg.h> +#include <plat/camport.h> + +int s5pv210_fimc_setup_gpio(enum s5p_camport_id id) +{ + u32 gpio8, gpio5; + int ret; + + switch (id) { + case S5P_CAMPORT_A: + gpio8 = S5PV210_GPE0(0); + gpio5 = S5PV210_GPE1(0); + break; + + case S5P_CAMPORT_B: + gpio8 = S5PV210_GPJ0(0); + gpio5 = S5PV210_GPJ1(0); + break; + + default: + WARN(1, "Wrong camport id: %d\n", id); + return -EINVAL; + } + + ret = s3c_gpio_cfgall_range(gpio8, 8, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_UP); + if (ret) + return ret; + + return s3c_gpio_cfgall_range(gpio5, 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_UP); +} diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c index 746777d56df..3e3ac05bb7b 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c @@ -32,10 +32,10 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) switch (width) { case 8: - /* GPG1[3:6] special-funtion 3 */ + /* GPG1[3:6] special-function 3 */ s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); case 4: - /* GPG0[3:6] special-funtion 2 */ + /* GPG0[3:6] special-function 2 */ s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); default: break; diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c index c32e202731c..a83b6c909f6 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci.c +++ b/arch/arm/mach-s5pv210/setup-sdhci.c @@ -38,7 +38,7 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, { u32 ctrl2, ctrl3; - /* don't need to alter anything acording to card-type */ + /* don't need to alter anything according to card-type */ writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); diff --git a/arch/arm/mach-s5pv210/sleep.S b/arch/arm/mach-s5pv210/sleep.S index d4d222b716b..a3d649466fb 100644 --- a/arch/arm/mach-s5pv210/sleep.S +++ b/arch/arm/mach-s5pv210/sleep.S @@ -35,50 +35,24 @@ /* s3c_cpu_save * * entry: - * r0 = save address (virtual addr of s3c_sleep_save_phys) + * r1 = v:p offset */ ENTRY(s3c_cpu_save) stmfd sp!, { r3 - r12, lr } - - mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID - mrc p15, 0, r5, c3, c0, 0 @ Domain ID - mrc p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 - mrc p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 - mrc p15, 0, r8, c2, c0, 2 @ Translation Table Control - mrc p15, 0, r9, c1, c0, 0 @ Control register - mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register - mrc p15, 0, r11, c1, c0, 2 @ Co-processor access controls - mrc p15, 0, r12, c10, c2, 0 @ Read PRRR - mrc p15, 0, r3, c10, c2, 1 @ READ NMRR - - stmia r0, { r3 - r13 } - - bl s3c_pm_cb_flushcache + ldr r3, =resume_with_mmu + bl cpu_suspend ldr r0, =pm_cpu_sleep ldr r0, [ r0 ] mov pc, r0 resume_with_mmu: - /* - * After MMU is turned on, restore the previous MMU table. - */ - ldr r9 , =(PAGE_OFFSET - PHYS_OFFSET) - add r4, r4, r9 - str r12, [r4] - ldmfd sp!, { r3 - r12, pc } .ltorg - .data - - .global s3c_sleep_save_phys -s3c_sleep_save_phys: - .word 0 - /* sleep magic, to allow the bootloader to check for an valid * image to resume to. Must be the first word before the * s3c_cpu_resume entry. @@ -96,75 +70,4 @@ s3c_sleep_save_phys: */ ENTRY(s3c_cpu_resume) - mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE - msr cpsr_c, r0 - - mov r1, #0 - mcr p15, 0, r1, c8, c7, 0 @ invalidate TLBs - mcr p15, 0, r1, c7, c5, 0 @ invalidate I Cache - - ldr r0, s3c_sleep_save_phys @ address of restore block - ldmia r0, { r3 - r13 } - - mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID - mcr p15, 0, r5, c3, c0, 0 @ Domain ID - - mcr p15, 0, r8, c2, c0, 2 @ Translation Table Control - mcr p15, 0, r7, c2, c0, 1 @ Translation Table BASE1 - mcr p15, 0, r6, c2, c0, 0 @ Translation Table BASE0 - - mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register - - mov r0, #0 - mcr p15, 0, r0, c8, c7, 0 @ Invalidate I & D TLB - - mov r0, #0 @ restore copro access - mcr p15, 0, r11, c1, c0, 2 @ Co-processor access - mcr p15, 0, r0, c7, c5, 4 - - mcr p15, 0, r12, c10, c2, 0 @ write PRRR - mcr p15, 0, r3, c10, c2, 1 @ write NMRR - - /* - * In Cortex-A8, when MMU is turned on, the pipeline is flushed. - * And there are no valid entries in the MMU table at this point. - * So before turning on the MMU, the MMU entry for the DRAM address - * range is added. After the MMU is turned on, the other entries - * in the MMU table will be restored. - */ - - /* r6 = Translation Table BASE0 */ - mov r4, r6 - mov r4, r4, LSR #14 - mov r4, r4, LSL #14 - - /* Load address for adding to MMU table list */ - ldr r11, =0xE010F000 @ INFORM0 reg. - ldr r10, [r11, #0] - mov r10, r10, LSR #18 - bic r10, r10, #0x3 - orr r4, r4, r10 - - /* Calculate MMU table entry */ - mov r10, r10, LSL #18 - ldr r5, =0x40E - orr r10, r10, r5 - - /* Back up originally data */ - ldr r12, [r4] - - /* Add calculated MMU table entry into MMU table list */ - str r10, [r4] - - ldr r2, =resume_with_mmu - mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, etc - - nop - nop - nop - nop - nop @ second-to-last before mmu - - mov pc, r2 @ go back to virtual address - - .ltorg + b cpu_resume |