diff options
Diffstat (limited to 'arch/arm/mach-spear3xx/spear310.c')
| -rw-r--r-- | arch/arm/mach-spear3xx/spear310.c | 92 |
1 files changed, 46 insertions, 46 deletions
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index e4fce3f1042..826c166a76a 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c @@ -142,115 +142,115 @@ struct pmx_driver pmx_driver = { /* spear3xx shared irq */ static struct shirq_dev_config shirq_ras1_config[] = { { - .virq = VIRQ_SMII0, - .status_mask = SMII0_IRQ_MASK, + .virq = SPEAR310_VIRQ_SMII0, + .status_mask = SPEAR310_SMII0_IRQ_MASK, }, { - .virq = VIRQ_SMII1, - .status_mask = SMII1_IRQ_MASK, + .virq = SPEAR310_VIRQ_SMII1, + .status_mask = SPEAR310_SMII1_IRQ_MASK, }, { - .virq = VIRQ_SMII2, - .status_mask = SMII2_IRQ_MASK, + .virq = SPEAR310_VIRQ_SMII2, + .status_mask = SPEAR310_SMII2_IRQ_MASK, }, { - .virq = VIRQ_SMII3, - .status_mask = SMII3_IRQ_MASK, + .virq = SPEAR310_VIRQ_SMII3, + .status_mask = SPEAR310_SMII3_IRQ_MASK, }, { - .virq = VIRQ_WAKEUP_SMII0, - .status_mask = WAKEUP_SMII0_IRQ_MASK, + .virq = SPEAR310_VIRQ_WAKEUP_SMII0, + .status_mask = SPEAR310_WAKEUP_SMII0_IRQ_MASK, }, { - .virq = VIRQ_WAKEUP_SMII1, - .status_mask = WAKEUP_SMII1_IRQ_MASK, + .virq = SPEAR310_VIRQ_WAKEUP_SMII1, + .status_mask = SPEAR310_WAKEUP_SMII1_IRQ_MASK, }, { - .virq = VIRQ_WAKEUP_SMII2, - .status_mask = WAKEUP_SMII2_IRQ_MASK, + .virq = SPEAR310_VIRQ_WAKEUP_SMII2, + .status_mask = SPEAR310_WAKEUP_SMII2_IRQ_MASK, }, { - .virq = VIRQ_WAKEUP_SMII3, - .status_mask = WAKEUP_SMII3_IRQ_MASK, + .virq = SPEAR310_VIRQ_WAKEUP_SMII3, + .status_mask = SPEAR310_WAKEUP_SMII3_IRQ_MASK, }, }; static struct spear_shirq shirq_ras1 = { - .irq = IRQ_GEN_RAS_1, + .irq = SPEAR3XX_IRQ_GEN_RAS_1, .dev_config = shirq_ras1_config, .dev_count = ARRAY_SIZE(shirq_ras1_config), .regs = { .enb_reg = -1, - .status_reg = INT_STS_MASK_REG, - .status_reg_mask = SHIRQ_RAS1_MASK, + .status_reg = SPEAR310_INT_STS_MASK_REG, + .status_reg_mask = SPEAR310_SHIRQ_RAS1_MASK, .clear_reg = -1, }, }; static struct shirq_dev_config shirq_ras2_config[] = { { - .virq = VIRQ_UART1, - .status_mask = UART1_IRQ_MASK, + .virq = SPEAR310_VIRQ_UART1, + .status_mask = SPEAR310_UART1_IRQ_MASK, }, { - .virq = VIRQ_UART2, - .status_mask = UART2_IRQ_MASK, + .virq = SPEAR310_VIRQ_UART2, + .status_mask = SPEAR310_UART2_IRQ_MASK, }, { - .virq = VIRQ_UART3, - .status_mask = UART3_IRQ_MASK, + .virq = SPEAR310_VIRQ_UART3, + .status_mask = SPEAR310_UART3_IRQ_MASK, }, { - .virq = VIRQ_UART4, - .status_mask = UART4_IRQ_MASK, + .virq = SPEAR310_VIRQ_UART4, + .status_mask = SPEAR310_UART4_IRQ_MASK, }, { - .virq = VIRQ_UART5, - .status_mask = UART5_IRQ_MASK, + .virq = SPEAR310_VIRQ_UART5, + .status_mask = SPEAR310_UART5_IRQ_MASK, }, }; static struct spear_shirq shirq_ras2 = { - .irq = IRQ_GEN_RAS_2, + .irq = SPEAR3XX_IRQ_GEN_RAS_2, .dev_config = shirq_ras2_config, .dev_count = ARRAY_SIZE(shirq_ras2_config), .regs = { .enb_reg = -1, - .status_reg = INT_STS_MASK_REG, - .status_reg_mask = SHIRQ_RAS2_MASK, + .status_reg = SPEAR310_INT_STS_MASK_REG, + .status_reg_mask = SPEAR310_SHIRQ_RAS2_MASK, .clear_reg = -1, }, }; static struct shirq_dev_config shirq_ras3_config[] = { { - .virq = VIRQ_EMI, - .status_mask = EMI_IRQ_MASK, + .virq = SPEAR310_VIRQ_EMI, + .status_mask = SPEAR310_EMI_IRQ_MASK, }, }; static struct spear_shirq shirq_ras3 = { - .irq = IRQ_GEN_RAS_3, + .irq = SPEAR3XX_IRQ_GEN_RAS_3, .dev_config = shirq_ras3_config, .dev_count = ARRAY_SIZE(shirq_ras3_config), .regs = { .enb_reg = -1, - .status_reg = INT_STS_MASK_REG, - .status_reg_mask = SHIRQ_RAS3_MASK, + .status_reg = SPEAR310_INT_STS_MASK_REG, + .status_reg_mask = SPEAR310_SHIRQ_RAS3_MASK, .clear_reg = -1, }, }; static struct shirq_dev_config shirq_intrcomm_ras_config[] = { { - .virq = VIRQ_TDM_HDLC, - .status_mask = TDM_HDLC_IRQ_MASK, + .virq = SPEAR310_VIRQ_TDM_HDLC, + .status_mask = SPEAR310_TDM_HDLC_IRQ_MASK, }, { - .virq = VIRQ_RS485_0, - .status_mask = RS485_0_IRQ_MASK, + .virq = SPEAR310_VIRQ_RS485_0, + .status_mask = SPEAR310_RS485_0_IRQ_MASK, }, { - .virq = VIRQ_RS485_1, - .status_mask = RS485_1_IRQ_MASK, + .virq = SPEAR310_VIRQ_RS485_1, + .status_mask = SPEAR310_RS485_1_IRQ_MASK, }, }; static struct spear_shirq shirq_intrcomm_ras = { - .irq = IRQ_INTRCOMM_RAS_ARM, + .irq = SPEAR3XX_IRQ_INTRCOMM_RAS_ARM, .dev_config = shirq_intrcomm_ras_config, .dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config), .regs = { .enb_reg = -1, - .status_reg = INT_STS_MASK_REG, - .status_reg_mask = SHIRQ_INTRCOMM_RAS_MASK, + .status_reg = SPEAR310_INT_STS_MASK_REG, + .status_reg_mask = SPEAR310_SHIRQ_INTRCOMM_RAS_MASK, .clear_reg = -1, }, }; |