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-rw-r--r--arch/arm/mach-spear3xx/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-spear3xx/spear300_evb.c2
-rw-r--r--arch/arm/mach-spear3xx/spear310_evb.c2
-rw-r--r--arch/arm/mach-spear3xx/spear320_evb.c2
4 files changed, 6 insertions, 27 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da4224ba3..de3bb41c8e9 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
* warranty of any kind, whether express or implied.
*/
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
- teq \irqstat, #0
- beq 1001f @ this will set/reset
- @ zero register
- /*
- * Following code will find bit position of least significang
- * bit set in irqstat, using following equation
- * least significant bit set in n = (n & ~(n-1))
- */
- sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
- mvn \tmp, \tmp @ tmp = ~tmp
- and \irqstat, \irqstat, \tmp @ irqstat &= tmp
- /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
- clz \tmp, \irqstat @ tmp = leading zeros
- rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
-
-1001: /* EQ will be set if no irqs pending */
- .endm
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index a5ff98eed1d..61068ba6792 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
.atag_offset = 0x100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear300_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 45d180d5936..7903abe92bf 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
.atag_offset = 0x100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear310_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 22879848d73..e9751f97093 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
.atag_offset = 0x100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear320_evb_init,
MACHINE_END