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-rw-r--r--arch/arm/mach-tegra/Kconfig6
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra114.c4
-rw-r--r--arch/arm/mach-tegra/board.h2
-rw-r--r--arch/arm/mach-tegra/common.c25
-rw-r--r--arch/arm/mach-tegra/cpu-tegra.c3
-rw-r--r--arch/arm/mach-tegra/headsmp.S43
-rw-r--r--arch/arm/mach-tegra/include/mach/uncompress.h4
-rw-r--r--arch/arm/mach-tegra/tegra2_emc.c8
8 files changed, 26 insertions, 69 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index bde8197c8db..d1c4893894c 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -5,7 +5,6 @@ comment "NVIDIA Tegra options"
config ARCH_TEGRA_2x_SOC
bool "Enable support for Tegra20 family"
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
- select ARCH_REQUIRE_GPIOLIB
select ARM_ERRATA_720789
select ARM_ERRATA_742230 if SMP
select ARM_ERRATA_751472
@@ -27,7 +26,6 @@ config ARCH_TEGRA_2x_SOC
config ARCH_TEGRA_3x_SOC
bool "Enable support for Tegra30 family"
- select ARCH_REQUIRE_GPIOLIB
select ARM_ERRATA_743622
select ARM_ERRATA_751472
select ARM_ERRATA_754322
@@ -47,10 +45,10 @@ config ARCH_TEGRA_3x_SOC
config ARCH_TEGRA_114_SOC
bool "Enable support for Tegra114 family"
+ select ARM_ARCH_TIMER
select ARM_GIC
- select CPU_V7
select ARM_L1_CACHE_SHIFT_6
- select ARM_ARCH_TIMER
+ select CPU_V7
select PINCTRL
select PINCTRL_TEGRA114
help
diff --git a/arch/arm/mach-tegra/board-dt-tegra114.c b/arch/arm/mach-tegra/board-dt-tegra114.c
index 3ed17ce884d..085d63637b6 100644
--- a/arch/arm/mach-tegra/board-dt-tegra114.c
+++ b/arch/arm/mach-tegra/board-dt-tegra114.c
@@ -19,7 +19,6 @@
#include <linux/clocksource.h>
#include <asm/mach/arch.h>
-#include <asm/hardware/gic.h>
#include "board.h"
#include "common.h"
@@ -37,9 +36,8 @@ static const char * const tegra114_dt_board_compat[] = {
DT_MACHINE_START(TEGRA114_DT, "NVIDIA Tegra114 (Flattened Device Tree)")
.smp = smp_ops(tegra_smp_ops),
.map_io = tegra_map_common_io,
- .init_early = tegra30_init_early,
+ .init_early = tegra114_init_early,
.init_irq = tegra_dt_init_irq,
- .handle_irq = gic_handle_irq,
.init_time = clocksource_of_init,
.init_machine = tegra114_dt_init,
.init_late = tegra_init_late,
diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h
index da8f5a3c424..86851c81a35 100644
--- a/arch/arm/mach-tegra/board.h
+++ b/arch/arm/mach-tegra/board.h
@@ -1,6 +1,7 @@
/*
* arch/arm/mach-tegra/board.h
*
+ * Copyright (c) 2013 NVIDIA Corporation. All rights reserved.
* Copyright (C) 2010 Google, Inc.
*
* Author:
@@ -27,6 +28,7 @@ void tegra_assert_system_reset(char mode, const char *cmd);
void __init tegra20_init_early(void);
void __init tegra30_init_early(void);
+void __init tegra114_init_early(void);
void __init tegra_map_common_io(void);
void __init tegra_init_irq(void);
void __init tegra_dt_init_irq(void);
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 46c071861c4..5449a3f2977 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -1,6 +1,7 @@
/*
* arch/arm/mach-tegra/common.c
*
+ * Copyright (c) 2013 NVIDIA Corporation. All rights reserved.
* Copyright (C) 2010 Google, Inc.
*
* Author:
@@ -93,8 +94,7 @@ static void __init tegra_init_cache(void)
}
-#ifdef CONFIG_ARCH_TEGRA_2x_SOC
-void __init tegra20_init_early(void)
+static void __init tegra_init_early(void)
{
tegra_cpu_reset_handler_init();
tegra_apb_io_init();
@@ -102,22 +102,31 @@ void __init tegra20_init_early(void)
tegra_init_cache();
tegra_pmc_init();
tegra_powergate_init();
+}
+
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+void __init tegra20_init_early(void)
+{
+ tegra_init_early();
tegra20_hotplug_init();
}
#endif
+
#ifdef CONFIG_ARCH_TEGRA_3x_SOC
void __init tegra30_init_early(void)
{
- tegra_cpu_reset_handler_init();
- tegra_apb_io_init();
- tegra_init_fuse();
- tegra_init_cache();
- tegra_pmc_init();
- tegra_powergate_init();
+ tegra_init_early();
tegra30_hotplug_init();
}
#endif
+#ifdef CONFIG_ARCH_TEGRA_114_SOC
+void __init tegra114_init_early(void)
+{
+ tegra_init_early();
+}
+#endif
+
void __init tegra_init_late(void)
{
tegra_powergate_debugfs_init();
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index ebffed67e2f..e3d6e15ff18 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -225,8 +225,7 @@ static int tegra_cpu_init(struct cpufreq_policy *policy)
/* FIXME: what's the actual transition time? */
policy->cpuinfo.transition_latency = 300 * 1000;
- policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
- cpumask_copy(policy->related_cpus, cpu_possible_mask);
+ cpumask_copy(policy->cpus, cpu_possible_mask);
if (policy->cpu == 0)
register_pm_notifier(&tegra_cpu_pm_notifier);
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
index b2834810b02..fd473f2b4c3 100644
--- a/arch/arm/mach-tegra/headsmp.S
+++ b/arch/arm/mach-tegra/headsmp.S
@@ -5,49 +5,6 @@
.section ".text.head", "ax"
-/*
- * Tegra specific entry point for secondary CPUs.
- * The secondary kernel init calls v7_flush_dcache_all before it enables
- * the L1; however, the L1 comes out of reset in an undefined state, so
- * the clean + invalidate performed by v7_flush_dcache_all causes a bunch
- * of cache lines with uninitialized data and uninitialized tags to get
- * written out to memory, which does really unpleasant things to the main
- * processor. We fix this by performing an invalidate, rather than a
- * clean + invalidate, before jumping into the kernel.
- */
-ENTRY(v7_invalidate_l1)
- mov r0, #0
- mcr p15, 2, r0, c0, c0, 0
- mrc p15, 1, r0, c0, c0, 0
-
- ldr r1, =0x7fff
- and r2, r1, r0, lsr #13
-
- ldr r1, =0x3ff
-
- and r3, r1, r0, lsr #3 @ NumWays - 1
- add r2, r2, #1 @ NumSets
-
- and r0, r0, #0x7
- add r0, r0, #4 @ SetShift
-
- clz r1, r3 @ WayShift
- add r4, r3, #1 @ NumWays
-1: sub r2, r2, #1 @ NumSets--
- mov r3, r4 @ Temp = NumWays
-2: subs r3, r3, #1 @ Temp--
- mov r5, r3, lsl r1
- mov r6, r2, lsl r0
- orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
- mcr p15, 0, r5, c7, c6, 2
- bgt 2b
- cmp r2, #0
- bgt 1b
- dsb
- isb
- mov pc, lr
-ENDPROC(v7_invalidate_l1)
-
ENTRY(tegra_secondary_startup)
bl v7_invalidate_l1
/* Enable coresight */
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 485003f9b63..08386418196 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -172,8 +172,4 @@ static inline void arch_decomp_setup(void)
uart[UART_LCR << DEBUG_UART_SHIFT] = 3;
}
-static inline void arch_decomp_wdog(void)
-{
-}
-
#endif
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index e18aa2f83eb..ce7ce42a1ac 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -312,11 +312,9 @@ static int tegra_emc_probe(struct platform_device *pdev)
return -ENOMEM;
}
- emc_regbase = devm_request_and_ioremap(&pdev->dev, res);
- if (!emc_regbase) {
- dev_err(&pdev->dev, "failed to remap registers\n");
- return -ENOMEM;
- }
+ emc_regbase = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(emc_regbase))
+ return PTR_ERR(emc_regbase);
pdata = pdev->dev.platform_data;
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-01-08 09:21:57 +0000