diff options
Diffstat (limited to 'arch/arm/mach-tegra')
| -rw-r--r-- | arch/arm/mach-tegra/Kconfig | 12 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle-tegra114.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/platsmp.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/pm.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/pmc.c | 24 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/powergate.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/reset-handler.S | 11 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/sleep.h | 31 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra.c | 32 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_emc.c | 347 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_emc.h | 24 |
12 files changed, 39 insertions, 456 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 4926bd11f19..e16999e5b73 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -5,23 +5,14 @@ config ARCH_TEGRA select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS select ARM_GIC select CLKSRC_MMIO - select CLKSRC_OF - select COMMON_CLK - select CPU_V7 - select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP - select HAVE_SMP - select MIGHT_HAVE_CACHE_L2X0 - select MIGHT_HAVE_PCI select PINCTRL select ARCH_HAS_RESET_CONTROLLER select RESET_CONTROLLER select SOC_BUS - select SPARSE_IRQ select USB_ULPI if USB_PHY select USB_ULPI_VIEWPORT if USB_PHY - select USE_OF help This enables support for NVIDIA Tegra based systems. @@ -78,7 +69,4 @@ config TEGRA_AHB which controls AHB bus master arbitration and some performance parameters(priority, prefech size). -config TEGRA_EMC_SCALING_ENABLE - bool "Enable scaling the memory frequency" - endmenu diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 019bb175866..6fbfbb77dcd 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -14,7 +14,6 @@ obj-y += sleep.o obj-y += tegra.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o ifeq ($(CONFIG_CPU_IDLE),y) diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index e0b87300243..b5fb7c110c6 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -19,6 +19,7 @@ #include <linux/cpuidle.h> #include <linux/cpu_pm.h> #include <linux/clockchips.h> +#include <asm/firmware.h> #include <asm/cpuidle.h> #include <asm/suspend.h> @@ -45,7 +46,11 @@ static int tegra114_idle_power_down(struct cpuidle_device *dev, clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu); - cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); + call_firmware_op(prepare_idle); + + /* Do suspend by ourselves if the firmware does not implement it */ + if (call_firmware_op(do_idle) == -ENOSYS) + cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu); diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index eb72ae70912..929d1046e2b 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -114,7 +114,7 @@ static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle) /* Wait for the power to come up. */ timeout = jiffies + msecs_to_jiffies(100); - while (tegra_pmc_cpu_is_powered(cpu)) { + while (!tegra_pmc_cpu_is_powered(cpu)) { if (time_after(jiffies, timeout)) return -ETIMEDOUT; udelay(10); diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 6e92a7c2ecb..f4a89698e5b 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -35,8 +35,6 @@ void tegra20_sleep_core_init(void); void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); -extern unsigned long l2x0_saved_regs_addr; - void tegra_clear_cpu_in_lp2(void); bool tegra_set_cpu_in_lp2(void); diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c index fb7920201ab..7c7123e7557 100644 --- a/arch/arm/mach-tegra/pmc.c +++ b/arch/arm/mach-tegra/pmc.c @@ -41,6 +41,14 @@ #define PMC_REMOVE_CLAMPING 0x34 #define PMC_PWRGATE_STATUS 0x38 +#define PMC_SCRATCH0 0x50 +#define PMC_SCRATCH0_MODE_RECOVERY (1 << 31) +#define PMC_SCRATCH0_MODE_BOOTLOADER (1 << 30) +#define PMC_SCRATCH0_MODE_RCM (1 << 1) +#define PMC_SCRATCH0_MODE_MASK (PMC_SCRATCH0_MODE_RECOVERY | \ + PMC_SCRATCH0_MODE_BOOTLOADER | \ + PMC_SCRATCH0_MODE_RCM) + #define PMC_CPUPWRGOOD_TIMER 0xc8 #define PMC_CPUPWROFF_TIMER 0xcc @@ -165,6 +173,22 @@ void tegra_pmc_restart(enum reboot_mode mode, const char *cmd) { u32 val; + val = tegra_pmc_readl(PMC_SCRATCH0); + val &= ~PMC_SCRATCH0_MODE_MASK; + + if (cmd) { + if (strcmp(cmd, "recovery") == 0) + val |= PMC_SCRATCH0_MODE_RECOVERY; + + if (strcmp(cmd, "bootloader") == 0) + val |= PMC_SCRATCH0_MODE_BOOTLOADER; + + if (strcmp(cmd, "forced-recovery") == 0) + val |= PMC_SCRATCH0_MODE_RCM; + } + + tegra_pmc_writel(val, PMC_SCRATCH0); + val = tegra_pmc_readl(0); val |= 0x10; tegra_pmc_writel(val, 0); diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index 3d0c537d9b9..4cefc5cd6be 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -484,6 +484,7 @@ int tegra_io_rail_power_on(int id) return 0; } +EXPORT_SYMBOL(tegra_io_rail_power_on); int tegra_io_rail_power_off(int id) { @@ -511,3 +512,4 @@ int tegra_io_rail_power_off(int id) return 0; } +EXPORT_SYMBOL(tegra_io_rail_power_off); diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 8c1ba4fea38..578d4d1ad64 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -19,7 +19,6 @@ #include <asm/cache.h> #include <asm/asm-offsets.h> -#include <asm/hardware/cache-l2x0.h> #include "flowctrl.h" #include "fuse.h" @@ -78,8 +77,10 @@ ENTRY(tegra_resume) str r1, [r0] #endif +#ifdef CONFIG_CACHE_L2X0 /* L2 cache resume & re-enable */ - l2_cache_resume r0, r1, r2, l2x0_saved_regs_addr + bl l2c310_early_resume +#endif end_ca9_scu_l2_resume: mov32 r9, 0xc0f cmp r8, r9 @@ -89,12 +90,6 @@ end_ca9_scu_l2_resume: ENDPROC(tegra_resume) #endif -#ifdef CONFIG_CACHE_L2X0 - .globl l2x0_saved_regs_addr -l2x0_saved_regs_addr: - .long 0 -#endif - .align L1_CACHE_SHIFT ENTRY(__tegra_cpu_reset_handler_start) diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index a4edbb3abd3..339fe42cd6f 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -120,37 +120,6 @@ mov \tmp1, \tmp1, lsr #8 .endm -/* Macro to resume & re-enable L2 cache */ -#ifndef L2X0_CTRL_EN -#define L2X0_CTRL_EN 1 -#endif - -#ifdef CONFIG_CACHE_L2X0 -.macro l2_cache_resume, tmp1, tmp2, tmp3, phys_l2x0_saved_regs - W(adr) \tmp1, \phys_l2x0_saved_regs - ldr \tmp1, [\tmp1] - ldr \tmp2, [\tmp1, #L2X0_R_PHY_BASE] - ldr \tmp3, [\tmp2, #L2X0_CTRL] - tst \tmp3, #L2X0_CTRL_EN - bne exit_l2_resume - ldr \tmp3, [\tmp1, #L2X0_R_TAG_LATENCY] - str \tmp3, [\tmp2, #L2X0_TAG_LATENCY_CTRL] - ldr \tmp3, [\tmp1, #L2X0_R_DATA_LATENCY] - str \tmp3, [\tmp2, #L2X0_DATA_LATENCY_CTRL] - ldr \tmp3, [\tmp1, #L2X0_R_PREFETCH_CTRL] - str \tmp3, [\tmp2, #L2X0_PREFETCH_CTRL] - ldr \tmp3, [\tmp1, #L2X0_R_PWR_CTRL] - str \tmp3, [\tmp2, #L2X0_POWER_CTRL] - ldr \tmp3, [\tmp1, #L2X0_R_AUX_CTRL] - str \tmp3, [\tmp2, #L2X0_AUX_CTRL] - mov \tmp3, #L2X0_CTRL_EN - str \tmp3, [\tmp2, #L2X0_CTRL] -exit_l2_resume: -.endm -#else /* CONFIG_CACHE_L2X0 */ -.macro l2_cache_resume, tmp1, tmp2, tmp3, phys_l2x0_saved_regs -.endm -#endif /* CONFIG_CACHE_L2X0 */ #else void tegra_pen_lock(void); void tegra_pen_unlock(void); diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 6191603379e..15ac9fcc96b 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -70,40 +70,12 @@ u32 tegra_uart_config[3] = { 0, }; -static void __init tegra_init_cache(void) -{ -#ifdef CONFIG_CACHE_L2X0 - static const struct of_device_id pl310_ids[] __initconst = { - { .compatible = "arm,pl310-cache", }, - {} - }; - - struct device_node *np; - int ret; - void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; - u32 aux_ctrl, cache_type; - - np = of_find_matching_node(NULL, pl310_ids); - if (!np) - return; - - cache_type = readl(p + L2X0_CACHE_TYPE); - aux_ctrl = (cache_type & 0x700) << (17-8); - aux_ctrl |= 0x7C400001; - - ret = l2x0_of_init(aux_ctrl, 0x8200c3fe); - if (!ret) - l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs); -#endif -} - static void __init tegra_init_early(void) { of_register_trusted_foundations(); tegra_apb_io_init(); tegra_init_fuse(); tegra_cpu_reset_handler_init(); - tegra_init_cache(); tegra_powergate_init(); tegra_hotplug_init(); } @@ -191,8 +163,10 @@ static const char * const tegra_dt_board_compat[] = { }; DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)") - .map_io = tegra_map_common_io, + .l2c_aux_val = 0x3c400001, + .l2c_aux_mask = 0xc20fc3fe, .smp = smp_ops(tegra_smp_ops), + .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_dt_init_irq, .init_machine = tegra_dt_init, diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c deleted file mode 100644 index 3ae4a7f1a2f..00000000000 --- a/arch/arm/mach-tegra/tegra2_emc.c +++ /dev/null @@ -1,347 +0,0 @@ -/* - * Copyright (C) 2011 Google, Inc. - * - * Author: - * Colin Cross <ccross@android.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/module.h> -#include <linux/of.h> -#include <linux/platform_device.h> -#include <linux/platform_data/tegra_emc.h> - -#include "tegra2_emc.h" -#include "fuse.h" - -#ifdef CONFIG_TEGRA_EMC_SCALING_ENABLE -static bool emc_enable = true; -#else -static bool emc_enable; -#endif -module_param(emc_enable, bool, 0644); - -static struct platform_device *emc_pdev; -static void __iomem *emc_regbase; - -static inline void emc_writel(u32 val, unsigned long addr) -{ - writel(val, emc_regbase + addr); -} - -static inline u32 emc_readl(unsigned long addr) -{ - return readl(emc_regbase + addr); -} - -static const unsigned long emc_reg_addr[TEGRA_EMC_NUM_REGS] = { - 0x2c, /* RC */ - 0x30, /* RFC */ - 0x34, /* RAS */ - 0x38, /* RP */ - 0x3c, /* R2W */ - 0x40, /* W2R */ - 0x44, /* R2P */ - 0x48, /* W2P */ - 0x4c, /* RD_RCD */ - 0x50, /* WR_RCD */ - 0x54, /* RRD */ - 0x58, /* REXT */ - 0x5c, /* WDV */ - 0x60, /* QUSE */ - 0x64, /* QRST */ - 0x68, /* QSAFE */ - 0x6c, /* RDV */ - 0x70, /* REFRESH */ - 0x74, /* BURST_REFRESH_NUM */ - 0x78, /* PDEX2WR */ - 0x7c, /* PDEX2RD */ - 0x80, /* PCHG2PDEN */ - 0x84, /* ACT2PDEN */ - 0x88, /* AR2PDEN */ - 0x8c, /* RW2PDEN */ - 0x90, /* TXSR */ - 0x94, /* TCKE */ - 0x98, /* TFAW */ - 0x9c, /* TRPAB */ - 0xa0, /* TCLKSTABLE */ - 0xa4, /* TCLKSTOP */ - 0xa8, /* TREFBW */ - 0xac, /* QUSE_EXTRA */ - 0x114, /* FBIO_CFG6 */ - 0xb0, /* ODT_WRITE */ - 0xb4, /* ODT_READ */ - 0x104, /* FBIO_CFG5 */ - 0x2bc, /* CFG_DIG_DLL */ - 0x2c0, /* DLL_XFORM_DQS */ - 0x2c4, /* DLL_XFORM_QUSE */ - 0x2e0, /* ZCAL_REF_CNT */ - 0x2e4, /* ZCAL_WAIT_CNT */ - 0x2a8, /* AUTO_CAL_INTERVAL */ - 0x2d0, /* CFG_CLKTRIM_0 */ - 0x2d4, /* CFG_CLKTRIM_1 */ - 0x2d8, /* CFG_CLKTRIM_2 */ -}; - -/* Select the closest EMC rate that is higher than the requested rate */ -long tegra_emc_round_rate(unsigned long rate) -{ - struct tegra_emc_pdata *pdata; - int i; - int best = -1; - unsigned long distance = ULONG_MAX; - - if (!emc_pdev) - return -EINVAL; - - pdata = emc_pdev->dev.platform_data; - - pr_debug("%s: %lu\n", __func__, rate); - - /* - * The EMC clock rate is twice the bus rate, and the bus rate is - * measured in kHz - */ - rate = rate / 2 / 1000; - - for (i = 0; i < pdata->num_tables; i++) { - if (pdata->tables[i].rate >= rate && - (pdata->tables[i].rate - rate) < distance) { - distance = pdata->tables[i].rate - rate; - best = i; - } - } - - if (best < 0) - return -EINVAL; - - pr_debug("%s: using %lu\n", __func__, pdata->tables[best].rate); - - return pdata->tables[best].rate * 2 * 1000; -} - -/* - * The EMC registers have shadow registers. When the EMC clock is updated - * in the clock controller, the shadow registers are copied to the active - * registers, allowing glitchless memory bus frequency changes. - * This function updates the shadow registers for a new clock frequency, - * and relies on the clock lock on the emc clock to avoid races between - * multiple frequency changes - */ -int tegra_emc_set_rate(unsigned long rate) -{ - struct tegra_emc_pdata *pdata; - int i; - int j; - - if (!emc_pdev) - return -EINVAL; - - pdata = emc_pdev->dev.platform_data; - - /* - * The EMC clock rate is twice the bus rate, and the bus rate is - * measured in kHz - */ - rate = rate / 2 / 1000; - - for (i = 0; i < pdata->num_tables; i++) - if (pdata->tables[i].rate == rate) - break; - - if (i >= pdata->num_tables) - return -EINVAL; - - pr_debug("%s: setting to %lu\n", __func__, rate); - - for (j = 0; j < TEGRA_EMC_NUM_REGS; j++) - emc_writel(pdata->tables[i].regs[j], emc_reg_addr[j]); - - emc_readl(pdata->tables[i].regs[TEGRA_EMC_NUM_REGS - 1]); - - return 0; -} - -#ifdef CONFIG_OF -static struct device_node *tegra_emc_ramcode_devnode(struct device_node *np) -{ - struct device_node *iter; - u32 reg; - - for_each_child_of_node(np, iter) { - if (of_property_read_u32(iter, "nvidia,ram-code", ®)) - continue; - if (reg == tegra_bct_strapping) - return of_node_get(iter); - } - - return NULL; -} - -static struct tegra_emc_pdata *tegra_emc_dt_parse_pdata( - struct platform_device *pdev) -{ - struct device_node *np = pdev->dev.of_node; - struct device_node *tnp, *iter; - struct tegra_emc_pdata *pdata; - int ret, i, num_tables; - - if (!np) - return NULL; - - if (of_find_property(np, "nvidia,use-ram-code", NULL)) { - tnp = tegra_emc_ramcode_devnode(np); - if (!tnp) - dev_warn(&pdev->dev, - "can't find emc table for ram-code 0x%02x\n", - tegra_bct_strapping); - } else - tnp = of_node_get(np); - - if (!tnp) - return NULL; - - num_tables = 0; - for_each_child_of_node(tnp, iter) - if (of_device_is_compatible(iter, "nvidia,tegra20-emc-table")) - num_tables++; - - if (!num_tables) { - pdata = NULL; - goto out; - } - - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - pdata->tables = devm_kzalloc(&pdev->dev, - sizeof(*pdata->tables) * num_tables, - GFP_KERNEL); - - i = 0; - for_each_child_of_node(tnp, iter) { - u32 prop; - - ret = of_property_read_u32(iter, "clock-frequency", &prop); - if (ret) { - dev_err(&pdev->dev, "no clock-frequency in %s\n", - iter->full_name); - continue; - } - pdata->tables[i].rate = prop; - - ret = of_property_read_u32_array(iter, "nvidia,emc-registers", - pdata->tables[i].regs, - TEGRA_EMC_NUM_REGS); - if (ret) { - dev_err(&pdev->dev, - "malformed emc-registers property in %s\n", - iter->full_name); - continue; - } - - i++; - } - pdata->num_tables = i; - -out: - of_node_put(tnp); - return pdata; -} -#else -static struct tegra_emc_pdata *tegra_emc_dt_parse_pdata( - struct platform_device *pdev) -{ - return NULL; -} -#endif - -static struct tegra_emc_pdata *tegra_emc_fill_pdata(struct platform_device *pdev) -{ - struct clk *c = clk_get_sys(NULL, "emc"); - struct tegra_emc_pdata *pdata; - unsigned long khz; - int i; - - WARN_ON(pdev->dev.platform_data); - BUG_ON(IS_ERR(c)); - - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - pdata->tables = devm_kzalloc(&pdev->dev, sizeof(*pdata->tables), - GFP_KERNEL); - - pdata->tables[0].rate = clk_get_rate(c) / 2 / 1000; - - for (i = 0; i < TEGRA_EMC_NUM_REGS; i++) - pdata->tables[0].regs[i] = emc_readl(emc_reg_addr[i]); - - pdata->num_tables = 1; - - khz = pdata->tables[0].rate; - dev_info(&pdev->dev, "no tables provided, using %ld kHz emc, " - "%ld kHz mem\n", khz * 2, khz); - - return pdata; -} - -static int tegra_emc_probe(struct platform_device *pdev) -{ - struct tegra_emc_pdata *pdata; - struct resource *res; - - if (!emc_enable) { - dev_err(&pdev->dev, "disabled per module parameter\n"); - return -ENODEV; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - emc_regbase = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(emc_regbase)) - return PTR_ERR(emc_regbase); - - pdata = pdev->dev.platform_data; - - if (!pdata) - pdata = tegra_emc_dt_parse_pdata(pdev); - - if (!pdata) - pdata = tegra_emc_fill_pdata(pdev); - - pdev->dev.platform_data = pdata; - - emc_pdev = pdev; - - return 0; -} - -static struct of_device_id tegra_emc_of_match[] = { - { .compatible = "nvidia,tegra20-emc", }, - { }, -}; - -static struct platform_driver tegra_emc_driver = { - .driver = { - .name = "tegra-emc", - .owner = THIS_MODULE, - .of_match_table = tegra_emc_of_match, - }, - .probe = tegra_emc_probe, -}; - -static int __init tegra_emc_init(void) -{ - return platform_driver_register(&tegra_emc_driver); -} -device_initcall(tegra_emc_init); diff --git a/arch/arm/mach-tegra/tegra2_emc.h b/arch/arm/mach-tegra/tegra2_emc.h deleted file mode 100644 index f61409b54cb..00000000000 --- a/arch/arm/mach-tegra/tegra2_emc.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2011 Google, Inc. - * - * Author: - * Colin Cross <ccross@android.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_TEGRA2_EMC_H_ -#define __MACH_TEGRA_TEGRA2_EMC_H - -int tegra_emc_set_rate(unsigned long rate); -long tegra_emc_round_rate(unsigned long rate); - -#endif |