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-rw-r--r--arch/arm/plat-omap/include/plat/mux.h226
1 files changed, 2 insertions, 224 deletions
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h
index ba77de60150..6067cf79f08 100644
--- a/arch/arm/plat-omap/include/plat/mux.h
+++ b/arch/arm/plat-omap/include/plat/mux.h
@@ -130,58 +130,11 @@
#define OMAP2_PULL_UP (1 << 4)
#define OMAP2_ALTELECTRICALSEL (1 << 5)
-/* 34xx specific mux bit defines */
-#define OMAP3_INPUT_EN (1 << 8)
-#define OMAP3_OFF_EN (1 << 9)
-#define OMAP3_OFFOUT_EN (1 << 10)
-#define OMAP3_OFFOUT_VAL (1 << 11)
-#define OMAP3_OFF_PULL_EN (1 << 12)
-#define OMAP3_OFF_PULL_UP (1 << 13)
-#define OMAP3_WAKEUP_EN (1 << 14)
-
-/* 34xx mux mode options for each pin. See TRM for options */
-#define OMAP34XX_MUX_MODE0 0
-#define OMAP34XX_MUX_MODE1 1
-#define OMAP34XX_MUX_MODE2 2
-#define OMAP34XX_MUX_MODE3 3
-#define OMAP34XX_MUX_MODE4 4
-#define OMAP34XX_MUX_MODE5 5
-#define OMAP34XX_MUX_MODE6 6
-#define OMAP34XX_MUX_MODE7 7
-
-/* 34xx active pin states */
-#define OMAP34XX_PIN_OUTPUT 0
-#define OMAP34XX_PIN_INPUT OMAP3_INPUT_EN
-#define OMAP34XX_PIN_INPUT_PULLUP (OMAP2_PULL_ENA | OMAP3_INPUT_EN \
- | OMAP2_PULL_UP)
-#define OMAP34XX_PIN_INPUT_PULLDOWN (OMAP2_PULL_ENA | OMAP3_INPUT_EN)
-
-/* 34xx off mode states */
-#define OMAP34XX_PIN_OFF_NONE 0
-#define OMAP34XX_PIN_OFF_OUTPUT_HIGH (OMAP3_OFF_EN | OMAP3_OFFOUT_EN \
- | OMAP3_OFFOUT_VAL)
-#define OMAP34XX_PIN_OFF_OUTPUT_LOW (OMAP3_OFF_EN | OMAP3_OFFOUT_EN)
-#define OMAP34XX_PIN_OFF_INPUT_PULLUP (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN \
- | OMAP3_OFF_PULL_UP)
-#define OMAP34XX_PIN_OFF_INPUT_PULLDOWN (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN)
-#define OMAP34XX_PIN_OFF_WAKEUPENABLE OMAP3_WAKEUP_EN
-
-#define MUX_CFG_34XX(desc, reg_offset, mux_value) { \
- .name = desc, \
- .debug = 0, \
- .mux_reg = reg_offset, \
- .mux_val = mux_value \
-},
-
struct pin_config {
char *name;
const unsigned int mux_reg;
unsigned char debug;
-#if defined(CONFIG_ARCH_OMAP34XX)
- u16 mux_val; /* Wake-up, off mode, pull, mux mode */
-#endif
-
#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP24XX)
const unsigned char mask_offset;
const unsigned char mask;
@@ -681,181 +634,6 @@ enum omap24xx_index {
};
-enum omap34xx_index {
- /* 34xx I2C */
- K21_34XX_I2C1_SCL,
- J21_34XX_I2C1_SDA,
- AF15_34XX_I2C2_SCL,
- AE15_34XX_I2C2_SDA,
- AF14_34XX_I2C3_SCL,
- AG14_34XX_I2C3_SDA,
- AD26_34XX_I2C4_SCL,
- AE26_34XX_I2C4_SDA,
-
- /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
- Y8_3430_USB1HS_PHY_CLK,
- Y9_3430_USB1HS_PHY_STP,
- AA14_3430_USB1HS_PHY_DIR,
- AA11_3430_USB1HS_PHY_NXT,
- W13_3430_USB1HS_PHY_DATA0,
- W12_3430_USB1HS_PHY_DATA1,
- W11_3430_USB1HS_PHY_DATA2,
- Y11_3430_USB1HS_PHY_DATA3,
- W9_3430_USB1HS_PHY_DATA4,
- Y12_3430_USB1HS_PHY_DATA5,
- W8_3430_USB1HS_PHY_DATA6,
- Y13_3430_USB1HS_PHY_DATA7,
-
- /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
- AA8_3430_USB2HS_PHY_CLK,
- AA10_3430_USB2HS_PHY_STP,
- AA9_3430_USB2HS_PHY_DIR,
- AB11_3430_USB2HS_PHY_NXT,
- AB10_3430_USB2HS_PHY_DATA0,
- AB9_3430_USB2HS_PHY_DATA1,
- W3_3430_USB2HS_PHY_DATA2,
- T4_3430_USB2HS_PHY_DATA3,
- T3_3430_USB2HS_PHY_DATA4,
- R3_3430_USB2HS_PHY_DATA5,
- R4_3430_USB2HS_PHY_DATA6,
- T2_3430_USB2HS_PHY_DATA7,
-
-
- /* TLL - HSUSB: 12-pin TLL Port 1*/
- Y8_3430_USB1HS_TLL_CLK,
- Y9_3430_USB1HS_TLL_STP,
- AA14_3430_USB1HS_TLL_DIR,
- AA11_3430_USB1HS_TLL_NXT,
- W13_3430_USB1HS_TLL_DATA0,
- W12_3430_USB1HS_TLL_DATA1,
- W11_3430_USB1HS_TLL_DATA2,
- Y11_3430_USB1HS_TLL_DATA3,
- W9_3430_USB1HS_TLL_DATA4,
- Y12_3430_USB1HS_TLL_DATA5,
- W8_3430_USB1HS_TLL_DATA6,
- Y13_3430_USB1HS_TLL_DATA7,
-
- /* TLL - HSUSB: 12-pin TLL Port 2*/
- AA8_3430_USB2HS_TLL_CLK,
- AA10_3430_USB2HS_TLL_STP,
- AA9_3430_USB2HS_TLL_DIR,
- AB11_3430_USB2HS_TLL_NXT,
- AB10_3430_USB2HS_TLL_DATA0,
- AB9_3430_USB2HS_TLL_DATA1,
- W3_3430_USB2HS_TLL_DATA2,
- T4_3430_USB2HS_TLL_DATA3,
- T3_3430_USB2HS_TLL_DATA4,
- R3_3430_USB2HS_TLL_DATA5,
- R4_3430_USB2HS_TLL_DATA6,
- T2_3430_USB2HS_TLL_DATA7,
-
- /* TLL - HSUSB: 12-pin TLL Port 3*/
- AA6_3430_USB3HS_TLL_CLK,
- AB3_3430_USB3HS_TLL_STP,
- AA3_3430_USB3HS_TLL_DIR,
- Y3_3430_USB3HS_TLL_NXT,
- AA5_3430_USB3HS_TLL_DATA0,
- Y4_3430_USB3HS_TLL_DATA1,
- Y5_3430_USB3HS_TLL_DATA2,
- W5_3430_USB3HS_TLL_DATA3,
- AB12_3430_USB3HS_TLL_DATA4,
- AB13_3430_USB3HS_TLL_DATA5,
- AA13_3430_USB3HS_TLL_DATA6,
- AA12_3430_USB3HS_TLL_DATA7,
-
- /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
- AF10_3430_USB1FS_PHY_MM1_RXDP,
- AG9_3430_USB1FS_PHY_MM1_RXDM,
- W13_3430_USB1FS_PHY_MM1_RXRCV,
- W12_3430_USB1FS_PHY_MM1_TXSE0,
- W11_3430_USB1FS_PHY_MM1_TXDAT,
- Y11_3430_USB1FS_PHY_MM1_TXEN_N,
-
- /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
- AF7_3430_USB2FS_PHY_MM2_RXDP,
- AH7_3430_USB2FS_PHY_MM2_RXDM,
- AB10_3430_USB2FS_PHY_MM2_RXRCV,
- AB9_3430_USB2FS_PHY_MM2_TXSE0,
- W3_3430_USB2FS_PHY_MM2_TXDAT,
- T4_3430_USB2FS_PHY_MM2_TXEN_N,
-
- /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
- AH3_3430_USB3FS_PHY_MM3_RXDP,
- AE3_3430_USB3FS_PHY_MM3_RXDM,
- AD1_3430_USB3FS_PHY_MM3_RXRCV,
- AE1_3430_USB3FS_PHY_MM3_TXSE0,
- AD2_3430_USB3FS_PHY_MM3_TXDAT,
- AC1_3430_USB3FS_PHY_MM3_TXEN_N,
-
- /* 34xx GPIO
- * - normally these are bidirectional, no internal pullup/pulldown
- * - "_UP" suffix (GPIO3_UP) if internal pullup is configured
- * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
- * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
- */
- AF26_34XX_GPIO0,
- AF22_34XX_GPIO9,
- AG9_34XX_GPIO23,
- AH8_34XX_GPIO29,
- U8_34XX_GPIO54_OUT,
- U8_34XX_GPIO54_DOWN,
- L8_34XX_GPIO63,
- G25_34XX_GPIO86_OUT,
- AG4_34XX_GPIO134_OUT,
- AF4_34XX_GPIO135_OUT,
- AE4_34XX_GPIO136_OUT,
- AF6_34XX_GPIO140_UP,
- AE6_34XX_GPIO141,
- AF5_34XX_GPIO142,
- AE5_34XX_GPIO143,
- H19_34XX_GPIO164_OUT,
- J25_34XX_GPIO170,
-
- /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
- H16_34XX_SDRC_CKE0,
- H17_34XX_SDRC_CKE1,
-
- /* MMC1 */
- N28_3430_MMC1_CLK,
- M27_3430_MMC1_CMD,
- N27_3430_MMC1_DAT0,
- N26_3430_MMC1_DAT1,
- N25_3430_MMC1_DAT2,
- P28_3430_MMC1_DAT3,
- P27_3430_MMC1_DAT4,
- P26_3430_MMC1_DAT5,
- R27_3430_MMC1_DAT6,
- R25_3430_MMC1_DAT7,
-
- /* MMC2 */
- AE2_3430_MMC2_CLK,
- AG5_3430_MMC2_CMD,
- AH5_3430_MMC2_DAT0,
- AH4_3430_MMC2_DAT1,
- AG4_3430_MMC2_DAT2,
- AF4_3430_MMC2_DAT3,
- AE4_3430_MMC2_DAT4,
- AH3_3430_MMC2_DAT5,
- AF3_3430_MMC2_DAT6,
- AE3_3430_MMC2_DAT7,
-
- /* MMC3 */
- AF10_3430_MMC3_CLK,
- AC3_3430_MMC3_CMD,
- AE11_3430_MMC3_DAT0,
- AH9_3430_MMC3_DAT1,
- AF13_3430_MMC3_DAT2,
- AF13_3430_MMC3_DAT3,
-
- /* SYS_NIRQ T2 INT1 */
- AF26_34XX_SYS_NIRQ,
-
- /* EHCI GPIO's for OMAP3EVM (Rev >= E) */
- AH14_34XX_GPIO21,
- AF9_34XX_GPIO22,
- U3_34XX_GPIO61,
-};
-
struct omap_mux_cfg {
struct pin_config *pins;
unsigned long size;
@@ -865,14 +643,14 @@ struct omap_mux_cfg {
#ifdef CONFIG_OMAP_MUX
/* setup pin muxing in Linux */
extern int omap1_mux_init(void);
-extern int omap2_mux_init(void);
extern int omap_mux_register(struct omap_mux_cfg *);
extern int omap_cfg_reg(unsigned long reg_cfg);
#else
/* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
static inline int omap1_mux_init(void) { return 0; }
-static inline int omap2_mux_init(void) { return 0; }
static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; }
#endif
+extern int omap2_mux_init(void);
+
#endif
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-12-25 15:28:37 +0000