diff options
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r-- | arch/arm/plat-omap/include/plat/cpu.h | 17 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap_hwmod.h | 19 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/sdrc.h | 2 |
3 files changed, 30 insertions, 8 deletions
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 430081ac0c4..f91e0b99b30 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -150,8 +150,8 @@ IS_AM_SUBCLASS(335x, 0x335) #define cpu_is_ti816x() 0 #define cpu_is_ti814x() 0 #define soc_is_am35xx() 0 -#define cpu_is_am33xx() 0 -#define cpu_is_am335x() 0 +#define soc_is_am33xx() 0 +#define soc_is_am335x() 0 #define cpu_is_omap44xx() 0 #define cpu_is_omap443x() 0 #define cpu_is_omap446x() 0 @@ -328,8 +328,6 @@ IS_OMAP_TYPE(3430, 0x3430) # undef cpu_is_ti816x # undef cpu_is_ti814x # undef soc_is_am35xx -# undef cpu_is_am33xx -# undef cpu_is_am335x # define cpu_is_omap3430() is_omap3430() # undef cpu_is_omap3630 # define cpu_is_omap3630() is_omap363x() @@ -337,8 +335,13 @@ IS_OMAP_TYPE(3430, 0x3430) # define cpu_is_ti816x() is_ti816x() # define cpu_is_ti814x() is_ti814x() # define soc_is_am35xx() is_am35xx() -# define cpu_is_am33xx() is_am33xx() -# define cpu_is_am335x() is_am335x() +#endif + +# if defined(CONFIG_SOC_AM33XX) +# undef soc_is_am33xx +# undef soc_is_am335x +# define soc_is_am33xx() is_am33xx() +# define soc_is_am335x() is_am335x() #endif # if defined(CONFIG_ARCH_OMAP4) @@ -392,7 +395,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define AM35XX_REV_ES1_0 AM35XX_CLASS #define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8)) -#define AM335X_CLASS 0x33500034 +#define AM335X_CLASS 0x33500033 #define AM335X_REV_ES1_0 AM335X_CLASS #define OMAP443X_CLASS 0x44300044 diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index a8ecc53b367..6132972aff3 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -41,6 +41,7 @@ struct omap_device; extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1; extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; +extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3; /* * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant @@ -69,6 +70,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT) #define SYSC_TYPE2_MIDLEMODE_SHIFT 4 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT) +#define SYSC_TYPE2_DMADISABLE_SHIFT 16 +#define SYSC_TYPE2_DMADISABLE_MASK (0x1 << SYSC_TYPE2_DMADISABLE_SHIFT) + +/* + * OCP SYSCONFIG bit shifts/masks TYPE3. + * This is applicable for some IPs present in AM33XX + */ +#define SYSC_TYPE3_SIDLEMODE_SHIFT 0 +#define SYSC_TYPE3_SIDLEMODE_MASK (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT) +#define SYSC_TYPE3_MIDLEMODE_SHIFT 2 +#define SYSC_TYPE3_MIDLEMODE_MASK (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT) /* OCP SYSSTATUS bit shifts/masks */ #define SYSS_RESETDONE_SHIFT 0 @@ -283,6 +295,7 @@ struct omap_hwmod_ocp_if { #define SYSS_HAS_RESET_STATUS (1 << 7) #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ #define SYSC_HAS_RESET_STATUS (1 << 9) +#define SYSC_HAS_DMADISABLE (1 << 10) /* omap_hwmod_sysconfig.clockact flags */ #define CLOCKACT_TEST_BOTH 0x0 @@ -298,6 +311,7 @@ struct omap_hwmod_ocp_if { * @enwkup_shift: Offset of the enawakeup bit * @srst_shift: Offset of the softreset bit * @autoidle_shift: Offset of the autoidle bit + * @dmadisable_shift: Offset of the dmadisable bit */ struct omap_hwmod_sysc_fields { u8 midle_shift; @@ -306,6 +320,7 @@ struct omap_hwmod_sysc_fields { u8 enwkup_shift; u8 srst_shift; u8 autoidle_shift; + u8 dmadisable_shift; }; /** @@ -374,11 +389,13 @@ struct omap_hwmod_omap2_prcm { * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data * @clkctrl_reg: PRCM address of the clock control register * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM + * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM * @submodule_wkdep_bit: bit shift of the WKDEP range */ struct omap_hwmod_omap4_prcm { u16 clkctrl_offs; u16 rstctrl_offs; + u16 rstst_offs; u16 context_offs; u8 submodule_wkdep_bit; u8 modulemode; @@ -631,6 +648,8 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); extern void __init omap_hwmod_init(void); +const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh); + /* * Chip variant-specific hwmod init routines - XXX should be converted * to use initcalls once the initial boot ordering is straightened out diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h index 9bb978ecd88..36d6a766621 100644 --- a/arch/arm/plat-omap/include/plat/sdrc.h +++ b/arch/arm/plat-omap/include/plat/sdrc.h @@ -123,7 +123,7 @@ struct omap_sdrc_params { u32 mr; }; -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) +#ifdef CONFIG_SOC_HAS_OMAP2_SDRC void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1); #else |