diff options
Diffstat (limited to 'arch/arm/plat-samsung/include')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/clock.h | 9 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/devs.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/irqs.h | 9 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/pm.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/pwm-clock.h | 81 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/pwm-core.h | 22 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-timer.h | 124 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/samsung-time.h | 23 |
9 files changed, 32 insertions, 258 deletions
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index a62753dc15b..63239f40980 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h @@ -83,6 +83,11 @@ extern struct clk clk_ext; extern struct clksrc_clk clk_epllref; extern struct clksrc_clk clk_esysclk; +/* S3C24XX UART clocks */ +extern struct clk s3c24xx_clk_uart0; +extern struct clk s3c24xx_clk_uart1; +extern struct clk s3c24xx_clk_uart2; + /* S3C64XX specific clocks */ extern struct clk clk_h2; extern struct clk clk_27m; @@ -140,10 +145,6 @@ extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable); extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable); -/* Init for pwm clock code */ - -extern void s3c_pwmclk_init(void); - /* Global watchdog clock used by arch_wtd_reset() callback */ extern struct clk *s3c2410_wdtclk; diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 87d501ff332..0dc4ac4909b 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif; extern struct platform_device samsung_asoc_idma; extern struct platform_device samsung_device_keypad; +extern struct platform_device samsung_device_pwm; /* s3c2440 specific devices */ diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h deleted file mode 100644 index 5b9c42fd32d..00000000000 --- a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h +++ /dev/null @@ -1,13 +0,0 @@ -/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h - * - * Copyright (c) 2010 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Header file for Samsung SoC IRQ VIC timer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq); diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h index df46b776976..039001c0ef0 100644 --- a/arch/arm/plat-samsung/include/plat/irqs.h +++ b/arch/arm/plat-samsung/include/plat/irqs.h @@ -44,15 +44,6 @@ #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) -#define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x)) - -#define IRQ_TIMER0 S5P_TIMER_IRQ(0) -#define IRQ_TIMER1 S5P_TIMER_IRQ(1) -#define IRQ_TIMER2 S5P_TIMER_IRQ(2) -#define IRQ_TIMER3 S5P_TIMER_IRQ(3) -#define IRQ_TIMER4 S5P_TIMER_IRQ(4) -#define IRQ_TIMER_COUNT (5) - #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ : ((x) - 16 + S5P_EINT_BASE2)) diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index 5d47ca35cab..6bc1a8f471e 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h @@ -19,7 +19,7 @@ struct device; -#ifdef CONFIG_PM +#ifdef CONFIG_SAMSUNG_PM extern __init int s3c_pm_init(void); extern __init int s3c64xx_pm_init(void); @@ -58,8 +58,6 @@ extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */ /* from sleep.S */ -extern void s3c_cpu_resume(void); - extern int s3c2410_cpu_suspend(unsigned long); /* sleep save info */ @@ -106,12 +104,14 @@ extern void s3c_pm_do_save(struct sleep_save *ptr, int count); extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); -#ifdef CONFIG_PM +#ifdef CONFIG_SAMSUNG_PM extern int s3c_irq_wake(struct irq_data *data, unsigned int state); extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); +extern void s3c_cpu_resume(void); #else #define s3c_irq_wake NULL #define s3c_irqext_wake NULL +#define s3c_cpu_resume NULL #endif /* PM debug functions */ diff --git a/arch/arm/plat-samsung/include/plat/pwm-clock.h b/arch/arm/plat-samsung/include/plat/pwm-clock.h deleted file mode 100644 index bf6a60eb623..00000000000 --- a/arch/arm/plat-samsung/include/plat/pwm-clock.h +++ /dev/null @@ -1,81 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/pwm-clock.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * SAMSUNG - pwm clock and timer support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_PWM_CLOCK_H -#define __ASM_PLAT_PWM_CLOCK_H __FILE__ - -/** - * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk - * @tcfg: The timer TCFG1 register bits shifted down to 0. - * - * Return true if the given configuration from TCFG1 is a TCLK instead - * any of the TDIV clocks. - */ -static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) -{ - if (soc_is_s3c24xx()) - return tcfg == S3C2410_TCFG1_MUX_TCLK; - else if (soc_is_s3c64xx() || soc_is_s5pc100()) - return tcfg >= S3C64XX_TCFG1_MUX_TCLK; - else if (soc_is_s5p6440() || soc_is_s5p6450()) - return 0; - else - return tcfg == S3C64XX_TCFG1_MUX_TCLK; -} - -/** - * tcfg_to_divisor() - convert tcfg1 setting to a divisor - * @tcfg1: The tcfg1 setting, shifted down. - * - * Get the divisor value for the given tcfg1 setting. We assume the - * caller has already checked to see if this is not a TCLK source. - */ -static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) -{ - if (soc_is_s3c24xx()) - return 1 << (tcfg1 + 1); - else - return 1 << tcfg1; -} - -/** - * pwm_tdiv_has_div1() - does the tdiv setting have a /1 - * - * Return true if we have a /1 in the tdiv setting. - */ -static inline unsigned int pwm_tdiv_has_div1(void) -{ - if (soc_is_s3c24xx()) - return 0; - else - return 1; -} - -/** - * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. - * @div: The divisor to calculate the bit information for. - * - * Turn a divisor into the necessary bit field for TCFG1. - */ -static inline unsigned long pwm_tdiv_div_bits(unsigned int div) -{ - if (soc_is_s3c24xx()) - return ilog2(div) - 1; - else - return ilog2(div); -} -#endif /* __ASM_PLAT_PWM_CLOCK_H */ diff --git a/arch/arm/plat-samsung/include/plat/pwm-core.h b/arch/arm/plat-samsung/include/plat/pwm-core.h new file mode 100644 index 00000000000..5bff1facb67 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/pwm-core.h @@ -0,0 +1,22 @@ +/* + * Copyright 2013 Tomasz Figa <tomasz.figa@gmail.com> + * + * Samsung PWM controller platform data helpers. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_PWM_CORE_H +#define __ASM_ARCH_PWM_CORE_H __FILE__ + +#include <clocksource/samsung_pwm.h> + +#ifdef CONFIG_SAMSUNG_DEV_PWM +extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd); +#else +static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { } +#endif + +#endif /* __ASM_ARCH_PWM_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/regs-timer.h b/arch/arm/plat-samsung/include/plat/regs-timer.h deleted file mode 100644 index d097d92f8cc..00000000000 --- a/arch/arm/plat-samsung/include/plat/regs-timer.h +++ /dev/null @@ -1,124 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-timer.h - * - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 Timer configuration -*/ - -#ifndef __ASM_ARCH_REGS_TIMER_H -#define __ASM_ARCH_REGS_TIMER_H - -#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x)) -#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c)) - -#define S3C2410_TCFG0 S3C_TIMERREG(0x00) -#define S3C2410_TCFG1 S3C_TIMERREG(0x04) -#define S3C2410_TCON S3C_TIMERREG(0x08) - -#define S3C64XX_TINT_CSTAT S3C_TIMERREG(0x44) - -#define S3C2410_TCFG_PRESCALER0_MASK (255<<0) -#define S3C2410_TCFG_PRESCALER1_MASK (255<<8) -#define S3C2410_TCFG_PRESCALER1_SHIFT (8) -#define S3C2410_TCFG_DEADZONE_MASK (255<<16) -#define S3C2410_TCFG_DEADZONE_SHIFT (16) - -#define S3C2410_TCFG1_MUX4_DIV2 (0<<16) -#define S3C2410_TCFG1_MUX4_DIV4 (1<<16) -#define S3C2410_TCFG1_MUX4_DIV8 (2<<16) -#define S3C2410_TCFG1_MUX4_DIV16 (3<<16) -#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16) -#define S3C2410_TCFG1_MUX4_MASK (15<<16) -#define S3C2410_TCFG1_MUX4_SHIFT (16) - -#define S3C2410_TCFG1_MUX3_DIV2 (0<<12) -#define S3C2410_TCFG1_MUX3_DIV4 (1<<12) -#define S3C2410_TCFG1_MUX3_DIV8 (2<<12) -#define S3C2410_TCFG1_MUX3_DIV16 (3<<12) -#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12) -#define S3C2410_TCFG1_MUX3_MASK (15<<12) - - -#define S3C2410_TCFG1_MUX2_DIV2 (0<<8) -#define S3C2410_TCFG1_MUX2_DIV4 (1<<8) -#define S3C2410_TCFG1_MUX2_DIV8 (2<<8) -#define S3C2410_TCFG1_MUX2_DIV16 (3<<8) -#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8) -#define S3C2410_TCFG1_MUX2_MASK (15<<8) - - -#define S3C2410_TCFG1_MUX1_DIV2 (0<<4) -#define S3C2410_TCFG1_MUX1_DIV4 (1<<4) -#define S3C2410_TCFG1_MUX1_DIV8 (2<<4) -#define S3C2410_TCFG1_MUX1_DIV16 (3<<4) -#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4) -#define S3C2410_TCFG1_MUX1_MASK (15<<4) - -#define S3C2410_TCFG1_MUX0_DIV2 (0<<0) -#define S3C2410_TCFG1_MUX0_DIV4 (1<<0) -#define S3C2410_TCFG1_MUX0_DIV8 (2<<0) -#define S3C2410_TCFG1_MUX0_DIV16 (3<<0) -#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0) -#define S3C2410_TCFG1_MUX0_MASK (15<<0) - -#define S3C2410_TCFG1_MUX_DIV2 (0<<0) -#define S3C2410_TCFG1_MUX_DIV4 (1<<0) -#define S3C2410_TCFG1_MUX_DIV8 (2<<0) -#define S3C2410_TCFG1_MUX_DIV16 (3<<0) -#define S3C2410_TCFG1_MUX_TCLK (4<<0) -#define S3C2410_TCFG1_MUX_MASK (15<<0) - -#define S3C64XX_TCFG1_MUX_DIV1 (0<<0) -#define S3C64XX_TCFG1_MUX_DIV2 (1<<0) -#define S3C64XX_TCFG1_MUX_DIV4 (2<<0) -#define S3C64XX_TCFG1_MUX_DIV8 (3<<0) -#define S3C64XX_TCFG1_MUX_DIV16 (4<<0) -#define S3C64XX_TCFG1_MUX_TCLK (5<<0) /* 3 sets of TCLK */ -#define S3C64XX_TCFG1_MUX_MASK (15<<0) - -#define S3C2410_TCFG1_SHIFT(x) ((x) * 4) - -/* for each timer, we have an count buffer, an compare buffer and - * an observation buffer -*/ - -/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */ - -#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00) -#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04) -#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08)) - -#define S3C2410_TCON_T4RELOAD (1<<22) -#define S3C2410_TCON_T4MANUALUPD (1<<21) -#define S3C2410_TCON_T4START (1<<20) - -#define S3C2410_TCON_T3RELOAD (1<<19) -#define S3C2410_TCON_T3INVERT (1<<18) -#define S3C2410_TCON_T3MANUALUPD (1<<17) -#define S3C2410_TCON_T3START (1<<16) - -#define S3C2410_TCON_T2RELOAD (1<<15) -#define S3C2410_TCON_T2INVERT (1<<14) -#define S3C2410_TCON_T2MANUALUPD (1<<13) -#define S3C2410_TCON_T2START (1<<12) - -#define S3C2410_TCON_T1RELOAD (1<<11) -#define S3C2410_TCON_T1INVERT (1<<10) -#define S3C2410_TCON_T1MANUALUPD (1<<9) -#define S3C2410_TCON_T1START (1<<8) - -#define S3C2410_TCON_T0DEADZONE (1<<4) -#define S3C2410_TCON_T0RELOAD (1<<3) -#define S3C2410_TCON_T0INVERT (1<<2) -#define S3C2410_TCON_T0MANUALUPD (1<<1) -#define S3C2410_TCON_T0START (1<<0) - -#endif /* __ASM_ARCH_REGS_TIMER_H */ - - - diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h index 4cc99bb1f17..209464adef9 100644 --- a/arch/arm/plat-samsung/include/plat/samsung-time.h +++ b/arch/arm/plat-samsung/include/plat/samsung-time.h @@ -22,29 +22,6 @@ enum samsung_timer_mode { SAMSUNG_PWM4, }; -struct samsung_timer_source { - unsigned int event_id; - unsigned int source_id; -}; - -/* Be able to sleep for atleast 4 seconds (usually more) */ -#define SAMSUNG_TIMER_MIN_RANGE 4 - -#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100) -#define TCNT_MAX 0xffff -#define TSCALER_DIV 25 -#define TDIV 50 -#define TSIZE 16 -#else -#define TCNT_MAX 0xffffffff -#define TSCALER_DIV 2 -#define TDIV 2 -#define TSIZE 32 -#endif - -#define NON_PERIODIC 0 -#define PERIODIC 1 - extern void __init samsung_set_timer_source(enum samsung_timer_mode event, enum samsung_timer_mode source); |