diff options
Diffstat (limited to 'arch/arm/plat-samsung/include')
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/devs.h | 20 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/fb.h | 7 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-cfg.h | 23 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/iic-core.h | 7 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/iic.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/onenand-core.h | 37 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-onenand.h | 63 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-rtc.h | 4 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 4 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 55 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/wakeup-mask.h | 44 |
11 files changed, 265 insertions, 1 deletions
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index ef69e56b288..e6144e4b911 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -45,6 +45,7 @@ extern struct platform_device s3c_device_lcd; extern struct platform_device s3c_device_wdt; extern struct platform_device s3c_device_i2c0; extern struct platform_device s3c_device_i2c1; +extern struct platform_device s3c_device_i2c2; extern struct platform_device s3c_device_rtc; extern struct platform_device s3c_device_adc; extern struct platform_device s3c_device_sdi; @@ -57,9 +58,20 @@ extern struct platform_device s3c_device_hsmmc2; extern struct platform_device s3c_device_spi0; extern struct platform_device s3c_device_spi1; +extern struct platform_device s5pc100_device_spi0; +extern struct platform_device s5pc100_device_spi1; +extern struct platform_device s5pc100_device_spi2; +extern struct platform_device s5pv210_device_spi0; +extern struct platform_device s5pv210_device_spi1; +extern struct platform_device s5p6440_device_spi0; +extern struct platform_device s5p6440_device_spi1; + extern struct platform_device s3c_device_hwmon; extern struct platform_device s3c_device_nand; +extern struct platform_device s3c_device_onenand; +extern struct platform_device s3c64xx_device_onenand1; +extern struct platform_device s5pc110_device_onenand; extern struct platform_device s3c_device_usbgadget; extern struct platform_device s3c_device_usb_hsotg; @@ -76,10 +88,18 @@ extern struct platform_device s5p6442_device_pcm0; extern struct platform_device s5p6442_device_pcm1; extern struct platform_device s5p6442_device_iis0; extern struct platform_device s5p6442_device_iis1; +extern struct platform_device s5p6442_device_spi; extern struct platform_device s5p6440_device_pcm; extern struct platform_device s5p6440_device_iis; +extern struct platform_device s5pc100_device_ac97; +extern struct platform_device s5pc100_device_pcm0; +extern struct platform_device s5pc100_device_pcm1; +extern struct platform_device s5pc100_device_iis0; +extern struct platform_device s5pc100_device_iis1; +extern struct platform_device s5pc100_device_iis2; + /* s3c2440 specific devices */ #ifdef CONFIG_CPU_S3C2440 diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 1f85649d8c1..27d3b497b55 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h @@ -84,4 +84,11 @@ extern void s3c64xx_fb_gpio_setup_24bpp(void); */ extern void s5pc100_fb_gpio_setup_24bpp(void); +/** + * s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD + * + * Initialise the GPIO for an 24bpp LCD display on the RGB interface. + */ +extern void s5pv210_fb_gpio_setup_24bpp(void); + #endif /* __PLAT_S3C_FB_H */ diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 34efdd2b032..db4112c6f2b 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -43,6 +43,11 @@ struct s3c_gpio_chip; * layouts. Provide an point to vector control routine and provide any * per-bank configuration information that other systems such as the * external interrupt code will need. + * + * @sa s3c_gpio_cfgpin + * @sa s3c_gpio_getcfg + * @sa s3c_gpio_setpull + * @sa s3c_gpio_getpull */ struct s3c_gpio_cfg { unsigned int cfg_eint; @@ -70,11 +75,25 @@ struct s3c_gpio_cfg { /** * s3c_gpio_cfgpin() - Change the GPIO function of a pin. * @pin pin The pin number to configure. - * @pin to The configuration for the pin's function. + * @to to The configuration for the pin's function. * * Configure which function is actually connected to the external * pin, such as an gpio input, output or some form of special function * connected to an internal peripheral block. + * + * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT + * or S3C_GPIO_SFN() to indicate one of the possible values that the helper + * will then generate the correct bit mask and shift for the configuration. + * + * If a bank of GPIOs all needs to be set to special-function 2, then + * the following code will work: + * + * for (gpio = start; gpio < end; gpio++) + * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + * + * The @to parameter can also be a specific value already shifted to the + * correct position in the control register, although these are discouraged + * in newer kernels and are only being kept for compatibility. */ extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); @@ -108,6 +127,8 @@ extern unsigned s3c_gpio_getcfg(unsigned int pin); * This function sets the state of the pull-{up,down} resistor for the * specified pin. It will return 0 if successfull, or a negative error * code if the pin cannot support the requested pull setting. + * + * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. */ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); diff --git a/arch/arm/plat-samsung/include/plat/iic-core.h b/arch/arm/plat-samsung/include/plat/iic-core.h index 36397ca2096..f182669b8e8 100644 --- a/arch/arm/plat-samsung/include/plat/iic-core.h +++ b/arch/arm/plat-samsung/include/plat/iic-core.h @@ -32,4 +32,11 @@ static inline void s3c_i2c1_setname(char *name) #endif } +static inline void s3c_i2c2_setname(char *name) +{ +#ifdef CONFIG_S3C_DEV_I2C2 + s3c_device_i2c2.name = name; +#endif +} + #endif /* __ASM_ARCH_IIC_H */ diff --git a/arch/arm/plat-samsung/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h index 3083df00dee..133308bf595 100644 --- a/arch/arm/plat-samsung/include/plat/iic.h +++ b/arch/arm/plat-samsung/include/plat/iic.h @@ -54,9 +54,11 @@ struct s3c2410_platform_i2c { */ extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c); extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c); +extern void s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *i2c); /* defined by architecture to configure gpio */ extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); extern void s3c_i2c1_cfg_gpio(struct platform_device *dev); +extern void s3c_i2c2_cfg_gpio(struct platform_device *dev); #endif /* __ASM_ARCH_IIC_H */ diff --git a/arch/arm/plat-samsung/include/plat/onenand-core.h b/arch/arm/plat-samsung/include/plat/onenand-core.h new file mode 100644 index 00000000000..7701cb7020c --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/onenand-core.h @@ -0,0 +1,37 @@ +/* + * linux/arch/arm/plat-samsung/onenand-core.h + * + * Copyright (c) 2010 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * Marek Szyprowski <m.szyprowski@samsung.com> + * + * Samsung OneNAD Controller core functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_ONENAND_CORE_H +#define __ASM_ARCH_ONENAND_CORE_H __FILE__ + +/* These functions are only for use with the core support code, such as + * the cpu specific initialisation code + */ + +/* re-define device name depending on support. */ +static inline void s3c_onenand_setname(char *name) +{ +#ifdef CONFIG_S3C_DEV_ONENAND + s3c_device_onenand.name = name; +#endif +} + +static inline void s3c64xx_onenand1_setname(char *name) +{ +#ifdef CONFIG_S3C64XX_DEV_ONENAND1 + s3c64xx_device_onenand1.name = name; +#endif +} + +#endif /* __ASM_ARCH_ONENAND_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/regs-onenand.h b/arch/arm/plat-samsung/include/plat/regs-onenand.h new file mode 100644 index 00000000000..930ea8b88ed --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-onenand.h @@ -0,0 +1,63 @@ +/* + * linux/arch/arm/plat-s3c/include/plat/regs-onenand.h + * + * Copyright (C) 2008-2010 Samsung Electronics + * Kyungmin Park <kyungmin.park@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __SAMSUNG_ONENAND_H__ +#define __SAMSUNG_ONENAND_H__ + +#include <mach/hardware.h> + +/* + * OneNAND Controller + */ +#define MEM_CFG_OFFSET 0x0000 +#define BURST_LEN_OFFSET 0x0010 +#define MEM_RESET_OFFSET 0x0020 +#define INT_ERR_STAT_OFFSET 0x0030 +#define INT_ERR_MASK_OFFSET 0x0040 +#define INT_ERR_ACK_OFFSET 0x0050 +#define ECC_ERR_STAT_OFFSET 0x0060 +#define MANUFACT_ID_OFFSET 0x0070 +#define DEVICE_ID_OFFSET 0x0080 +#define DATA_BUF_SIZE_OFFSET 0x0090 +#define BOOT_BUF_SIZE_OFFSET 0x00A0 +#define BUF_AMOUNT_OFFSET 0x00B0 +#define TECH_OFFSET 0x00C0 +#define FBA_WIDTH_OFFSET 0x00D0 +#define FPA_WIDTH_OFFSET 0x00E0 +#define FSA_WIDTH_OFFSET 0x00F0 +#define TRANS_SPARE_OFFSET 0x0140 +#define DBS_DFS_WIDTH_OFFSET 0x0160 +#define INT_PIN_ENABLE_OFFSET 0x01A0 +#define ACC_CLOCK_OFFSET 0x01C0 +#define FLASH_VER_ID_OFFSET 0x01F0 +#define FLASH_AUX_CNTRL_OFFSET 0x0300 /* s3c64xx only */ + +#define ONENAND_MEM_RESET_HOT 0x3 +#define ONENAND_MEM_RESET_COLD 0x2 +#define ONENAND_MEM_RESET_WARM 0x1 + +#define CACHE_OP_ERR (1 << 13) +#define RST_CMP (1 << 12) +#define RDY_ACT (1 << 11) +#define INT_ACT (1 << 10) +#define UNSUP_CMD (1 << 9) +#define LOCKED_BLK (1 << 8) +#define BLK_RW_CMP (1 << 7) +#define ERS_CMP (1 << 6) +#define PGM_CMP (1 << 5) +#define LOAD_CMP (1 << 4) +#define ERS_FAIL (1 << 3) +#define PGM_FAIL (1 << 2) +#define INT_TO (1 << 1) +#define LD_FAIL_ECC_ERR (1 << 0) + +#define TSRF (1 << 0) + +#endif diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index d5837cf8e40..65c190d142d 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h @@ -20,6 +20,10 @@ #define S3C2410_RTCCON_CLKSEL (1<<1) #define S3C2410_RTCCON_CNTSEL (1<<2) #define S3C2410_RTCCON_CLKRST (1<<3) +#define S3C64XX_RTCCON_TICEN (1<<8) + +#define S3C64XX_RTCCON_TICMSK (0xF<<7) +#define S3C64XX_RTCCON_TICSHT (7) #define S3C2410_TICNT S3C2410_RTCREG(0x44) #define S3C2410_TICNT_ENABLE (1<<7) diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index d1772414931..e5aba8f95b7 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h @@ -63,5 +63,9 @@ struct s3c64xx_spi_info { * has some chips attached to it. */ extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); +extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); +extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); +extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); +extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); #endif /* __S3C64XX_PLAT_SPI_H */ diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 7d07cd7aa4f..13f9fb20900 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -75,6 +75,9 @@ extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); +extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); +extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); +extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); /* S3C6400 SDHCI setup */ @@ -218,4 +221,56 @@ static inline void s5pc100_default_sdhci1(void) { } static inline void s5pc100_default_sdhci2(void) { } #endif /* CONFIG_S5PC100_SETUP_SDHCI */ + +/* S5PC110 SDHCI setup */ +#ifdef CONFIG_S5PV210_SETUP_SDHCI +extern char *s5pv210_hsmmc_clksrcs[4]; + +extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card); + +#ifdef CONFIG_S3C_DEV_HSMMC +static inline void s5pv210_default_sdhci0(void) +{ + s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; + s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; + s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; +} +#else +static inline void s5pc100_default_sdhci0(void) { } +#endif /* CONFIG_S3C_DEV_HSMMC */ + +#ifdef CONFIG_S3C_DEV_HSMMC1 +static inline void s5pv210_default_sdhci1(void) +{ + s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; + s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; + s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; +} +#else +static inline void s5pv210_default_sdhci1(void) { } +#endif /* CONFIG_S3C_DEV_HSMMC1 */ + +#ifdef CONFIG_S3C_DEV_HSMMC2 +static inline void s5pv210_default_sdhci2(void) +{ + s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; + s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; + s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; +} +#else +static inline void s5pv210_default_sdhci2(void) { } +#endif /* CONFIG_S3C_DEV_HSMMC2 */ + +#else +static inline void s5pv210_default_sdhci0(void) { } +static inline void s5pv210_default_sdhci1(void) { } +static inline void s5pv210_default_sdhci2(void) { } +#endif /* CONFIG_S5PC100_SETUP_SDHCI */ + + + + #endif /* __PLAT_S3C_SDHCI_H */ diff --git a/arch/arm/plat-samsung/include/plat/wakeup-mask.h b/arch/arm/plat-samsung/include/plat/wakeup-mask.h new file mode 100644 index 00000000000..43e4acd2e1c --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/wakeup-mask.h @@ -0,0 +1,44 @@ +/* arch/arm/plat-samsung/include/plat/wakeup-mask.h + * + * Copyright 2010 Ben Dooks <ben-linux@fluff.org> + * + * Support for wakeup mask interrupts on newer SoCs + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#ifndef __PLAT_WAKEUP_MASK_H +#define __PLAT_WAKEUP_MASK_H __file__ + +/* if no irq yet defined, but still want to mask */ +#define NO_WAKEUP_IRQ (0x90000000) + +/** + * struct samsung_wakeup_mask - wakeup mask information + * @irq: The interrupt associated with this wakeup. + * @bit: The bit, as a (1 << bitno) controlling this source. + */ +struct samsung_wakeup_mask { + unsigned int irq; + u32 bit; +}; + +/** + * samsung_sync_wakemask - sync wakeup mask information for pm + * @reg: The register that is used. + * @masks: The list of masks to use. + * @nr_masks: The number of entries pointed to buy @masks. + * + * Synchronise the wakeup mask information at suspend time from the list + * of interrupts and control bits in @masks. We do this at suspend time + * as overriding the relevant irq chips is harder and the register is only + * required to be correct before we enter sleep. + */ +extern void samsung_sync_wakemask(void __iomem *reg, + struct samsung_wakeup_mask *masks, + int nr_masks); + +#endif /* __PLAT_WAKEUP_MASK_H */ |